Mercurial > hg > Members > amothic > TRW
diff Paper/cerium.bib @ 5:17c01f69db69 draft default tip
finish
author | Daichi TOMA <toma@cr.ie.u-ryukyu.ac.jp> |
---|---|
date | Mon, 23 Jul 2012 11:58:20 +0900 |
parents | 03e644cc3366 |
children |
line wrap: on
line diff
--- a/Paper/cerium.bib Mon Jul 23 06:51:08 2012 +0900 +++ b/Paper/cerium.bib Mon Jul 23 11:58:20 2012 +0900 @@ -54,6 +54,38 @@ year = 2006 } +@misc{cell_wiki, +title = "{Cell}", +howpublished = "{http://en.wikipedia.org/wiki/Cell\_(microprocessor)}" +} + +@manual{cell-ibm, +author = "{IBM}", +title = "{IBM Research - Cell}", +year = 2005 +} + +@article{cell-ieee, + author = {Gschwind, Michael and Hofstee, H. Peter and Flachs, Brian and Hopkins, Martin and Watanabe, Yukio and Yamazaki, Takeshi}, + title = {Synergistic Processing in Cell's Multicore Architecture}, + journal = {IEEE Micro}, + issue_date = {March 2006}, + volume = {26}, + number = {2}, + month = mar, + year = {2006}, + issn = {0272-1732}, + pages = {10--24}, + numpages = {15}, + url = {http://dx.doi.org/10.1109/MM.2006.41}, + doi = {10.1109/MM.2006.41}, + acmid = {1130803}, + publisher = {IEEE Computer Society Press}, + address = {Los Alamitos, CA, USA}, + keywords = {Cell Broadband Engine, multicore architecture, synergistic processing, synergistic processing, Cell Broadband Engine, multicore architecture}, +} + + @manual{cell_sdk, author = "{International Business Machines Corporation}", title = "{Software Development Kit for Multicore Acceleration Version 3.1}", @@ -291,3 +323,21 @@ month = "Sep", year = 2011 } + +@inproceedings{2006:CMC, + author = {Gschwind, Michael}, + title = {Chip multiprocessing and the cell broadband engine}, + booktitle = {Proceedings of the 3rd conference on Computing frontiers}, + series = {CF '06}, + year = {2006}, + isbn = {1-59593-302-6}, + location = {Ischia, Italy}, + pages = {1--8}, + numpages = {8}, + url = {http://doi.acm.org/10.1145/1128022.1128023}, + doi = {10.1145/1128022.1128023}, + acmid = {1128023}, + publisher = {ACM}, + address = {New York, NY, USA}, + keywords = {cell broadband engine, chip multiprocessing, compute-transfer parallelism (CTP), heterogeneous chip multiprocessor, memory-level parallelism (MLP)}, +}