annotate src/spinlock.c @ 0:83c23a36980d

Init
author Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
date Fri, 26 May 2017 23:11:05 +0900
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children ad1d3b268e2d
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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1 // Mutual exclusion spin locks.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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2
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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3 #include "types.h"
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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4 #include "defs.h"
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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5 #include "param.h"
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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6 #include "arm.h"
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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7 #include "memlayout.h"
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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8 #include "mmu.h"
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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9 #include "proc.h"
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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10 #include "spinlock.h"
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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11
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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12 void initlock(struct spinlock *lk, char *name)
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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13 {
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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14 lk->name = name;
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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15 lk->locked = 0;
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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16 lk->cpu = 0;
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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17 }
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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18
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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19 // For single CPU systems, there is no need for spinlock.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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20 // Add the support when multi-processor is supported.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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21
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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22
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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23 // Acquire the lock.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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24 // Loops (spins) until the lock is acquired.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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25 // Holding a lock for a long time may cause
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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26 // other CPUs to waste time spinning to acquire it.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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27 void acquire(struct spinlock *lk)
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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28 {
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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29 pushcli(); // disable interrupts to avoid deadlock.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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30 lk->locked = 1; // set the lock status to make the kernel happy
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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31
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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32 #if 0
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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33 if(holding(lk))
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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34 panic("acquire");
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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35
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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36 // The xchg is atomic.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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37 // It also serializes, so that reads after acquire are not
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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38 // reordered before it.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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39 while(xchg(&lk->locked, 1) != 0)
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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40 ;
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41
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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42 // Record info about lock acquisition for debugging.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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43 lk->cpu = cpu;
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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44 getcallerpcs(get_fp(), lk->pcs);
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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45
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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46 #endif
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47 }
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48
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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49 // Release the lock.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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50 void release(struct spinlock *lk)
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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51 {
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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52 #if 0
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53 if(!holding(lk))
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54 panic("release");
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55
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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56 lk->pcs[0] = 0;
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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57 lk->cpu = 0;
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58
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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59 // The xchg serializes, so that reads before release are
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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60 // not reordered after it. The 1996 PentiumPro manual (Volume 3,
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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61 // 7.2) says reads can be carried out speculatively and in
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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62 // any order, which implies we need to serialize here.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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63 // But the 2007 Intel 64 Architecture Memory Ordering White
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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64 // Paper says that Intel 64 and IA-32 will not move a load
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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65 // after a store. So lock->locked = 0 would work here.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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66 // The xchg being asm volatile ensures gcc emits it after
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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67 // the above assignments (and after the critical section).
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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68 xchg(&lk->locked, 0);
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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69 #endif
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70
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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71 lk->locked = 0; // set the lock state to keep the kernel happy
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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72 popcli();
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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73 }
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74
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75
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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76 // Check whether this cpu is holding the lock.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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77 int holding(struct spinlock *lock)
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78 {
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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79 return lock->locked; // && lock->cpu == cpus;
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80 }
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81