annotate src/device/versatile_pb.h @ 48:58ec26c64601

fix_makefile.inc use *.cbc files
author anatofuz
date Wed, 13 Mar 2019 11:29:46 +0900
parents 83c23a36980d
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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1 //
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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2 // Board specific information for the VersatilePB board
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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3 //
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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4 #ifndef VERSATILEPB
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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5 #define VERSATILEPB
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6
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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8 // the VerstatilePB board can support up to 256MB memory.
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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9 // but we assume it has 128MB instead. During boot, the lower
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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10 // 64MB memory is mapped to the flash, needs to be remapped
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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11 // the the SDRAM. We skip this for QEMU
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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12 #define PHYSTOP 0x08000000
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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13 #define BSP_MEMREMAP 0x04000000
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14
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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15 #define DEVBASE 0x10000000
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16 #define DEV_MEM_SZ 0x08000000
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17 #define VEC_TBL 0xFFFF0000
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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20 #define STACK_FILL 0xdeadbeef
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21
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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22 #define UART0 0x101f1000
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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23 #define UART_CLK 24000000 // Clock rate for UART
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24
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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25 #define TIMER0 0x101E2000
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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26 #define TIMER1 0x101E2020
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27 #define CLK_HZ 1000000 // the clock is 1MHZ
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28
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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29 #define VIC_BASE 0x10140000
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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30 #define PIC_TIMER01 4
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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31 #define PIC_TIMER23 5
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32 #define PIC_UART0 12
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33 #define PIC_GRAPHIC 19
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34
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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35 #endif