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comparison src/spinlock.c @ 35:ad1d3b268e2d

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update
author mir3636
date Fri, 22 Feb 2019 16:32:51 +0900
parents 83c23a36980d
children fb3e5a2f76c1
comparison
equal deleted inserted replaced
34:a7144583914c 35:ad1d3b268e2d
44 getcallerpcs(get_fp(), lk->pcs); 44 getcallerpcs(get_fp(), lk->pcs);
45 45
46 #endif 46 #endif
47 } 47 }
48 48
49 void cbc_acquire(struct spinlock *lk, __code (*next)(int ret))
50 {
51 pushcli(); // disable interrupts to avoid deadlock.
52 lk->locked = 1; // set the lock status to make the kernel happy
53
54 #if 0
55 if(holding(lk))
56 panic("acquire");
57
58 // The xchg is atomic.
59 // It also serializes, so that reads after acquire are not
60 // reordered before it.
61 while(xchg(&lk->locked, 1) != 0)
62 ;
63
64 // Record info about lock acquisition for debugging.
65 lk->cpu = cpu;
66 getcallerpcs(get_fp(), lk->pcs);
67
68 #endif
69 goto next();
70 }
71
49 // Release the lock. 72 // Release the lock.
73 void cbc_release(struct spinlock *lk, __code (*next)(int ret))
74 {
75 #if 0
76 if(!holding(lk))
77 panic("release");
78
79 lk->pcs[0] = 0;
80 lk->cpu = 0;
81
82 // The xchg serializes, so that reads before release are
83 // not reordered after it. The 1996 PentiumPro manual (Volume 3,
84 // 7.2) says reads can be carried out speculatively and in
85 // any order, which implies we need to serialize here.
86 // But the 2007 Intel 64 Architecture Memory Ordering White
87 // Paper says that Intel 64 and IA-32 will not move a load
88 // after a store. So lock->locked = 0 would work here.
89 // The xchg being asm volatile ensures gcc emits it after
90 // the above assignments (and after the critical section).
91 xchg(&lk->locked, 0);
92 #endif
93
94 lk->locked = 0; // set the lock state to keep the kernel happy
95 popcli();
96 goto next();
97 }
98
50 void release(struct spinlock *lk) 99 void release(struct spinlock *lk)
51 { 100 {
52 #if 0 101 #if 0
53 if(!holding(lk)) 102 if(!holding(lk))
54 panic("release"); 103 panic("release");