--- a/TaskManager/Cell/spe/CellDmaManager.cc	Wed Feb 27 11:14:20 2008 +0900
+++ b/TaskManager/Cell/spe/CellDmaManager.cc	Wed Feb 27 17:16:29 2008 +0900
@@ -1,19 +1,22 @@
 #include <stdio.h>
-#include <spu_mfcio.h>
+#include <stdlib.h>
+#include <malloc.h>
 #include "CellDmaManager.h"
 
 void
-CellDmaManager::dma_load(void *buf, unsigned int addr, int size, int mask)
+CellDmaManager::dma_load(void *buf, uint32 addr, uint32 size, uint32 mask)
 {
-    if (buf == NULL || (void*)addr == NULL) return;
+    //if (buf == NULL || (void*)addr == NULL) return;
+    if (size == 0) return ;
     spu_mfcdma32(buf, addr, ROUND_UP_ALIGN(size, DEFAULT_ALIGNMENT),
 		 mask, MFC_GET_CMD);
 }
 
 void
-CellDmaManager::dma_store(void *buf, unsigned int addr, int size, int mask)
+CellDmaManager::dma_store(void *buf, uint32 addr, uint32 size, uint32 mask)
 {
-    if (buf == NULL || (void*)addr == NULL) return;
+    //if (buf == NULL || (void*)addr == NULL) return;
+    if (size == 0) return ;
     spu_mfcdma32(buf, addr, ROUND_UP_ALIGN(size, DEFAULT_ALIGNMENT),
 		 mask, MFC_PUT_CMD);
 }
@@ -22,14 +25,14 @@
  * mask で設定した DMA 転送の完了を待つ
  */
 void
-CellDmaManager::dma_wait(int mask)
+CellDmaManager::dma_wait(uint32 mask)
 {
     spu_writech(MFC_WrTagMask, 1 << mask);
     spu_mfcstat(MFC_TAG_UPDATE_ALL);
 }
 
 void
-CellDmaManager::mail_write(unsigned int data)
+CellDmaManager::mail_write(uint32 data)
 {
     spu_writech(SPU_WrOutMbox, data);
 }
@@ -39,3 +42,65 @@
 {
     return spu_readch(SPU_RdInMbox);
 }
+
+void
+CellDmaManager::dmaList_set(uint32 _address, uint32 _size)
+{
+    int *index = &buff_index[buff_flag];
+    DmaListPtr queue = &dmaQueue[buff_flag][(*index)++];
+
+    queue->addr = _address;
+    queue->size = ROUND_UP_ALIGN(_size, DEFAULT_ALIGNMENT);
+}
+
+void**
+CellDmaManager::dmaList_load(uint32 mask)
+{
+    int index = buff_index[buff_flag];
+    DmaListPtr queue = dmaQueue[buff_flag];
+    mfc_list_element_t *mfc_list = mfcList[buff_flag];
+
+    void **buffList;
+    void *buff;
+    int bound;
+    int total_size = 0;
+
+    mfc_list = (mfc_list_element_t *)malloc(sizeof(mfc_list_element_t)*index);
+
+    for (int i = 0; i < index; i++) {
+	mfc_list[i].notify   = 0;
+	mfc_list[i].reserved = 0;
+	mfc_list[i].size     = queue[i].size;
+	mfc_list[i].eal      = queue[i].addr;
+	total_size += queue[i].size;
+    }
+
+    //----------------------------------------------------------------
+    // list element が n 個ある場合の buff, buffList の構造
+    //
+    //       +---------------+---------------+--------+-----------------+
+    // buff  | queue[0].size | queue[1].size | ...... | queue[n-1].size |
+    //       +---------------+---------------+--------+-----------------+
+    //       ^               ^               ^        ^
+    //       |               |               |        |
+    //      buffList[0]   buffList[1]    buffList[2] buffList[n-1]
+    //----------------------------------------------------------------
+
+    buff = memalign(DEFAULT_ALIGNMENT, total_size);
+    buffList = (void**)malloc(index);
+
+    bound = (int)buff;
+    buffList[0] = (void*)bound;
+    for (int i = 1; i < index; i++) {
+	bound += queue[i-1].size;
+	buffList[i] = (void*)bound;
+    }
+
+    mfc_getl(buff, 0, mfc_list, sizeof(mfc_list_element_t), mask, 0, 0);
+    dma_wait(mask);
+
+    _buffList[buff_flag] = buffList;
+    _buff[buff_flag] = buff;
+
+    return buffList;
+}