annotate os9/level2/clock.asm @ 54:fc10b7ae23d0

clock level2 worked
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Sun, 22 Jul 2018 19:41:06 +0900
parents fe88cea67ef0
children 8d151f303bee
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
7
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1 ********************************************************************
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
2 * Clock - OS-9 Level One V2 Clock module
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
3 *
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
4 * $Id: clock.asm,v 1.1.1.1 2001/02/21 23:30:52 boisy Exp $
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
5 *
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
6 * NOTE: This clock is TOTALLY VALID for ALL DATES between 1900-2155
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
7 *
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
8 * Ed. Comments Who YY/MM/DD
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
9 * ------------------------------------------------------------------
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
10 * 5 Tandy/Microware original version
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
11 * 6 Modified to handle leap years properly for BGP 99/05/03
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
12 * 1900 and 2100 A.D.
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
13
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
14 nam Clock
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
15 ttl OS-9 Level One V2 Clock module
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
16
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
17 ifp1
11
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 7
diff changeset
18 use defsfile
7
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
19 endc
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
20
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
21 tylg set Systm+Objct
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
22 atrv set ReEnt+rev
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
23 rev set $01
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
24 edition set $06
53
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
25 TimerPort set $ffb0
7
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
26
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
27 mod eom,name,tylg,atrv,ClkEnt,size
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
28
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
29 size equ .
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
30
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
31 name fcs /Clock/
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
32 fcb edition
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
33
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
34 SysTbl fcb F$Time
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
35 fdb FTime-*-2
53
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
36 fcb F$STime
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
37 fdb FSTime-*-2
7
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
38 fcb $80
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
39
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
40
53
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
41 ClockIRQ ldx #TimerPort
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
42 lda ,x
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
43 bita #$10
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
44 beq L00AE
54
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
45 L00AE leax ClockIRQ1,pcr
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
46 stx <D.SvcIRQ
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
47 jmp [D.XIRQ] Chain through Kernel to continue IRQ handling
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
48 ClockIRQ1
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
49 inc <D.Sec go up one second
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
50 lda <D.Sec grab current second
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
51 cmpa #60 End of minute?
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
52 blo VIRQend No, skip time update and alarm check
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
53 clr <D.Sec Reset second count to zero
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
54 VIRQend
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
55 ldx #TimerPort
53
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
56 lda #$8f
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
57 sta >TimerPort
54
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
58 jmp [>D.Clock]
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
59
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
60 TkPerTS equ 2
7
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
61
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
62 ClkEnt equ *
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
63 pshs cc
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
64 orcc #FIRQMask+IRQMask mask ints
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
65 leax >ClockIRQ,pcr
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
66 stx <D.IRQ
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
67 * install system calls
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
68 leay >SysTbl,pcr
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
69 os9 F$SSvc
54
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
70 ldd #59*256+TkPerTS last second and time slice in minute
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
71 std <D.Sec Will prompt RTC read at next time slice
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
72 stb <D.TSlice set ticks per time slice
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
73 stb <D.Slice set first time slice
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
74 lda #TkPerSec Reset to start of second
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
75 sta <D.Tick
fc10b7ae23d0 clock level2 worked
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 53
diff changeset
76
7
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
77 ldx #TimerPort
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
78 ldb #$8f start timer
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
79 stb ,x
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
80 puls pc,cc
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
81
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
82 * F$Time system call code
53
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
83 FTime ldx #TimerPort
7
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
84 ldb #$04
53
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
85 stb ,x
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
86 leax 1,x Address of system time packet
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
87 RetTime ldy <D.Proc Get pointer to current proc descriptor
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
88 ldb P$Task,y Process Task number
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
89 lda <D.SysTsk From System Task
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
90 ldu R$X,u
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
91 STime.Mv ldy #6 Move 6 bytes
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
92 FMove os9 F$Move
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
93 rts
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
94
fe88cea67ef0 clock interrupt
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 11
diff changeset
95 FSTime clrb
7
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
96 rts
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
97
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
98 emod
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
99 eom equ *
a6db579d8c11 level 2 rom preparing...
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
diff changeset
100 end