#ifndef REGISTERS
#define REGISTERS

typedef struct _cr3_t {
    UINT64 ignored1:3;
    UINT64 pwt:1; /* page-level write through */
    UINT64 pcd:1; /* page-level cache disable */
    UINT64 ignored2:7; 
    UINT64 pdb:40; /* page directory base */
    UINT64 reserved :12;
} cr3_t;
#define PHYADDR_WIDTH 127

typedef struct _cr4_t {
    UINT64 vme:1;
    UINT64 pvi:1;
    UINT64 tsd:1;
    UINT64 de:1;
    UINT64 pse:1; // page size extensions
    UINT64 pae:1; // physical address extension
    UINT64 mce:1;
    UINT64 pge:1;
    UINT64 pce:1;
    UINT64 osfxsr:1;
    UINT64 osxmmexcept:1;
    UINT64 ignored2 :2;
    UINT64 vmxe: 1;
    UINT64 smxe: 1;
    UINT64 ignored3: 1;
    UINT64 fsgsbase: 1;
    UINT64 pcide: 1;
    UINT64 osxsave: 1;
    UINT64 ignored4: 1;
    UINT64 smep: 1;
    UINT64 reserved:43;
} cr4_t;

typedef struct _cr0_t {
    UINT64 pe :1;
    UINT64 mp :1;
    UINT64 em :1;
    UINT64 ts :1;
    UINT64 et :1;
    UINT64 ne :1;
    UINT64 ignored1 :10;
    UINT64 wp :1;
    UINT64 ignored2 :1;
    UINT64 am :1;
    UINT64 ignored3 :10;
    UINT64 nw :1;
    UINT64 cd :1;
    UINT64 pg :1; /* pageing */
} cr0_t;

typedef struct _efer_t {
    UINT64 syscall_enable :1;
    UINT64 reserved1:7;
    UINT64 ia32e_enable :1;
    UINT64 reserved2 :1;
    UINT64 ia32e_active :1;
    UINT64 edb_enable :1;
    UINT64 reserved3 :52;
} efer_t;


#endif /* REGISTERS */