diff src/obj_dump_clang @ 0:53676d1f5817 default tip

firsh commit
author tobaru
date Sun, 04 Feb 2018 17:54:49 +0900
parents
children
line wrap: on
line diff
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/obj_dump_clang	Sun Feb 04 17:54:49 2018 +0900
@@ -0,0 +1,335 @@
+
+build/start.o:     file format elf32-littlearm
+
+
+Disassembly of section .text:
+
+00000000 <_uart_putc>:
+   0:	e24dd00c 	sub	sp, sp, #12
+   4:	e1a01000 	mov	r1, r0
+   8:	e58d0008 	str	r0, [sp, #8]
+   c:	e59f0018 	ldr	r0, [pc, #24]	; 2c <_uart_putc+0x2c>
+  10:	e58d0004 	str	r0, [sp, #4]
+  14:	e59d0008 	ldr	r0, [sp, #8]
+  18:	e59d2004 	ldr	r2, [sp, #4]
+  1c:	e5c20000 	strb	r0, [r2]
+  20:	e58d1000 	str	r1, [sp]
+  24:	e28dd00c 	add	sp, sp, #12
+  28:	e12fff1e 	bx	lr
+  2c:	101f1000 	.word	0x101f1000
+
+00000030 <_puts>:
+  30:	e92d4800 	push	{fp, lr}
+  34:	e1a0b00d 	mov	fp, sp
+  38:	e24dd008 	sub	sp, sp, #8
+  3c:	e1a01000 	mov	r1, r0
+  40:	e58d0004 	str	r0, [sp, #4]
+  44:	e58d1000 	str	r1, [sp]
+  48:	eaffffff 	b	4c <_puts+0x1c>
+  4c:	e59d0004 	ldr	r0, [sp, #4]
+  50:	e5d00000 	ldrb	r0, [r0]
+  54:	e3500000 	cmp	r0, #0
+  58:	0a000007 	beq	7c <_puts+0x4c>
+  5c:	eaffffff 	b	60 <_puts+0x30>
+  60:	e59d0004 	ldr	r0, [sp, #4]
+  64:	e5d00000 	ldrb	r0, [r0]
+  68:	ebfffffe 	bl	0 <_uart_putc>
+  6c:	e59d0004 	ldr	r0, [sp, #4]
+  70:	e2800001 	add	r0, r0, #1
+  74:	e58d0004 	str	r0, [sp, #4]
+  78:	eafffff3 	b	4c <_puts+0x1c>
+  7c:	e1a0d00b 	mov	sp, fp
+  80:	e8bd8800 	pop	{fp, pc}
+
+00000084 <_putint>:
+  84:	e92d4800 	push	{fp, lr}
+  88:	e1a0b00d 	mov	fp, sp
+  8c:	e24dd020 	sub	sp, sp, #32
+  90:	e1a03002 	mov	r3, r2
+  94:	e1a0c001 	mov	ip, r1
+  98:	e1a0e000 	mov	lr, r0
+  9c:	e50b0004 	str	r0, [fp, #-4]
+  a0:	e50b1008 	str	r1, [fp, #-8]
+  a4:	e50b200c 	str	r2, [fp, #-12]
+  a8:	e59f0098 	ldr	r0, [pc, #152]	; 148 <_putint+0xc4>
+  ac:	e58d0010 	str	r0, [sp, #16]
+  b0:	e51b0004 	ldr	r0, [fp, #-4]
+  b4:	e3500000 	cmp	r0, #0
+  b8:	e58d3008 	str	r3, [sp, #8]
+  bc:	e58dc004 	str	ip, [sp, #4]
+  c0:	e58de000 	str	lr, [sp]
+  c4:	0a000003 	beq	d8 <_putint+0x54>
+  c8:	eaffffff 	b	cc <_putint+0x48>
+  cc:	e51b0004 	ldr	r0, [fp, #-4]
+  d0:	ebfffffe 	bl	30 <_puts>
+  d4:	eaffffff 	b	d8 <_putint+0x54>
+  d8:	e3a0001c 	mov	r0, #28
+  dc:	e58d000c 	str	r0, [sp, #12]
+  e0:	eaffffff 	b	e4 <_putint+0x60>
+  e4:	e59d000c 	ldr	r0, [sp, #12]
+  e8:	e3500000 	cmp	r0, #0
+  ec:	ba00000c 	blt	124 <_putint+0xa0>
+  f0:	eaffffff 	b	f4 <_putint+0x70>
+  f4:	e59d0010 	ldr	r0, [sp, #16]
+  f8:	e51b1008 	ldr	r1, [fp, #-8]
+  fc:	e59d200c 	ldr	r2, [sp, #12]
+ 100:	e3a0300f 	mov	r3, #15
+ 104:	e0031231 	and	r1, r3, r1, lsr r2
+ 108:	e7d00001 	ldrb	r0, [r0, r1]
+ 10c:	ebfffffe 	bl	0 <_uart_putc>
+ 110:	eaffffff 	b	114 <_putint+0x90>
+ 114:	e59d000c 	ldr	r0, [sp, #12]
+ 118:	e2400004 	sub	r0, r0, #4
+ 11c:	e58d000c 	str	r0, [sp, #12]
+ 120:	eaffffef 	b	e4 <_putint+0x60>
+ 124:	e51b000c 	ldr	r0, [fp, #-12]
+ 128:	e3500000 	cmp	r0, #0
+ 12c:	0a000003 	beq	140 <_putint+0xbc>
+ 130:	eaffffff 	b	134 <_putint+0xb0>
+ 134:	e51b000c 	ldr	r0, [fp, #-12]
+ 138:	ebfffffe 	bl	30 <_puts>
+ 13c:	eaffffff 	b	140 <_putint+0xbc>
+ 140:	e1a0d00b 	mov	sp, fp
+ 144:	e8bd8800 	pop	{fp, pc}
+ 148:	00000000 	.word	0x00000000
+
+0000014c <get_pde>:
+ 14c:	e24dd008 	sub	sp, sp, #8
+ 150:	e1a01000 	mov	r1, r0
+ 154:	e58d0004 	str	r0, [sp, #4]
+ 158:	e59d0004 	ldr	r0, [sp, #4]
+ 15c:	e1a00a20 	lsr	r0, r0, #20
+ 160:	e58d0004 	str	r0, [sp, #4]
+ 164:	e59f0014 	ldr	r0, [pc, #20]	; 180 <get_pde+0x34>
+ 168:	e5900000 	ldr	r0, [r0]
+ 16c:	e59d2004 	ldr	r2, [sp, #4]
+ 170:	e7900102 	ldr	r0, [r0, r2, lsl #2]
+ 174:	e58d1000 	str	r1, [sp]
+ 178:	e28dd008 	add	sp, sp, #8
+ 17c:	e12fff1e 	bx	lr
+ 180:	00000000 	.word	0x00000000
+
+00000184 <set_bootpgtbl>:
+ 184:	e92d4830 	push	{r4, r5, fp, lr}
+ 188:	e28db008 	add	fp, sp, #8
+ 18c:	e24dd028 	sub	sp, sp, #40	; 0x28
+ 190:	e1a0c003 	mov	ip, r3
+ 194:	e1a0e002 	mov	lr, r2
+ 198:	e1a04001 	mov	r4, r1
+ 19c:	e1a05000 	mov	r5, r0
+ 1a0:	e50b000c 	str	r0, [fp, #-12]
+ 1a4:	e50b1010 	str	r1, [fp, #-16]
+ 1a8:	e50b2014 	str	r2, [fp, #-20]	; 0xffffffec
+ 1ac:	e58d3018 	str	r3, [sp, #24]
+ 1b0:	e51b000c 	ldr	r0, [fp, #-12]
+ 1b4:	e1a00a20 	lsr	r0, r0, #20
+ 1b8:	e50b000c 	str	r0, [fp, #-12]
+ 1bc:	e51b0010 	ldr	r0, [fp, #-16]
+ 1c0:	e1a00a20 	lsr	r0, r0, #20
+ 1c4:	e50b0010 	str	r0, [fp, #-16]
+ 1c8:	e51b0014 	ldr	r0, [fp, #-20]	; 0xffffffec
+ 1cc:	e1a00a20 	lsr	r0, r0, #20
+ 1d0:	e50b0014 	str	r0, [fp, #-20]	; 0xffffffec
+ 1d4:	e3a00000 	mov	r0, #0
+ 1d8:	e58d0010 	str	r0, [sp, #16]
+ 1dc:	e58dc00c 	str	ip, [sp, #12]
+ 1e0:	e58de008 	str	lr, [sp, #8]
+ 1e4:	e58d4004 	str	r4, [sp, #4]
+ 1e8:	e58d5000 	str	r5, [sp]
+ 1ec:	eaffffff 	b	1f0 <set_bootpgtbl+0x6c>
+ 1f0:	e59d0010 	ldr	r0, [sp, #16]
+ 1f4:	e51b1014 	ldr	r1, [fp, #-20]	; 0xffffffec
+ 1f8:	e1500001 	cmp	r0, r1
+ 1fc:	2a00002e 	bcs	2bc <set_bootpgtbl+0x138>
+ 200:	eaffffff 	b	204 <set_bootpgtbl+0x80>
+ 204:	e51b0010 	ldr	r0, [fp, #-16]
+ 208:	e1a00a00 	lsl	r0, r0, #20
+ 20c:	e58d0014 	str	r0, [sp, #20]
+ 210:	e59d0018 	ldr	r0, [sp, #24]
+ 214:	e3500000 	cmp	r0, #0
+ 218:	1a000006 	bne	238 <set_bootpgtbl+0xb4>
+ 21c:	eaffffff 	b	220 <set_bootpgtbl+0x9c>
+ 220:	e59d0014 	ldr	r0, [sp, #20]
+ 224:	e3a0100e 	mov	r1, #14
+ 228:	e3811b01 	orr	r1, r1, #1024	; 0x400
+ 22c:	e1800001 	orr	r0, r0, r1
+ 230:	e58d0014 	str	r0, [sp, #20]
+ 234:	ea000005 	b	250 <set_bootpgtbl+0xcc>
+ 238:	e59d0014 	ldr	r0, [sp, #20]
+ 23c:	e3a01002 	mov	r1, #2
+ 240:	e3811b01 	orr	r1, r1, #1024	; 0x400
+ 244:	e1800001 	orr	r0, r0, r1
+ 248:	e58d0014 	str	r0, [sp, #20]
+ 24c:	eaffffff 	b	250 <set_bootpgtbl+0xcc>
+ 250:	e51b000c 	ldr	r0, [fp, #-12]
+ 254:	e35000ff 	cmp	r0, #255	; 0xff
+ 258:	8a000006 	bhi	278 <set_bootpgtbl+0xf4>
+ 25c:	eaffffff 	b	260 <set_bootpgtbl+0xdc>
+ 260:	e59d0014 	ldr	r0, [sp, #20]
+ 264:	e59f105c 	ldr	r1, [pc, #92]	; 2c8 <set_bootpgtbl+0x144>
+ 268:	e5911000 	ldr	r1, [r1]
+ 26c:	e51b200c 	ldr	r2, [fp, #-12]
+ 270:	e7810102 	str	r0, [r1, r2, lsl #2]
+ 274:	ea000005 	b	290 <set_bootpgtbl+0x10c>
+ 278:	e59d0014 	ldr	r0, [sp, #20]
+ 27c:	e59f1040 	ldr	r1, [pc, #64]	; 2c4 <set_bootpgtbl+0x140>
+ 280:	e5911000 	ldr	r1, [r1]
+ 284:	e51b200c 	ldr	r2, [fp, #-12]
+ 288:	e7810102 	str	r0, [r1, r2, lsl #2]
+ 28c:	eaffffff 	b	290 <set_bootpgtbl+0x10c>
+ 290:	e51b000c 	ldr	r0, [fp, #-12]
+ 294:	e2800001 	add	r0, r0, #1
+ 298:	e50b000c 	str	r0, [fp, #-12]
+ 29c:	e51b0010 	ldr	r0, [fp, #-16]
+ 2a0:	e2800001 	add	r0, r0, #1
+ 2a4:	e50b0010 	str	r0, [fp, #-16]
+ 2a8:	eaffffff 	b	2ac <set_bootpgtbl+0x128>
+ 2ac:	e59d0010 	ldr	r0, [sp, #16]
+ 2b0:	e2800001 	add	r0, r0, #1
+ 2b4:	e58d0010 	str	r0, [sp, #16]
+ 2b8:	eaffffcc 	b	1f0 <set_bootpgtbl+0x6c>
+ 2bc:	e24bd008 	sub	sp, fp, #8
+ 2c0:	e8bd8830 	pop	{r4, r5, fp, pc}
+	...
+
+000002cc <load_pgtlb>:
+ 2cc:	e92d4800 	push	{fp, lr}
+ 2d0:	e1a0b00d 	mov	fp, sp
+ 2d4:	e24dd020 	sub	sp, sp, #32
+ 2d8:	e1a02001 	mov	r2, r1
+ 2dc:	e1a03000 	mov	r3, r0
+ 2e0:	e50b0004 	str	r0, [fp, #-4]
+ 2e4:	e50b1008 	str	r1, [fp, #-8]
+ 2e8:	ee100f10 	mrc	15, 0, r0, cr0, cr0, {0}
+ 2ec:	e50b000c 	str	r0, [fp, #-12]
+ 2f0:	e55b0009 	ldrb	r0, [fp, #-9]
+ 2f4:	e3500041 	cmp	r0, #65	; 0x41
+ 2f8:	e58d2008 	str	r2, [sp, #8]
+ 2fc:	e58d3004 	str	r3, [sp, #4]
+ 300:	1a000001 	bne	30c <load_pgtlb+0x40>
+ 304:	eaffffff 	b	308 <load_pgtlb+0x3c>
+ 308:	eaffffff 	b	30c <load_pgtlb+0x40>
+ 30c:	e15b00ba 	ldrh	r0, [fp, #-10]
+ 310:	e200000f 	and	r0, r0, #15
+ 314:	e54b000d 	strb	r0, [fp, #-13]
+ 318:	e55b000d 	ldrb	r0, [fp, #-13]
+ 31c:	e3500007 	cmp	r0, #7
+ 320:	0a000007 	beq	344 <load_pgtlb+0x78>
+ 324:	eaffffff 	b	328 <load_pgtlb+0x5c>
+ 328:	e55b000d 	ldrb	r0, [fp, #-13]
+ 32c:	e350000f 	cmp	r0, #15
+ 330:	0a000003 	beq	344 <load_pgtlb+0x78>
+ 334:	eaffffff 	b	338 <load_pgtlb+0x6c>
+ 338:	e59f0074 	ldr	r0, [pc, #116]	; 3b4 <load_pgtlb+0xe8>
+ 33c:	ebfffffe 	bl	30 <_puts>
+ 340:	eaffffff 	b	344 <load_pgtlb+0x78>
+ 344:	e59f006c 	ldr	r0, [pc, #108]	; 3b8 <load_pgtlb+0xec>
+ 348:	e58d000c 	str	r0, [sp, #12]
+ 34c:	e59d000c 	ldr	r0, [sp, #12]
+ 350:	ee030f10 	mcr	15, 0, r0, cr3, cr0, {0}
+ 354:	e3a00004 	mov	r0, #4
+ 358:	e58d000c 	str	r0, [sp, #12]
+ 35c:	e59d000c 	ldr	r0, [sp, #12]
+ 360:	ee020f50 	mcr	15, 0, r0, cr2, cr0, {2}
+ 364:	e59f0050 	ldr	r0, [pc, #80]	; 3bc <load_pgtlb+0xf0>
+ 368:	e5900000 	ldr	r0, [r0]
+ 36c:	e58d000c 	str	r0, [sp, #12]
+ 370:	e59d000c 	ldr	r0, [sp, #12]
+ 374:	ee020f30 	mcr	15, 0, r0, cr2, cr0, {1}
+ 378:	e51b0008 	ldr	r0, [fp, #-8]
+ 37c:	e58d000c 	str	r0, [sp, #12]
+ 380:	e59d000c 	ldr	r0, [sp, #12]
+ 384:	ee020f10 	mcr	15, 0, r0, cr2, cr0, {0}
+ 388:	ee110f10 	mrc	15, 0, r0, cr1, cr0, {0}
+ 38c:	e58d000c 	str	r0, [sp, #12]
+ 390:	e59d000c 	ldr	r0, [sp, #12]
+ 394:	e59f1024 	ldr	r1, [pc, #36]	; 3c0 <load_pgtlb+0xf4>
+ 398:	e1800001 	orr	r0, r0, r1
+ 39c:	e58d000c 	str	r0, [sp, #12]
+ 3a0:	e59d000c 	ldr	r0, [sp, #12]
+ 3a4:	ee010f10 	mcr	15, 0, r0, cr1, cr0, {0}
+ 3a8:	ebfffffe 	bl	3c4 <_flush_all>
+ 3ac:	e1a0d00b 	mov	sp, fp
+ 3b0:	e8bd8800 	pop	{fp, pc}
+ 3b4:	00000000 	.word	0x00000000
+ 3b8:	55555555 	.word	0x55555555
+ 3bc:	00000000 	.word	0x00000000
+ 3c0:	0080300d 	.word	0x0080300d
+
+000003c4 <_flush_all>:
+ 3c4:	e24dd004 	sub	sp, sp, #4
+ 3c8:	e3a00000 	mov	r0, #0
+ 3cc:	e58d0000 	str	r0, [sp]
+ 3d0:	e59d0000 	ldr	r0, [sp]
+ 3d4:	ee080f17 	mcr	15, 0, r0, cr8, cr7, {0}
+ 3d8:	e28dd004 	add	sp, sp, #4
+ 3dc:	e12fff1e 	bx	lr
+
+000003e0 <clear_bss>:
+ 3e0:	e92d4800 	push	{fp, lr}
+ 3e4:	e1a0b00d 	mov	fp, sp
+ 3e8:	e24dd008 	sub	sp, sp, #8
+ 3ec:	e59f0018 	ldr	r0, [pc, #24]	; 40c <clear_bss+0x2c>
+ 3f0:	e59f1018 	ldr	r1, [pc, #24]	; 410 <clear_bss+0x30>
+ 3f4:	e0412000 	sub	r2, r1, r0
+ 3f8:	e3a01000 	mov	r1, #0
+ 3fc:	ebfffffe 	bl	0 <memset>
+ 400:	e58d0004 	str	r0, [sp, #4]
+ 404:	e1a0d00b 	mov	sp, fp
+ 408:	e8bd8800 	pop	{fp, pc}
+	...
+
+00000414 <start>:
+ 414:	e92d4800 	push	{fp, lr}
+ 418:	e1a0b00d 	mov	fp, sp
+ 41c:	e24dd010 	sub	sp, sp, #16
+ 420:	e59f00bc 	ldr	r0, [pc, #188]	; 4e4 <start+0xd0>
+ 424:	ebfffffe 	bl	30 <_puts>
+ 428:	e3a00601 	mov	r0, #1048576	; 0x100000
+ 42c:	e3a0e000 	mov	lr, #0
+ 430:	e58d0008 	str	r0, [sp, #8]
+ 434:	e1a0000e 	mov	r0, lr
+ 438:	e1a0100e 	mov	r1, lr
+ 43c:	e59d2008 	ldr	r2, [sp, #8]
+ 440:	e1a0300e 	mov	r3, lr
+ 444:	e58de004 	str	lr, [sp, #4]
+ 448:	ebfffffe 	bl	184 <set_bootpgtbl>
+ 44c:	e3a00102 	mov	r0, #-2147483648	; 0x80000000
+ 450:	e59d1004 	ldr	r1, [sp, #4]
+ 454:	e59d2008 	ldr	r2, [sp, #8]
+ 458:	e59d3004 	ldr	r3, [sp, #4]
+ 45c:	ebfffffe 	bl	184 <set_bootpgtbl>
+ 460:	e3a0080f 	mov	r0, #983040	; 0xf0000
+ 464:	e3800102 	orr	r0, r0, #-2147483648	; 0x80000000
+ 468:	e50b0004 	str	r0, [fp, #-4]
+ 46c:	e51b0004 	ldr	r0, [fp, #-4]
+ 470:	e59f1070 	ldr	r1, [pc, #112]	; 4e8 <start+0xd4>
+ 474:	e1500001 	cmp	r0, r1
+ 478:	8a000003 	bhi	48c <start+0x78>
+ 47c:	eaffffff 	b	480 <start+0x6c>
+ 480:	e59f0064 	ldr	r0, [pc, #100]	; 4ec <start+0xd8>
+ 484:	ebfffffe 	bl	0 <cprintf>
+ 488:	eaffffff 	b	48c <start+0x78>
+ 48c:	e3a008ff 	mov	r0, #16711680	; 0xff0000
+ 490:	e38004ff 	orr	r0, r0, #-16777216	; 0xff000000
+ 494:	e3a02601 	mov	r2, #1048576	; 0x100000
+ 498:	e3a01000 	mov	r1, #0
+ 49c:	e58d1000 	str	r1, [sp]
+ 4a0:	e59d3000 	ldr	r3, [sp]
+ 4a4:	ebfffffe 	bl	184 <set_bootpgtbl>
+ 4a8:	e3a00209 	mov	r0, #-1879048192	; 0x90000000
+ 4ac:	e3a01201 	mov	r1, #268435456	; 0x10000000
+ 4b0:	e3a02302 	mov	r2, #134217728	; 0x8000000
+ 4b4:	e3a03001 	mov	r3, #1
+ 4b8:	ebfffffe 	bl	184 <set_bootpgtbl>
+ 4bc:	e59f002c 	ldr	r0, [pc, #44]	; 4f0 <start+0xdc>
+ 4c0:	e5900000 	ldr	r0, [r0]
+ 4c4:	e59f1028 	ldr	r1, [pc, #40]	; 4f4 <start+0xe0>
+ 4c8:	e5911000 	ldr	r1, [r1]
+ 4cc:	ebfffffe 	bl	2cc <load_pgtlb>
+ 4d0:	ebfffffe 	bl	0 <jump_stack>
+ 4d4:	ebfffffe 	bl	3e0 <clear_bss>
+ 4d8:	ebfffffe 	bl	0 <kmain>
+ 4dc:	e1a0d00b 	mov	sp, fp
+ 4e0:	e8bd8800 	pop	{fp, pc}
+	...