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1 ; Machine description for AArch64 architecture.
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2 ; Copyright (C) 2009-2017 Free Software Foundation, Inc.
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3 ; Contributed by ARM Ltd.
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4 ;
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5 ; This file is part of GCC.
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6 ;
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7 ; GCC is free software; you can redistribute it and/or modify it
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8 ; under the terms of the GNU General Public License as published by
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9 ; the Free Software Foundation; either version 3, or (at your option)
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10 ; any later version.
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11 ;
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12 ; GCC is distributed in the hope that it will be useful, but
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13 ; WITHOUT ANY WARRANTY; without even the implied warranty of
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14 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 ; General Public License for more details.
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16 ;
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17 ; You should have received a copy of the GNU General Public License
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18 ; along with GCC; see the file COPYING3. If not see
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19 ; <http://www.gnu.org/licenses/>.
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20
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21 HeaderInclude
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22 config/aarch64/aarch64-opts.h
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23
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24 TargetVariable
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25 enum aarch64_processor explicit_tune_core = aarch64_none
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26
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27 TargetVariable
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28 enum aarch64_arch explicit_arch = aarch64_no_arch
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29
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30 TargetSave
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31 const char *x_aarch64_override_tune_string
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32
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33 TargetVariable
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34 unsigned long aarch64_isa_flags = 0
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35
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36 ; The TLS dialect names to use with -mtls-dialect.
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37
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38 Enum
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39 Name(tls_type) Type(enum aarch64_tls_type)
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40 The possible TLS dialects:
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41
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42 EnumValue
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43 Enum(tls_type) String(trad) Value(TLS_TRADITIONAL)
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44
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45 EnumValue
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46 Enum(tls_type) String(desc) Value(TLS_DESCRIPTORS)
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47
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48 ; The code model option names for -mcmodel.
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49
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50 Enum
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51 Name(cmodel) Type(enum aarch64_code_model)
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52 The code model option names for -mcmodel:
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53
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54 EnumValue
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55 Enum(cmodel) String(tiny) Value(AARCH64_CMODEL_TINY)
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56
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57 EnumValue
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58 Enum(cmodel) String(small) Value(AARCH64_CMODEL_SMALL)
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59
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60 EnumValue
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61 Enum(cmodel) String(large) Value(AARCH64_CMODEL_LARGE)
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62
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63 mbig-endian
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64 Target Report RejectNegative Mask(BIG_END)
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65 Assume target CPU is configured as big endian.
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66
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67 mgeneral-regs-only
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68 Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save
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69 Generate code which uses only the general registers.
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70
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71 mfix-cortex-a53-835769
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72 Target Report Var(aarch64_fix_a53_err835769) Init(2) Save
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73 Workaround for ARM Cortex-A53 Erratum number 835769.
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74
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75 mfix-cortex-a53-843419
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76 Target Report Var(aarch64_fix_a53_err843419) Init(2) Save
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77 Workaround for ARM Cortex-A53 Erratum number 843419.
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78
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79 mlittle-endian
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80 Target Report RejectNegative InverseMask(BIG_END)
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81 Assume target CPU is configured as little endian.
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82
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83 mcmodel=
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84 Target RejectNegative Joined Enum(cmodel) Var(aarch64_cmodel_var) Init(AARCH64_CMODEL_SMALL) Save
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85 Specify the code model.
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86
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87 mstrict-align
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88 Target Report RejectNegative Mask(STRICT_ALIGN) Save
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89 Don't assume that unaligned accesses are handled by the system.
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90
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91 momit-leaf-frame-pointer
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92 Target Report Var(flag_omit_leaf_frame_pointer) Init(2) Save
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93 Omit the frame pointer in leaf functions.
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94
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95 mtls-dialect=
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96 Target RejectNegative Joined Enum(tls_type) Var(aarch64_tls_dialect) Init(TLS_DESCRIPTORS) Save
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97 Specify TLS dialect.
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98
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99 mtls-size=
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100 Target RejectNegative Joined Var(aarch64_tls_size) Enum(aarch64_tls_size)
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101 Specifies bit size of immediate TLS offsets. Valid values are 12, 24, 32, 48.
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102
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103 Enum
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104 Name(aarch64_tls_size) Type(int)
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105
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106 EnumValue
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107 Enum(aarch64_tls_size) String(12) Value(12)
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108
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109 EnumValue
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110 Enum(aarch64_tls_size) String(24) Value(24)
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111
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112 EnumValue
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113 Enum(aarch64_tls_size) String(32) Value(32)
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114
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115 EnumValue
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116 Enum(aarch64_tls_size) String(48) Value(48)
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117
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118 march=
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119 Target RejectNegative ToLower Joined Var(aarch64_arch_string)
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120 -march=ARCH Use features of architecture ARCH.
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121
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122 mcpu=
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123 Target RejectNegative ToLower Joined Var(aarch64_cpu_string)
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124 -mcpu=CPU Use features of and optimize for CPU.
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125
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126 mtune=
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127 Target RejectNegative ToLower Joined Var(aarch64_tune_string)
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128 -mtune=CPU Optimize for CPU.
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129
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130 mabi=
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131 Target RejectNegative Joined Enum(aarch64_abi) Var(aarch64_abi) Init(AARCH64_ABI_DEFAULT)
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132 -mabi=ABI Generate code that conforms to the specified ABI.
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133
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134 moverride=
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135 Target RejectNegative ToLower Joined Var(aarch64_override_tune_string)
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136 -moverride=STRING Power users only! Override CPU optimization parameters.
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137
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138 Enum
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139 Name(aarch64_abi) Type(int)
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140 Known AArch64 ABIs (for use with the -mabi= option):
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141
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142 EnumValue
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143 Enum(aarch64_abi) String(ilp32) Value(AARCH64_ABI_ILP32)
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144
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145 EnumValue
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146 Enum(aarch64_abi) String(lp64) Value(AARCH64_ABI_LP64)
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147
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148 mpc-relative-literal-loads
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149 Target Report Save Var(pcrelative_literal_loads) Init(2) Save
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150 PC relative literal loads.
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151
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152 msign-return-address=
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153 Target RejectNegative Report Joined Enum(aarch64_ra_sign_scope_t) Var(aarch64_ra_sign_scope) Init(AARCH64_FUNCTION_NONE) Save
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154 Select return address signing scope.
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155
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156 Enum
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157 Name(aarch64_ra_sign_scope_t) Type(enum aarch64_function_type)
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158 Supported AArch64 return address signing scope (for use with -msign-return-address= option):
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159
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160 EnumValue
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161 Enum(aarch64_ra_sign_scope_t) String(none) Value(AARCH64_FUNCTION_NONE)
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162
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163 EnumValue
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164 Enum(aarch64_ra_sign_scope_t) String(non-leaf) Value(AARCH64_FUNCTION_NON_LEAF)
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165
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166 EnumValue
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167 Enum(aarch64_ra_sign_scope_t) String(all) Value(AARCH64_FUNCTION_ALL)
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168
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169 mlow-precision-recip-sqrt
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170 Common Var(flag_mrecip_low_precision_sqrt) Optimization
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171 Enable the reciprocal square root approximation. Enabling this reduces
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172 precision of reciprocal square root results to about 16 bits for
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173 single precision and to 32 bits for double precision.
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174
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175 mlow-precision-sqrt
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176 Common Var(flag_mlow_precision_sqrt) Optimization
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177 Enable the square root approximation. Enabling this reduces
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178 precision of square root results to about 16 bits for
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179 single precision and to 32 bits for double precision.
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180 If enabled, it implies -mlow-precision-recip-sqrt.
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181
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182 mlow-precision-div
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183 Common Var(flag_mlow_precision_div) Optimization
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184 Enable the division approximation. Enabling this reduces
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185 precision of division results to about 16 bits for
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186 single precision and to 32 bits for double precision.
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187
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188 mverbose-cost-dump
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189 Common Undocumented Var(flag_aarch64_verbose_cost)
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190 Enables verbose cost model dumping in the debug dump files.
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