|
111
|
1 /* RTX cost tables shared between arm and aarch64.
|
|
|
2
|
|
|
3 Copyright (C) 2013-2017 Free Software Foundation, Inc.
|
|
|
4 Contributed by ARM Ltd.
|
|
|
5
|
|
|
6 This file is part of GCC.
|
|
|
7
|
|
|
8 GCC is free software; you can redistribute it and/or modify it
|
|
|
9 under the terms of the GNU General Public License as published
|
|
|
10 by the Free Software Foundation; either version 3, or (at your
|
|
|
11 option) any later version.
|
|
|
12
|
|
|
13 GCC is distributed in the hope that it will be useful, but WITHOUT
|
|
|
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
|
|
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
|
|
|
16 License for more details.
|
|
|
17
|
|
|
18 You should have received a copy of the GNU General Public License
|
|
|
19 along with GCC; see the file COPYING3. If not see
|
|
|
20 <http://www.gnu.org/licenses/>. */
|
|
|
21
|
|
|
22 #ifndef GCC_AARCH_COST_TABLES_H
|
|
|
23 #define GCC_AARCH_COST_TABLES_H
|
|
|
24
|
|
|
25 const struct cpu_cost_table generic_extra_costs =
|
|
|
26 {
|
|
|
27 /* ALU */
|
|
|
28 {
|
|
|
29 0, /* arith. */
|
|
|
30 0, /* logical. */
|
|
|
31 0, /* shift. */
|
|
|
32 COSTS_N_INSNS (1), /* shift_reg. */
|
|
|
33 0, /* arith_shift. */
|
|
|
34 COSTS_N_INSNS (1), /* arith_shift_reg. */
|
|
|
35 0, /* log_shift. */
|
|
|
36 COSTS_N_INSNS (1), /* log_shift_reg. */
|
|
|
37 0, /* extend. */
|
|
|
38 COSTS_N_INSNS (1), /* extend_arith. */
|
|
|
39 0, /* bfi. */
|
|
|
40 0, /* bfx. */
|
|
|
41 0, /* clz. */
|
|
|
42 0, /* rev. */
|
|
|
43 COSTS_N_INSNS (1), /* non_exec. */
|
|
|
44 false /* non_exec_costs_exec. */
|
|
|
45 },
|
|
|
46 {
|
|
|
47 /* MULT SImode */
|
|
|
48 {
|
|
|
49 COSTS_N_INSNS (2), /* simple. */
|
|
|
50 COSTS_N_INSNS (1), /* flag_setting. */
|
|
|
51 COSTS_N_INSNS (2), /* extend. */
|
|
|
52 COSTS_N_INSNS (3), /* add. */
|
|
|
53 COSTS_N_INSNS (3), /* extend_add. */
|
|
|
54 COSTS_N_INSNS (8) /* idiv. */
|
|
|
55 },
|
|
|
56 /* MULT DImode */
|
|
|
57 {
|
|
|
58 0, /* simple (N/A). */
|
|
|
59 0, /* flag_setting (N/A). */
|
|
|
60 COSTS_N_INSNS (2), /* extend. */
|
|
|
61 0, /* add (N/A). */
|
|
|
62 COSTS_N_INSNS (3), /* extend_add. */
|
|
|
63 0 /* idiv (N/A). */
|
|
|
64 }
|
|
|
65 },
|
|
|
66 /* LD/ST */
|
|
|
67 {
|
|
|
68 COSTS_N_INSNS (2), /* load. */
|
|
|
69 COSTS_N_INSNS (2), /* load_sign_extend. */
|
|
|
70 COSTS_N_INSNS (3), /* ldrd. */
|
|
|
71 COSTS_N_INSNS (2), /* ldm_1st. */
|
|
|
72 1, /* ldm_regs_per_insn_1st. */
|
|
|
73 1, /* ldm_regs_per_insn_subsequent. */
|
|
|
74 COSTS_N_INSNS (2), /* loadf. */
|
|
|
75 COSTS_N_INSNS (3), /* loadd. */
|
|
|
76 COSTS_N_INSNS (1), /* load_unaligned. */
|
|
|
77 COSTS_N_INSNS (2), /* store. */
|
|
|
78 COSTS_N_INSNS (3), /* strd. */
|
|
|
79 COSTS_N_INSNS (2), /* stm_1st. */
|
|
|
80 1, /* stm_regs_per_insn_1st. */
|
|
|
81 1, /* stm_regs_per_insn_subsequent. */
|
|
|
82 COSTS_N_INSNS (2), /* storef. */
|
|
|
83 COSTS_N_INSNS (3), /* stored. */
|
|
|
84 COSTS_N_INSNS (1), /* store_unaligned. */
|
|
|
85 COSTS_N_INSNS (1), /* loadv. */
|
|
|
86 COSTS_N_INSNS (1) /* storev. */
|
|
|
87 },
|
|
|
88 {
|
|
|
89 /* FP SFmode */
|
|
|
90 {
|
|
|
91 COSTS_N_INSNS (7), /* div. */
|
|
|
92 COSTS_N_INSNS (2), /* mult. */
|
|
|
93 COSTS_N_INSNS (3), /* mult_addsub. */
|
|
|
94 COSTS_N_INSNS (3), /* fma. */
|
|
|
95 COSTS_N_INSNS (1), /* addsub. */
|
|
|
96 0, /* fpconst. */
|
|
|
97 0, /* neg. */
|
|
|
98 0, /* compare. */
|
|
|
99 0, /* widen. */
|
|
|
100 0, /* narrow. */
|
|
|
101 0, /* toint. */
|
|
|
102 0, /* fromint. */
|
|
|
103 0 /* roundint. */
|
|
|
104 },
|
|
|
105 /* FP DFmode */
|
|
|
106 {
|
|
|
107 COSTS_N_INSNS (15), /* div. */
|
|
|
108 COSTS_N_INSNS (5), /* mult. */
|
|
|
109 COSTS_N_INSNS (7), /* mult_addsub. */
|
|
|
110 COSTS_N_INSNS (7), /* fma. */
|
|
|
111 COSTS_N_INSNS (3), /* addsub. */
|
|
|
112 0, /* fpconst. */
|
|
|
113 0, /* neg. */
|
|
|
114 0, /* compare. */
|
|
|
115 0, /* widen. */
|
|
|
116 0, /* narrow. */
|
|
|
117 0, /* toint. */
|
|
|
118 0, /* fromint. */
|
|
|
119 0 /* roundint. */
|
|
|
120 }
|
|
|
121 },
|
|
|
122 /* Vector */
|
|
|
123 {
|
|
|
124 COSTS_N_INSNS (1) /* alu. */
|
|
|
125 }
|
|
|
126 };
|
|
|
127
|
|
|
128 const struct cpu_cost_table cortexa53_extra_costs =
|
|
|
129 {
|
|
|
130 /* ALU */
|
|
|
131 {
|
|
|
132 0, /* arith. */
|
|
|
133 0, /* logical. */
|
|
|
134 COSTS_N_INSNS (1), /* shift. */
|
|
|
135 0, /* shift_reg. */
|
|
|
136 COSTS_N_INSNS (1), /* arith_shift. */
|
|
|
137 COSTS_N_INSNS (1), /* arith_shift_reg. */
|
|
|
138 COSTS_N_INSNS (1), /* log_shift. */
|
|
|
139 COSTS_N_INSNS (1), /* log_shift_reg. */
|
|
|
140 COSTS_N_INSNS (1), /* extend. */
|
|
|
141 COSTS_N_INSNS (1), /* extend_arith. */
|
|
|
142 COSTS_N_INSNS (1), /* bfi. */
|
|
|
143 COSTS_N_INSNS (1), /* bfx. */
|
|
|
144 0, /* clz. */
|
|
|
145 0, /* rev. */
|
|
|
146 0, /* non_exec. */
|
|
|
147 true /* non_exec_costs_exec. */
|
|
|
148 },
|
|
|
149 {
|
|
|
150 /* MULT SImode */
|
|
|
151 {
|
|
|
152 COSTS_N_INSNS (1), /* simple. */
|
|
|
153 COSTS_N_INSNS (2), /* flag_setting. */
|
|
|
154 COSTS_N_INSNS (1), /* extend. */
|
|
|
155 COSTS_N_INSNS (1), /* add. */
|
|
|
156 COSTS_N_INSNS (1), /* extend_add. */
|
|
|
157 COSTS_N_INSNS (9) /* idiv. */
|
|
|
158 },
|
|
|
159 /* MULT DImode */
|
|
|
160 {
|
|
|
161 COSTS_N_INSNS (2), /* simple. */
|
|
|
162 0, /* flag_setting (N/A). */
|
|
|
163 COSTS_N_INSNS (2), /* extend. */
|
|
|
164 COSTS_N_INSNS (2), /* add. */
|
|
|
165 COSTS_N_INSNS (2), /* extend_add. */
|
|
|
166 COSTS_N_INSNS (15) /* idiv. */
|
|
|
167 }
|
|
|
168 },
|
|
|
169 /* LD/ST */
|
|
|
170 {
|
|
|
171 COSTS_N_INSNS (1), /* load. */
|
|
|
172 COSTS_N_INSNS (1), /* load_sign_extend. */
|
|
|
173 COSTS_N_INSNS (1), /* ldrd. */
|
|
|
174 COSTS_N_INSNS (1), /* ldm_1st. */
|
|
|
175 1, /* ldm_regs_per_insn_1st. */
|
|
|
176 2, /* ldm_regs_per_insn_subsequent. */
|
|
|
177 COSTS_N_INSNS (1), /* loadf. */
|
|
|
178 COSTS_N_INSNS (1), /* loadd. */
|
|
|
179 COSTS_N_INSNS (1), /* load_unaligned. */
|
|
|
180 0, /* store. */
|
|
|
181 0, /* strd. */
|
|
|
182 0, /* stm_1st. */
|
|
|
183 1, /* stm_regs_per_insn_1st. */
|
|
|
184 2, /* stm_regs_per_insn_subsequent. */
|
|
|
185 0, /* storef. */
|
|
|
186 0, /* stored. */
|
|
|
187 COSTS_N_INSNS (1), /* store_unaligned. */
|
|
|
188 COSTS_N_INSNS (1), /* loadv. */
|
|
|
189 COSTS_N_INSNS (1) /* storev. */
|
|
|
190 },
|
|
|
191 {
|
|
|
192 /* FP SFmode */
|
|
|
193 {
|
|
|
194 COSTS_N_INSNS (5), /* div. */
|
|
|
195 COSTS_N_INSNS (1), /* mult. */
|
|
|
196 COSTS_N_INSNS (2), /* mult_addsub. */
|
|
|
197 COSTS_N_INSNS (2), /* fma. */
|
|
|
198 COSTS_N_INSNS (1), /* addsub. */
|
|
|
199 0, /* fpconst. */
|
|
|
200 COSTS_N_INSNS (1), /* neg. */
|
|
|
201 0, /* compare. */
|
|
|
202 COSTS_N_INSNS (1), /* widen. */
|
|
|
203 COSTS_N_INSNS (1), /* narrow. */
|
|
|
204 COSTS_N_INSNS (1), /* toint. */
|
|
|
205 COSTS_N_INSNS (1), /* fromint. */
|
|
|
206 COSTS_N_INSNS (1) /* roundint. */
|
|
|
207 },
|
|
|
208 /* FP DFmode */
|
|
|
209 {
|
|
|
210 COSTS_N_INSNS (10), /* div. */
|
|
|
211 COSTS_N_INSNS (1), /* mult. */
|
|
|
212 COSTS_N_INSNS (2), /* mult_addsub. */
|
|
|
213 COSTS_N_INSNS (2), /* fma. */
|
|
|
214 COSTS_N_INSNS (1), /* addsub. */
|
|
|
215 0, /* fpconst. */
|
|
|
216 COSTS_N_INSNS (1), /* neg. */
|
|
|
217 0, /* compare. */
|
|
|
218 COSTS_N_INSNS (1), /* widen. */
|
|
|
219 COSTS_N_INSNS (1), /* narrow. */
|
|
|
220 COSTS_N_INSNS (1), /* toint. */
|
|
|
221 COSTS_N_INSNS (1), /* fromint. */
|
|
|
222 COSTS_N_INSNS (1) /* roundint. */
|
|
|
223 }
|
|
|
224 },
|
|
|
225 /* Vector */
|
|
|
226 {
|
|
|
227 COSTS_N_INSNS (1) /* alu. */
|
|
|
228 }
|
|
|
229 };
|
|
|
230
|
|
|
231 const struct cpu_cost_table cortexa57_extra_costs =
|
|
|
232 {
|
|
|
233 /* ALU */
|
|
|
234 {
|
|
|
235 0, /* arith. */
|
|
|
236 0, /* logical. */
|
|
|
237 0, /* shift. */
|
|
|
238 COSTS_N_INSNS (1), /* shift_reg. */
|
|
|
239 COSTS_N_INSNS (1), /* arith_shift. */
|
|
|
240 COSTS_N_INSNS (1), /* arith_shift_reg. */
|
|
|
241 COSTS_N_INSNS (1), /* log_shift. */
|
|
|
242 COSTS_N_INSNS (1), /* log_shift_reg. */
|
|
|
243 0, /* extend. */
|
|
|
244 COSTS_N_INSNS (1), /* extend_arith. */
|
|
|
245 COSTS_N_INSNS (1), /* bfi. */
|
|
|
246 0, /* bfx. */
|
|
|
247 0, /* clz. */
|
|
|
248 0, /* rev. */
|
|
|
249 0, /* non_exec. */
|
|
|
250 true /* non_exec_costs_exec. */
|
|
|
251 },
|
|
|
252 {
|
|
|
253 /* MULT SImode */
|
|
|
254 {
|
|
|
255 COSTS_N_INSNS (2), /* simple. */
|
|
|
256 COSTS_N_INSNS (3), /* flag_setting. */
|
|
|
257 COSTS_N_INSNS (2), /* extend. */
|
|
|
258 COSTS_N_INSNS (2), /* add. */
|
|
|
259 COSTS_N_INSNS (2), /* extend_add. */
|
|
|
260 COSTS_N_INSNS (18) /* idiv. */
|
|
|
261 },
|
|
|
262 /* MULT DImode */
|
|
|
263 {
|
|
|
264 COSTS_N_INSNS (4), /* simple. */
|
|
|
265 0, /* flag_setting (N/A). */
|
|
|
266 COSTS_N_INSNS (2), /* extend. */
|
|
|
267 COSTS_N_INSNS (4), /* add. */
|
|
|
268 COSTS_N_INSNS (2), /* extend_add. */
|
|
|
269 COSTS_N_INSNS (34) /* idiv. */
|
|
|
270 }
|
|
|
271 },
|
|
|
272 /* LD/ST */
|
|
|
273 {
|
|
|
274 COSTS_N_INSNS (3), /* load. */
|
|
|
275 COSTS_N_INSNS (3), /* load_sign_extend. */
|
|
|
276 COSTS_N_INSNS (3), /* ldrd. */
|
|
|
277 COSTS_N_INSNS (2), /* ldm_1st. */
|
|
|
278 1, /* ldm_regs_per_insn_1st. */
|
|
|
279 2, /* ldm_regs_per_insn_subsequent. */
|
|
|
280 COSTS_N_INSNS (4), /* loadf. */
|
|
|
281 COSTS_N_INSNS (4), /* loadd. */
|
|
|
282 COSTS_N_INSNS (5), /* load_unaligned. */
|
|
|
283 0, /* store. */
|
|
|
284 0, /* strd. */
|
|
|
285 0, /* stm_1st. */
|
|
|
286 1, /* stm_regs_per_insn_1st. */
|
|
|
287 2, /* stm_regs_per_insn_subsequent. */
|
|
|
288 0, /* storef. */
|
|
|
289 0, /* stored. */
|
|
|
290 COSTS_N_INSNS (1), /* store_unaligned. */
|
|
|
291 COSTS_N_INSNS (1), /* loadv. */
|
|
|
292 COSTS_N_INSNS (1) /* storev. */
|
|
|
293 },
|
|
|
294 {
|
|
|
295 /* FP SFmode */
|
|
|
296 {
|
|
|
297 COSTS_N_INSNS (6), /* div. */
|
|
|
298 COSTS_N_INSNS (1), /* mult. */
|
|
|
299 COSTS_N_INSNS (2), /* mult_addsub. */
|
|
|
300 COSTS_N_INSNS (2), /* fma. */
|
|
|
301 COSTS_N_INSNS (1), /* addsub. */
|
|
|
302 0, /* fpconst. */
|
|
|
303 0, /* neg. */
|
|
|
304 0, /* compare. */
|
|
|
305 COSTS_N_INSNS (1), /* widen. */
|
|
|
306 COSTS_N_INSNS (1), /* narrow. */
|
|
|
307 COSTS_N_INSNS (1), /* toint. */
|
|
|
308 COSTS_N_INSNS (1), /* fromint. */
|
|
|
309 COSTS_N_INSNS (1) /* roundint. */
|
|
|
310 },
|
|
|
311 /* FP DFmode */
|
|
|
312 {
|
|
|
313 COSTS_N_INSNS (11), /* div. */
|
|
|
314 COSTS_N_INSNS (1), /* mult. */
|
|
|
315 COSTS_N_INSNS (2), /* mult_addsub. */
|
|
|
316 COSTS_N_INSNS (2), /* fma. */
|
|
|
317 COSTS_N_INSNS (1), /* addsub. */
|
|
|
318 0, /* fpconst. */
|
|
|
319 0, /* neg. */
|
|
|
320 0, /* compare. */
|
|
|
321 COSTS_N_INSNS (1), /* widen. */
|
|
|
322 COSTS_N_INSNS (1), /* narrow. */
|
|
|
323 COSTS_N_INSNS (1), /* toint. */
|
|
|
324 COSTS_N_INSNS (1), /* fromint. */
|
|
|
325 COSTS_N_INSNS (1) /* roundint. */
|
|
|
326 }
|
|
|
327 },
|
|
|
328 /* Vector */
|
|
|
329 {
|
|
|
330 COSTS_N_INSNS (1) /* alu. */
|
|
|
331 }
|
|
|
332 };
|
|
|
333
|
|
|
334 const struct cpu_cost_table exynosm1_extra_costs =
|
|
|
335 {
|
|
|
336 /* ALU */
|
|
|
337 {
|
|
|
338 0, /* arith. */
|
|
|
339 0, /* logical. */
|
|
|
340 0, /* shift. */
|
|
|
341 COSTS_N_INSNS (0), /* shift_reg. */
|
|
|
342 0, /* arith_shift. */
|
|
|
343 COSTS_N_INSNS (1), /* arith_shift_reg. */
|
|
|
344 0, /* log_shift. */
|
|
|
345 COSTS_N_INSNS (1), /* log_shift_reg. */
|
|
|
346 0, /* extend. */
|
|
|
347 COSTS_N_INSNS (1), /* extend_arith. */
|
|
|
348 0, /* bfi. */
|
|
|
349 0, /* bfx. */
|
|
|
350 0, /* clz. */
|
|
|
351 0, /* rev. */
|
|
|
352 0, /* non_exec. */
|
|
|
353 true /* non_exec_costs_exec. */
|
|
|
354 },
|
|
|
355 {
|
|
|
356 /* MULT SImode */
|
|
|
357 {
|
|
|
358 COSTS_N_INSNS (2), /* simple. */
|
|
|
359 COSTS_N_INSNS (3), /* flag_setting. */
|
|
|
360 COSTS_N_INSNS (4), /* extend. */
|
|
|
361 COSTS_N_INSNS (2), /* add. */
|
|
|
362 COSTS_N_INSNS (4), /* extend_add. */
|
|
|
363 COSTS_N_INSNS (19) /* idiv. */
|
|
|
364 },
|
|
|
365 /* MULT DImode */
|
|
|
366 {
|
|
|
367 COSTS_N_INSNS (3), /* simple. */
|
|
|
368 0, /* flag_setting (N/A). */
|
|
|
369 COSTS_N_INSNS (4), /* extend. */
|
|
|
370 COSTS_N_INSNS (3), /* add. */
|
|
|
371 COSTS_N_INSNS (4), /* extend_add. */
|
|
|
372 COSTS_N_INSNS (35) /* idiv. */
|
|
|
373 }
|
|
|
374 },
|
|
|
375 /* LD/ST */
|
|
|
376 {
|
|
|
377 COSTS_N_INSNS (3), /* load. */
|
|
|
378 COSTS_N_INSNS (4), /* load_sign_extend. */
|
|
|
379 COSTS_N_INSNS (3), /* ldrd. */
|
|
|
380 COSTS_N_INSNS (2), /* ldm_1st. */
|
|
|
381 1, /* ldm_regs_per_insn_1st. */
|
|
|
382 2, /* ldm_regs_per_insn_subsequent. */
|
|
|
383 COSTS_N_INSNS (4), /* loadf. */
|
|
|
384 COSTS_N_INSNS (4), /* loadd. */
|
|
|
385 COSTS_N_INSNS (4), /* load_unaligned. */
|
|
|
386 0, /* store. */
|
|
|
387 0, /* strd. */
|
|
|
388 0, /* stm_1st. */
|
|
|
389 1, /* stm_regs_per_insn_1st. */
|
|
|
390 2, /* stm_regs_per_insn_subsequent. */
|
|
|
391 0, /* storef. */
|
|
|
392 0, /* stored. */
|
|
|
393 0, /* store_unaligned. */
|
|
|
394 COSTS_N_INSNS (1), /* loadv. */
|
|
|
395 COSTS_N_INSNS (1) /* storev. */
|
|
|
396 },
|
|
|
397 {
|
|
|
398 /* FP SFmode */
|
|
|
399 {
|
|
|
400 COSTS_N_INSNS (21), /* div. */
|
|
|
401 COSTS_N_INSNS (3), /* mult. */
|
|
|
402 COSTS_N_INSNS (4), /* mult_addsub. */
|
|
|
403 COSTS_N_INSNS (4), /* fma. */
|
|
|
404 COSTS_N_INSNS (2), /* addsub. */
|
|
|
405 COSTS_N_INSNS (0), /* fpconst. */
|
|
|
406 COSTS_N_INSNS (0), /* neg. */
|
|
|
407 COSTS_N_INSNS (3), /* compare. */
|
|
|
408 COSTS_N_INSNS (2), /* widen. */
|
|
|
409 COSTS_N_INSNS (2), /* narrow. */
|
|
|
410 COSTS_N_INSNS (12), /* toint. */
|
|
|
411 COSTS_N_INSNS (7), /* fromint. */
|
|
|
412 COSTS_N_INSNS (2) /* roundint. */
|
|
|
413 },
|
|
|
414 /* FP DFmode */
|
|
|
415 {
|
|
|
416 COSTS_N_INSNS (34), /* div. */
|
|
|
417 COSTS_N_INSNS (3), /* mult. */
|
|
|
418 COSTS_N_INSNS (4), /* mult_addsub. */
|
|
|
419 COSTS_N_INSNS (4), /* fma. */
|
|
|
420 COSTS_N_INSNS (2), /* addsub. */
|
|
|
421 COSTS_N_INSNS (0), /* fpconst. */
|
|
|
422 COSTS_N_INSNS (0), /* neg. */
|
|
|
423 COSTS_N_INSNS (3), /* compare. */
|
|
|
424 COSTS_N_INSNS (2), /* widen. */
|
|
|
425 COSTS_N_INSNS (2), /* narrow. */
|
|
|
426 COSTS_N_INSNS (12), /* toint. */
|
|
|
427 COSTS_N_INSNS (7), /* fromint. */
|
|
|
428 COSTS_N_INSNS (2) /* roundint. */
|
|
|
429 }
|
|
|
430 },
|
|
|
431 /* Vector */
|
|
|
432 {
|
|
|
433 COSTS_N_INSNS (0) /* alu. */
|
|
|
434 }
|
|
|
435 };
|
|
|
436
|
|
|
437 const struct cpu_cost_table xgene1_extra_costs =
|
|
|
438 {
|
|
|
439 /* ALU */
|
|
|
440 {
|
|
|
441 0, /* arith. */
|
|
|
442 0, /* logical. */
|
|
|
443 0, /* shift. */
|
|
|
444 COSTS_N_INSNS (1), /* shift_reg. */
|
|
|
445 COSTS_N_INSNS (1), /* arith_shift. */
|
|
|
446 COSTS_N_INSNS (1), /* arith_shift_reg. */
|
|
|
447 COSTS_N_INSNS (1), /* log_shift. */
|
|
|
448 COSTS_N_INSNS (1), /* log_shift_reg. */
|
|
|
449 COSTS_N_INSNS (1), /* extend. */
|
|
|
450 0, /* extend_arithm. */
|
|
|
451 COSTS_N_INSNS (1), /* bfi. */
|
|
|
452 COSTS_N_INSNS (1), /* bfx. */
|
|
|
453 0, /* clz. */
|
|
|
454 COSTS_N_INSNS (1), /* rev. */
|
|
|
455 0, /* non_exec. */
|
|
|
456 true /* non_exec_costs_exec. */
|
|
|
457 },
|
|
|
458 {
|
|
|
459 /* MULT SImode */
|
|
|
460 {
|
|
|
461 COSTS_N_INSNS (4), /* simple. */
|
|
|
462 COSTS_N_INSNS (4), /* flag_setting. */
|
|
|
463 COSTS_N_INSNS (4), /* extend. */
|
|
|
464 COSTS_N_INSNS (4), /* add. */
|
|
|
465 COSTS_N_INSNS (4), /* extend_add. */
|
|
|
466 COSTS_N_INSNS (20) /* idiv. */
|
|
|
467 },
|
|
|
468 /* MULT DImode */
|
|
|
469 {
|
|
|
470 COSTS_N_INSNS (5), /* simple. */
|
|
|
471 0, /* flag_setting (N/A). */
|
|
|
472 COSTS_N_INSNS (5), /* extend. */
|
|
|
473 COSTS_N_INSNS (5), /* add. */
|
|
|
474 COSTS_N_INSNS (5), /* extend_add. */
|
|
|
475 COSTS_N_INSNS (21) /* idiv. */
|
|
|
476 }
|
|
|
477 },
|
|
|
478 /* LD/ST */
|
|
|
479 {
|
|
|
480 COSTS_N_INSNS (5), /* load. */
|
|
|
481 COSTS_N_INSNS (6), /* load_sign_extend. */
|
|
|
482 COSTS_N_INSNS (5), /* ldrd. */
|
|
|
483 COSTS_N_INSNS (5), /* ldm_1st. */
|
|
|
484 1, /* ldm_regs_per_insn_1st. */
|
|
|
485 1, /* ldm_regs_per_insn_subsequent. */
|
|
|
486 COSTS_N_INSNS (10), /* loadf. */
|
|
|
487 COSTS_N_INSNS (10), /* loadd. */
|
|
|
488 COSTS_N_INSNS (5), /* load_unaligned. */
|
|
|
489 0, /* store. */
|
|
|
490 0, /* strd. */
|
|
|
491 0, /* stm_1st. */
|
|
|
492 1, /* stm_regs_per_insn_1st. */
|
|
|
493 1, /* stm_regs_per_insn_subsequent. */
|
|
|
494 0, /* storef. */
|
|
|
495 0, /* stored. */
|
|
|
496 0, /* store_unaligned. */
|
|
|
497 COSTS_N_INSNS (1), /* loadv. */
|
|
|
498 COSTS_N_INSNS (1) /* storev. */
|
|
|
499 },
|
|
|
500 {
|
|
|
501 /* FP SFmode */
|
|
|
502 {
|
|
|
503 COSTS_N_INSNS (23), /* div. */
|
|
|
504 COSTS_N_INSNS (5), /* mult. */
|
|
|
505 COSTS_N_INSNS (5), /* mult_addsub. */
|
|
|
506 COSTS_N_INSNS (5), /* fma. */
|
|
|
507 COSTS_N_INSNS (5), /* addsub. */
|
|
|
508 COSTS_N_INSNS (2), /* fpconst. */
|
|
|
509 COSTS_N_INSNS (3), /* neg. */
|
|
|
510 COSTS_N_INSNS (2), /* compare. */
|
|
|
511 COSTS_N_INSNS (6), /* widen. */
|
|
|
512 COSTS_N_INSNS (6), /* narrow. */
|
|
|
513 COSTS_N_INSNS (4), /* toint. */
|
|
|
514 COSTS_N_INSNS (4), /* fromint. */
|
|
|
515 COSTS_N_INSNS (4) /* roundint. */
|
|
|
516 },
|
|
|
517 /* FP DFmode */
|
|
|
518 {
|
|
|
519 COSTS_N_INSNS (29), /* div. */
|
|
|
520 COSTS_N_INSNS (5), /* mult. */
|
|
|
521 COSTS_N_INSNS (5), /* mult_addsub. */
|
|
|
522 COSTS_N_INSNS (5), /* fma. */
|
|
|
523 COSTS_N_INSNS (5), /* addsub. */
|
|
|
524 COSTS_N_INSNS (3), /* fpconst. */
|
|
|
525 COSTS_N_INSNS (3), /* neg. */
|
|
|
526 COSTS_N_INSNS (2), /* compare. */
|
|
|
527 COSTS_N_INSNS (6), /* widen. */
|
|
|
528 COSTS_N_INSNS (6), /* narrow. */
|
|
|
529 COSTS_N_INSNS (4), /* toint. */
|
|
|
530 COSTS_N_INSNS (4), /* fromint. */
|
|
|
531 COSTS_N_INSNS (4) /* roundint. */
|
|
|
532 }
|
|
|
533 },
|
|
|
534 /* Vector */
|
|
|
535 {
|
|
|
536 COSTS_N_INSNS (2) /* alu. */
|
|
|
537 }
|
|
|
538 };
|
|
|
539
|
|
|
540 #endif /* GCC_AARCH_COST_TABLES_H */
|
