annotate gcc/config/avr/predicates.md @ 111:04ced10e8804

gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
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children 84e7813d76e9
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1 ;; Predicate definitions for ATMEL AVR micro controllers.
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2 ;; Copyright (C) 2006-2017 Free Software Foundation, Inc.
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3 ;;
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4 ;; This file is part of GCC.
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5 ;;
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6 ;; GCC is free software; you can redistribute it and/or modify
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7 ;; it under the terms of the GNU General Public License as published by
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8 ;; the Free Software Foundation; either version 3, or (at your option)
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9 ;; any later version.
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10 ;;
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11 ;; GCC is distributed in the hope that it will be useful,
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12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 ;; GNU General Public License for more details.
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15 ;;
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16 ;; You should have received a copy of the GNU General Public License
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17 ;; along with GCC; see the file COPYING3. If not see
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18 ;; <http://www.gnu.org/licenses/>.
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19
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20 ;; Registers from r0 to r15.
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21 (define_predicate "l_register_operand"
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22 (and (match_code "reg")
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23 (match_test "REGNO (op) <= 15")))
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24
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25 ;; Registers from r16 to r31.
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26 (define_predicate "d_register_operand"
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27 (and (match_code "reg")
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28 (match_test "REGNO (op) >= 16 && REGNO (op) <= 31")))
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29
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30 (define_predicate "even_register_operand"
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31 (and (match_code "reg")
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32 (and (match_test "REGNO (op) <= 31")
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33 (match_test "(REGNO (op) & 1) == 0"))))
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34
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35 (define_predicate "odd_register_operand"
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36 (and (match_code "reg")
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37 (and (match_test "REGNO (op) <= 31")
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38 (match_test "(REGNO (op) & 1) != 0"))))
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39
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40 ;; SP register.
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41 (define_predicate "stack_register_operand"
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42 (and (match_code "reg")
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43 (match_test "REGNO (op) == REG_SP")))
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44
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45 ;; Return true if OP is a valid address for lower half of I/O space.
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46 (define_special_predicate "low_io_address_operand"
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47 (ior (and (match_code "const_int")
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48 (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset,
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49 0, 0x1F)"))
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50 (and (match_code "symbol_ref")
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51 (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_IO_LOW"))))
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53 ;; Return true if OP is a valid address for high half of I/O space.
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54 (define_predicate "high_io_address_operand"
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55 (and (match_code "const_int")
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56 (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset,
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57 0x20, 0x3F)")))
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59 ;; Return true if OP is a valid address of I/O space.
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60 (define_special_predicate "io_address_operand"
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61 (ior (and (match_code "const_int")
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62 (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset,
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63 0, 0x3F)"))
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64 (and (match_code "symbol_ref")
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65 (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_IO"))))
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66
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67 ;; Return 1 if OP is a general operand not in flash memory
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68 (define_predicate "nop_general_operand"
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69 (and (match_operand 0 "general_operand")
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70 (match_test "!avr_mem_flash_p (op)")))
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71
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72 ;; Return 1 if OP is an "ordinary" general operand, i.e. a general
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73 ;; operand whose load is not handled by a libgcc call or ELPM.
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74 (define_predicate "nox_general_operand"
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75 (and (match_operand 0 "general_operand")
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76 (not (match_test "avr_load_libgcc_p (op)"))
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77 (not (match_test "avr_mem_memx_p (op)"))))
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79 ;; Return 1 if OP is the zero constant for MODE.
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80 (define_predicate "const0_operand"
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81 (and (match_code "const_int,const_fixed,const_double")
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82 (match_test "op == CONST0_RTX (mode)")))
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83
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84 ;; Return 1 if OP is the one constant integer for MODE.
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85 (define_predicate "const1_operand"
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86 (and (match_code "const_int")
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87 (match_test "op == CONST1_RTX (mode)")))
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88
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89
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90 ;; Return 1 if OP is constant integer 0..7 for MODE.
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91 (define_predicate "const_0_to_7_operand"
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92 (and (match_code "const_int")
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93 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
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94
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95 ;; Return 1 if OP is constant integer 2..7 for MODE.
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96 (define_predicate "const_2_to_7_operand"
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97 (and (match_code "const_int")
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98 (match_test "IN_RANGE (INTVAL (op), 2, 7)")))
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99
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100 ;; Return 1 if OP is constant integer 1..6 for MODE.
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101 (define_predicate "const_1_to_6_operand"
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102 (and (match_code "const_int")
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103 (match_test "IN_RANGE (INTVAL (op), 1, 6)")))
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104
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105 ;; Return 1 if OP is constant integer 2..6 for MODE.
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106 (define_predicate "const_2_to_6_operand"
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107 (and (match_code "const_int")
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108 (match_test "IN_RANGE (INTVAL (op), 2, 6)")))
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109
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110 ;; Return 1 if OP is constant integer -255..-1.
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111 (define_predicate "const_m255_to_m1_operand"
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112 (and (match_code "const_int")
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113 (match_test "IN_RANGE (INTVAL (op), -255, -1)")))
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114
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115 ;; Returns true if OP is either the constant zero or a register.
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116 (define_predicate "reg_or_0_operand"
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117 (ior (match_operand 0 "register_operand")
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118 (match_operand 0 "const0_operand")))
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119
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120 ;; Returns 1 if OP is a SYMBOL_REF.
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121 (define_predicate "symbol_ref_operand"
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122 (match_code "symbol_ref"))
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123
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124 ;; Return true if OP is a text segment reference.
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125 ;; This is needed for program memory address expressions.
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126 (define_predicate "text_segment_operand"
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127 (match_code "code_label,label_ref,symbol_ref,plus,const")
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128 {
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129 switch (GET_CODE (op))
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130 {
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131 case CODE_LABEL:
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132 return true;
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133 case LABEL_REF :
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134 return true;
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135 case SYMBOL_REF :
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136 return SYMBOL_REF_FUNCTION_P (op);
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137 case PLUS :
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138 /* Assume canonical format of symbol + constant.
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139 Fall through. */
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140 case CONST :
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141 return text_segment_operand (XEXP (op, 0), VOIDmode);
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142 default :
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143 return false;
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144 }
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145 })
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146
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147 ;; Return true if OP is a constant that contains only one 1 in its
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148 ;; binary representation.
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149 (define_predicate "single_one_operand"
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150 (and (match_code "const_int")
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151 (match_test "exact_log2(INTVAL (op) & GET_MODE_MASK (mode)) >= 0")))
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152
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153 ;; Return true if OP is a constant that contains only one 0 in its
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154 ;; binary representation.
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155 (define_predicate "single_zero_operand"
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156 (and (match_code "const_int")
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157 (match_test "exact_log2(~INTVAL (op) & GET_MODE_MASK (mode)) >= 0")))
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158
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159 ;;
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160 (define_predicate "avr_sp_immediate_operand"
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161 (and (match_code "const_int")
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162 (match_test "satisfies_constraint_Csp (op)")))
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163
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164 ;; True for EQ & NE
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165 (define_predicate "eqne_operator"
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166 (match_code "eq,ne"))
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167
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168 ;; True for GE & LT
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169 (define_predicate "gelt_operator"
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170 (match_code "ge,lt"))
111
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171
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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172 ;; True for GT, GTU, LE & LEU
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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173 (define_predicate "difficult_comparison_operator"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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174 (match_code "gt,gtu,le,leu"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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175
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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176 ;; False for GT, GTU, LE & LEU
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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177 (define_predicate "simple_comparison_operator"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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178 (and (match_operand 0 "comparison_operator")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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179 (not (match_code "gt,gtu,le,leu"))))
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180
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181 ;; True for SIGN_EXTEND, ZERO_EXTEND.
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182 (define_predicate "extend_operator"
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183 (match_code "sign_extend,zero_extend"))
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184
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185 ;; Return true if OP is a valid call operand.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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186 (define_predicate "call_insn_operand"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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187 (and (match_code "mem")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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188 (ior (match_test "register_operand (XEXP (op, 0), mode)")
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189 (match_test "CONSTANT_ADDRESS_P (XEXP (op, 0))"))))
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190
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191 ;; For some insns we must ensure that no hard register is inserted
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192 ;; into their operands because the insns are split and the split
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193 ;; involves hard registers. An example are divmod insn that are
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194 ;; split to insns that represent implicit library calls.
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195
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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196 ;; True for register that is pseudo register.
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197 (define_predicate "pseudo_register_operand"
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198 (and (match_operand 0 "register_operand")
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199 (not (and (match_code "reg")
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200 (match_test "HARD_REGISTER_P (op)")))))
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201
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202 ;; True for operand that is pseudo register or CONST_INT.
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203 (define_predicate "pseudo_register_or_const_int_operand"
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204 (ior (match_operand 0 "const_int_operand")
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205 (match_operand 0 "pseudo_register_operand")))
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206
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207 ;; We keep combiner from inserting hard registers into the input of sign- and
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208 ;; zero-extends. A hard register in the input operand is not wanted because
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209 ;; 32-bit multiply patterns clobber some hard registers and extends with a
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210 ;; hard register that overlaps these clobbers won't combine to a widening
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211 ;; multiplication. There is no need for combine to propagate or insert
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212 ;; hard registers, register allocation can do it just as well.
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213
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214 ;; True for operand that is pseudo register at combine time.
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215 (define_predicate "combine_pseudo_register_operand"
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216 (ior (match_operand 0 "pseudo_register_operand")
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217 (and (match_operand 0 "register_operand")
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218 (match_test "reload_completed || reload_in_progress"))))
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219
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220 ;; Return true if OP is a constant integer that is either
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221 ;; 8 or 16 or 24.
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222 (define_predicate "const_8_16_24_operand"
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223 (and (match_code "const_int")
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224 (match_test "8 == INTVAL(op) || 16 == INTVAL(op) || 24 == INTVAL(op)")))
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225
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226 ;; Unsigned CONST_INT that fits in 8 bits, i.e. 0..255.
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227 (define_predicate "u8_operand"
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228 (and (match_code "const_int")
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229 (match_test "IN_RANGE (INTVAL (op), 0, 255)")))
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230
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231 ;; Signed CONST_INT that fits in 8 bits, i.e. -128..127.
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232 (define_predicate "s8_operand"
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233 (and (match_code "const_int")
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234 (match_test "IN_RANGE (INTVAL (op), -128, 127)")))
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235
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236 ;; One-extended CONST_INT that fits in 8 bits, i.e. -256..-1.
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237 (define_predicate "o8_operand"
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238 (and (match_code "const_int")
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239 (match_test "IN_RANGE (INTVAL (op), -256, -1)")))
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240
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241 ;; Signed CONST_INT that fits in 9 bits, i.e. -256..255.
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242 (define_predicate "s9_operand"
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243 (and (match_code "const_int")
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244 (match_test "IN_RANGE (INTVAL (op), -256, 255)")))
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245
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246 (define_predicate "register_or_s9_operand"
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247 (ior (match_operand 0 "register_operand")
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248 (match_operand 0 "s9_operand")))
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249
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250 ;; Unsigned CONST_INT that fits in 16 bits, i.e. 0..65536.
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251 (define_predicate "u16_operand"
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252 (and (match_code "const_int")
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253 (match_test "IN_RANGE (INTVAL (op), 0, (1<<16)-1)")))
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254
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255 ;; Signed CONST_INT that fits in 16 bits, i.e. -32768..32767.
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256 (define_predicate "s16_operand"
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257 (and (match_code "const_int")
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258 (match_test "IN_RANGE (INTVAL (op), -(1<<15), (1<<15)-1)")))
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259
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260 ;; One-extended CONST_INT that fits in 16 bits, i.e. -65536..-1.
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261 (define_predicate "o16_operand"
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262 (and (match_code "const_int")
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263 (match_test "IN_RANGE (INTVAL (op), -(1<<16), -1)")))
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264
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265 ;; Const int, fixed, or double operand
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266 (define_predicate "const_operand"
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267 (ior (match_code "const_fixed")
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268 (match_code "const_double")
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269 (match_operand 0 "const_int_operand")))
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270
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271 ;; Const int, const fixed, or const double operand
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272 (define_predicate "nonmemory_or_const_operand"
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273 (ior (match_code "const_fixed")
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274 (match_code "const_double")
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275 (match_operand 0 "nonmemory_operand")))
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276
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277 ;; Immediate, const fixed, or const double operand
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278 (define_predicate "const_or_immediate_operand"
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279 (ior (match_code "const_fixed")
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280 (match_code "const_double")
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281 (match_operand 0 "immediate_operand")))