Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/avr/predicates.md @ 111:04ced10e8804
gcc 7
author | kono |
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date | Fri, 27 Oct 2017 22:46:09 +0900 |
parents | 77e2b8dfacca |
children | 84e7813d76e9 |
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0 | 1 ;; Predicate definitions for ATMEL AVR micro controllers. |
111 | 2 ;; Copyright (C) 2006-2017 Free Software Foundation, Inc. |
0 | 3 ;; |
4 ;; This file is part of GCC. | |
5 ;; | |
6 ;; GCC is free software; you can redistribute it and/or modify | |
7 ;; it under the terms of the GNU General Public License as published by | |
8 ;; the Free Software Foundation; either version 3, or (at your option) | |
9 ;; any later version. | |
10 ;; | |
11 ;; GCC is distributed in the hope that it will be useful, | |
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 ;; GNU General Public License for more details. | |
15 ;; | |
16 ;; You should have received a copy of the GNU General Public License | |
17 ;; along with GCC; see the file COPYING3. If not see | |
18 ;; <http://www.gnu.org/licenses/>. | |
19 | |
20 ;; Registers from r0 to r15. | |
21 (define_predicate "l_register_operand" | |
22 (and (match_code "reg") | |
23 (match_test "REGNO (op) <= 15"))) | |
24 | |
25 ;; Registers from r16 to r31. | |
26 (define_predicate "d_register_operand" | |
27 (and (match_code "reg") | |
28 (match_test "REGNO (op) >= 16 && REGNO (op) <= 31"))) | |
29 | |
30 (define_predicate "even_register_operand" | |
31 (and (match_code "reg") | |
32 (and (match_test "REGNO (op) <= 31") | |
33 (match_test "(REGNO (op) & 1) == 0")))) | |
34 | |
35 (define_predicate "odd_register_operand" | |
36 (and (match_code "reg") | |
37 (and (match_test "REGNO (op) <= 31") | |
38 (match_test "(REGNO (op) & 1) != 0")))) | |
39 | |
40 ;; SP register. | |
41 (define_predicate "stack_register_operand" | |
42 (and (match_code "reg") | |
43 (match_test "REGNO (op) == REG_SP"))) | |
44 | |
45 ;; Return true if OP is a valid address for lower half of I/O space. | |
111 | 46 (define_special_predicate "low_io_address_operand" |
47 (ior (and (match_code "const_int") | |
48 (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset, | |
49 0, 0x1F)")) | |
50 (and (match_code "symbol_ref") | |
51 (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_IO_LOW")))) | |
0 | 52 |
53 ;; Return true if OP is a valid address for high half of I/O space. | |
54 (define_predicate "high_io_address_operand" | |
55 (and (match_code "const_int") | |
111 | 56 (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset, |
57 0x20, 0x3F)"))) | |
0 | 58 |
59 ;; Return true if OP is a valid address of I/O space. | |
111 | 60 (define_special_predicate "io_address_operand" |
61 (ior (and (match_code "const_int") | |
62 (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset, | |
63 0, 0x3F)")) | |
64 (and (match_code "symbol_ref") | |
65 (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_IO")))) | |
66 | |
67 ;; Return 1 if OP is a general operand not in flash memory | |
68 (define_predicate "nop_general_operand" | |
69 (and (match_operand 0 "general_operand") | |
70 (match_test "!avr_mem_flash_p (op)"))) | |
71 | |
72 ;; Return 1 if OP is an "ordinary" general operand, i.e. a general | |
73 ;; operand whose load is not handled by a libgcc call or ELPM. | |
74 (define_predicate "nox_general_operand" | |
75 (and (match_operand 0 "general_operand") | |
76 (not (match_test "avr_load_libgcc_p (op)")) | |
77 (not (match_test "avr_mem_memx_p (op)")))) | |
0 | 78 |
79 ;; Return 1 if OP is the zero constant for MODE. | |
80 (define_predicate "const0_operand" | |
111 | 81 (and (match_code "const_int,const_fixed,const_double") |
0 | 82 (match_test "op == CONST0_RTX (mode)"))) |
83 | |
111 | 84 ;; Return 1 if OP is the one constant integer for MODE. |
85 (define_predicate "const1_operand" | |
86 (and (match_code "const_int") | |
87 (match_test "op == CONST1_RTX (mode)"))) | |
88 | |
89 | |
90 ;; Return 1 if OP is constant integer 0..7 for MODE. | |
91 (define_predicate "const_0_to_7_operand" | |
92 (and (match_code "const_int") | |
93 (match_test "IN_RANGE (INTVAL (op), 0, 7)"))) | |
94 | |
95 ;; Return 1 if OP is constant integer 2..7 for MODE. | |
96 (define_predicate "const_2_to_7_operand" | |
97 (and (match_code "const_int") | |
98 (match_test "IN_RANGE (INTVAL (op), 2, 7)"))) | |
99 | |
100 ;; Return 1 if OP is constant integer 1..6 for MODE. | |
101 (define_predicate "const_1_to_6_operand" | |
102 (and (match_code "const_int") | |
103 (match_test "IN_RANGE (INTVAL (op), 1, 6)"))) | |
104 | |
105 ;; Return 1 if OP is constant integer 2..6 for MODE. | |
106 (define_predicate "const_2_to_6_operand" | |
107 (and (match_code "const_int") | |
108 (match_test "IN_RANGE (INTVAL (op), 2, 6)"))) | |
109 | |
110 ;; Return 1 if OP is constant integer -255..-1. | |
111 (define_predicate "const_m255_to_m1_operand" | |
112 (and (match_code "const_int") | |
113 (match_test "IN_RANGE (INTVAL (op), -255, -1)"))) | |
114 | |
0 | 115 ;; Returns true if OP is either the constant zero or a register. |
116 (define_predicate "reg_or_0_operand" | |
117 (ior (match_operand 0 "register_operand") | |
118 (match_operand 0 "const0_operand"))) | |
119 | |
120 ;; Returns 1 if OP is a SYMBOL_REF. | |
121 (define_predicate "symbol_ref_operand" | |
122 (match_code "symbol_ref")) | |
123 | |
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124 ;; Return true if OP is a text segment reference. |
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125 ;; This is needed for program memory address expressions. |
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126 (define_predicate "text_segment_operand" |
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127 (match_code "code_label,label_ref,symbol_ref,plus,const") |
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128 { |
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129 switch (GET_CODE (op)) |
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130 { |
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131 case CODE_LABEL: |
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132 return true; |
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133 case LABEL_REF : |
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134 return true; |
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135 case SYMBOL_REF : |
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136 return SYMBOL_REF_FUNCTION_P (op); |
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137 case PLUS : |
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138 /* Assume canonical format of symbol + constant. |
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139 Fall through. */ |
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140 case CONST : |
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141 return text_segment_operand (XEXP (op, 0), VOIDmode); |
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142 default : |
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143 return false; |
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144 } |
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145 }) |
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146 |
0 | 147 ;; Return true if OP is a constant that contains only one 1 in its |
148 ;; binary representation. | |
149 (define_predicate "single_one_operand" | |
150 (and (match_code "const_int") | |
151 (match_test "exact_log2(INTVAL (op) & GET_MODE_MASK (mode)) >= 0"))) | |
152 | |
153 ;; Return true if OP is a constant that contains only one 0 in its | |
154 ;; binary representation. | |
155 (define_predicate "single_zero_operand" | |
156 (and (match_code "const_int") | |
157 (match_test "exact_log2(~INTVAL (op) & GET_MODE_MASK (mode)) >= 0"))) | |
158 | |
159 ;; | |
160 (define_predicate "avr_sp_immediate_operand" | |
161 (and (match_code "const_int") | |
111 | 162 (match_test "satisfies_constraint_Csp (op)"))) |
0 | 163 |
164 ;; True for EQ & NE | |
165 (define_predicate "eqne_operator" | |
166 (match_code "eq,ne")) | |
111 | 167 |
0 | 168 ;; True for GE & LT |
169 (define_predicate "gelt_operator" | |
170 (match_code "ge,lt")) | |
111 | 171 |
0 | 172 ;; True for GT, GTU, LE & LEU |
173 (define_predicate "difficult_comparison_operator" | |
174 (match_code "gt,gtu,le,leu")) | |
175 | |
176 ;; False for GT, GTU, LE & LEU | |
177 (define_predicate "simple_comparison_operator" | |
178 (and (match_operand 0 "comparison_operator") | |
179 (not (match_code "gt,gtu,le,leu")))) | |
180 | |
111 | 181 ;; True for SIGN_EXTEND, ZERO_EXTEND. |
182 (define_predicate "extend_operator" | |
183 (match_code "sign_extend,zero_extend")) | |
184 | |
0 | 185 ;; Return true if OP is a valid call operand. |
186 (define_predicate "call_insn_operand" | |
187 (and (match_code "mem") | |
188 (ior (match_test "register_operand (XEXP (op, 0), mode)") | |
189 (match_test "CONSTANT_ADDRESS_P (XEXP (op, 0))")))) | |
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190 |
111 | 191 ;; For some insns we must ensure that no hard register is inserted |
192 ;; into their operands because the insns are split and the split | |
193 ;; involves hard registers. An example are divmod insn that are | |
194 ;; split to insns that represent implicit library calls. | |
195 | |
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196 ;; True for register that is pseudo register. |
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197 (define_predicate "pseudo_register_operand" |
111 | 198 (and (match_operand 0 "register_operand") |
199 (not (and (match_code "reg") | |
200 (match_test "HARD_REGISTER_P (op)"))))) | |
201 | |
202 ;; True for operand that is pseudo register or CONST_INT. | |
203 (define_predicate "pseudo_register_or_const_int_operand" | |
204 (ior (match_operand 0 "const_int_operand") | |
205 (match_operand 0 "pseudo_register_operand"))) | |
206 | |
207 ;; We keep combiner from inserting hard registers into the input of sign- and | |
208 ;; zero-extends. A hard register in the input operand is not wanted because | |
209 ;; 32-bit multiply patterns clobber some hard registers and extends with a | |
210 ;; hard register that overlaps these clobbers won't combine to a widening | |
211 ;; multiplication. There is no need for combine to propagate or insert | |
212 ;; hard registers, register allocation can do it just as well. | |
213 | |
214 ;; True for operand that is pseudo register at combine time. | |
215 (define_predicate "combine_pseudo_register_operand" | |
216 (ior (match_operand 0 "pseudo_register_operand") | |
217 (and (match_operand 0 "register_operand") | |
218 (match_test "reload_completed || reload_in_progress")))) | |
219 | |
220 ;; Return true if OP is a constant integer that is either | |
221 ;; 8 or 16 or 24. | |
222 (define_predicate "const_8_16_24_operand" | |
223 (and (match_code "const_int") | |
224 (match_test "8 == INTVAL(op) || 16 == INTVAL(op) || 24 == INTVAL(op)"))) | |
225 | |
226 ;; Unsigned CONST_INT that fits in 8 bits, i.e. 0..255. | |
227 (define_predicate "u8_operand" | |
228 (and (match_code "const_int") | |
229 (match_test "IN_RANGE (INTVAL (op), 0, 255)"))) | |
230 | |
231 ;; Signed CONST_INT that fits in 8 bits, i.e. -128..127. | |
232 (define_predicate "s8_operand" | |
233 (and (match_code "const_int") | |
234 (match_test "IN_RANGE (INTVAL (op), -128, 127)"))) | |
235 | |
236 ;; One-extended CONST_INT that fits in 8 bits, i.e. -256..-1. | |
237 (define_predicate "o8_operand" | |
238 (and (match_code "const_int") | |
239 (match_test "IN_RANGE (INTVAL (op), -256, -1)"))) | |
240 | |
241 ;; Signed CONST_INT that fits in 9 bits, i.e. -256..255. | |
242 (define_predicate "s9_operand" | |
243 (and (match_code "const_int") | |
244 (match_test "IN_RANGE (INTVAL (op), -256, 255)"))) | |
245 | |
246 (define_predicate "register_or_s9_operand" | |
247 (ior (match_operand 0 "register_operand") | |
248 (match_operand 0 "s9_operand"))) | |
249 | |
250 ;; Unsigned CONST_INT that fits in 16 bits, i.e. 0..65536. | |
251 (define_predicate "u16_operand" | |
252 (and (match_code "const_int") | |
253 (match_test "IN_RANGE (INTVAL (op), 0, (1<<16)-1)"))) | |
254 | |
255 ;; Signed CONST_INT that fits in 16 bits, i.e. -32768..32767. | |
256 (define_predicate "s16_operand" | |
257 (and (match_code "const_int") | |
258 (match_test "IN_RANGE (INTVAL (op), -(1<<15), (1<<15)-1)"))) | |
259 | |
260 ;; One-extended CONST_INT that fits in 16 bits, i.e. -65536..-1. | |
261 (define_predicate "o16_operand" | |
262 (and (match_code "const_int") | |
263 (match_test "IN_RANGE (INTVAL (op), -(1<<16), -1)"))) | |
264 | |
265 ;; Const int, fixed, or double operand | |
266 (define_predicate "const_operand" | |
267 (ior (match_code "const_fixed") | |
268 (match_code "const_double") | |
269 (match_operand 0 "const_int_operand"))) | |
270 | |
271 ;; Const int, const fixed, or const double operand | |
272 (define_predicate "nonmemory_or_const_operand" | |
273 (ior (match_code "const_fixed") | |
274 (match_code "const_double") | |
275 (match_operand 0 "nonmemory_operand"))) | |
276 | |
277 ;; Immediate, const fixed, or const double operand | |
278 (define_predicate "const_or_immediate_operand" | |
279 (ior (match_code "const_fixed") | |
280 (match_code "const_double") | |
281 (match_operand 0 "immediate_operand"))) |