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1 ;; GCC machine description for C6X synchronization instructions.
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2 ;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
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3 ;;
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4 ;; This file is part of GCC.
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5 ;;
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6 ;; GCC is free software; you can redistribute it and/or modify
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7 ;; it under the terms of the GNU General Public License as published by
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8 ;; the Free Software Foundation; either version 3, or (at your option)
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9 ;; any later version.
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10 ;;
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11 ;; GCC is distributed in the hope that it will be useful,
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12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 ;; GNU General Public License for more details.
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15 ;;
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16 ;; You should have received a copy of the GNU General Public License
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17 ;; along with GCC; see the file COPYING3. If not see
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18 ;; <http://www.gnu.org/licenses/>.
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19
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20 ;; C64X+ has atomic instructions, but they are not atomic on all
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21 ;; devices and have other problems. We use normal loads and stores,
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22 ;; and place them in overlapping branch shadows to ensure interrupts
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23 ;; are disabled during the sequence, which guarantees atomicity on all
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24 ;; single-core systems.
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25
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26 (define_code_iterator FETCHOP [plus minus ior xor and])
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27 (define_code_attr fetchop_name
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28 [(plus "add") (minus "sub") (ior "ior") (xor "xor") (and "and")])
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29 (define_code_attr fetchop_pred
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30 [(plus "reg_or_scst5_operand") (minus "register_operand")
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31 (ior "reg_or_scst5_operand") (xor "reg_or_scst5_operand")
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32 (and "reg_or_scst5_operand")])
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33 (define_code_attr fetchop_constr
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34 [(plus "bIs5") (minus "b") (ior "bIs5") (xor "bIs5") (and "bIs5")])
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35 (define_code_attr fetchop_opcode
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36 [(plus "add") (minus "sub") (ior "or") (xor "xor") (and "and")])
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37 (define_code_attr fetchop_inops02
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38 [(plus "%2, %0") (minus "%0, %2") (ior "%2, %0") (xor "%2, %0")
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39 (and "%2, %0")])
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40 (define_code_attr fetchop_inops21
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41 [(plus "%1, %2") (minus "%2, %1") (ior "%1, %2") (xor "%1, %2")
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42 (and "%1, %2")])
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43
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44 (define_expand "sync_compare_and_swapsi"
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45 [(parallel
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46 [(set (match_operand:SI 0 "register_operand" "")
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47 (match_operand:SI 1 "memory_operand" ""))
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48 (set (match_dup 1)
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49 (unspec_volatile:SI
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50 [(match_operand:SI 2 "register_operand" "")
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51 (match_operand:SI 3 "register_operand" "")]
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52 UNSPECV_CAS))
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53 (clobber (match_scratch:SI 4 ""))])]
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54 ""
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55 {
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56 })
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57
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58 (define_expand "sync_<fetchop_name>si"
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59 [(parallel
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60 [(set (match_operand:SI 0 "memory_operand" "")
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61 (unspec:SI
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62 [(FETCHOP:SI (match_dup 0)
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63 (match_operand:SI 1 "<fetchop_pred>" ""))]
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64 UNSPEC_ATOMIC))
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65 (clobber (match_scratch:SI 2 ""))])]
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66 ""
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67 {
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68 })
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69
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70 (define_expand "sync_old_<fetchop_name>si"
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71 [(parallel
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72 [(set (match_operand:SI 0 "register_operand" "")
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73 (match_operand:SI 1 "memory_operand" ""))
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74 (set (match_dup 1)
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75 (unspec:SI
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76 [(FETCHOP:SI (match_dup 1)
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77 (match_operand:SI 2 "<fetchop_pred>" ""))]
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78 UNSPEC_ATOMIC))
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79 (clobber (match_scratch:SI 3 ""))])]
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80 ""
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81 {
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82 })
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83
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84 (define_expand "sync_new_<fetchop_name>si"
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85 [(parallel
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86 [(set (match_operand:SI 0 "register_operand" "")
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87 (FETCHOP:SI (match_operand:SI 1 "memory_operand" "")
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88 (match_operand:SI 2 "<fetchop_pred>" "")))
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89 (set (match_dup 1)
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90 (unspec:SI [(FETCHOP:SI (match_dup 1) (match_dup 2))]
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91 UNSPEC_ATOMIC))
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92 (clobber (match_scratch:SI 3 ""))])]
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93 ""
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94 {
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95 })
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96
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97 (define_expand "sync_nandsi"
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98 [(parallel
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99 [(set (match_operand:SI 0 "memory_operand" "")
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100 (unspec:SI
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101 [(not:SI (and:SI (match_dup 0)
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102 (match_operand:SI 1 "reg_or_scst5_operand" "")))]
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103 UNSPEC_ATOMIC))
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104 (clobber (match_scratch:SI 2 ""))])]
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105 ""
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106 {
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107 })
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108
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109 (define_expand "sync_old_nandsi"
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110 [(parallel
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111 [(set (match_operand:SI 0 "register_operand" "")
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112 (match_operand:SI 1 "memory_operand" ""))
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113 (set (match_dup 1)
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114 (unspec:SI
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115 [(not:SI (and:SI (match_dup 1)
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116 (match_operand:SI 2 "reg_or_scst5_operand" "")))]
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117 UNSPEC_ATOMIC))
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118 (clobber (match_scratch:SI 3 ""))])]
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119 ""
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120 {
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121 })
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122
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123 (define_expand "sync_new_nandsi"
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124 [(parallel
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125 [(set (match_operand:SI 0 "register_operand" "")
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126 (not:SI (and:SI (match_operand:SI 1 "memory_operand" "")
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127 (match_operand:SI 2 "reg_or_scst5_operand" ""))))
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128 (set (match_dup 1)
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129 (unspec:SI [(not:SI (and:SI (match_dup 1) (match_dup 2)))]
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130 UNSPEC_ATOMIC))
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131 (clobber (match_scratch:SI 3 ""))])]
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132 ""
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133 {
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134 })
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135
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136 (define_insn "*sync_compare_and_swapsi"
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137 [(set (match_operand:SI 0 "register_operand" "=&b")
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138 (match_operand:SI 1 "memory_operand" "+m"))
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139 (set (match_dup 1)
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140 (unspec_volatile:SI
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141 [(match_operand:SI 2 "register_operand" "B")
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142 (match_operand:SI 3 "register_operand" "b")]
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143 UNSPECV_CAS))
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144 (clobber (match_scratch:SI 4 "=&B"))]
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145 ""
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146 "0: b .s2 1f ; 0\n\\
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147 || ldw .d%U1t%U0 %1, %0\n\\
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148 nop 4\n\\
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149 || b .s2 2f ; 1\n\\
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150 cmpeq .l2 %0, %2, %2 ; 5\n\\
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151 1: [%2] stw .d%U1t%U3 %3, %1 ; 6\n\\
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152 2:"
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153 [(set_attr "type" "atomic")])
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154
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155 (define_insn "sync_<fetchop_name>si_insn"
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156 [(set (match_operand:SI 0 "memory_operand" "+m")
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157 (unspec:SI
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158 [(FETCHOP:SI (match_dup 0)
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159 (match_operand:SI 1 "<fetchop_pred>" "<fetchop_constr>"))]
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160 UNSPEC_ATOMIC))
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161 (clobber (match_scratch:SI 2 "=&B"))]
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162 ""
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163 "0: b .s2 1f ; 0\n\\
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164 || ldw .d%U0t%U2 %0, %2\n\\
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165 nop 4\n\\
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166 || b .s2 2f ; 1\n\\
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167 <fetchop_opcode> .l2 <fetchop_inops21>, %2 ; 5\n\\
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168 1: stw .d%U0t%U2 %2, %0 ; 6\n\\
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169 2:"
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170 [(set_attr "type" "atomic")])
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171
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172 (define_insn "sync_old_<fetchop_name>si_insn"
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173 [(set (match_operand:SI 0 "register_operand" "=&b")
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174 (match_operand:SI 1 "memory_operand" "+m"))
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175 (set (match_dup 1)
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176 (unspec:SI
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177 [(FETCHOP:SI (match_dup 1)
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178 (match_operand:SI 2 "<fetchop_pred>" "<fetchop_constr>"))]
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179 UNSPEC_ATOMIC))
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180 (clobber (match_scratch:SI 3 "=&B"))]
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181 ""
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182 "0: b .s2 1f ; 0\n\\
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183 || ldw .d%U1t%U0 %1, %0\n\\
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184 nop 4\n\\
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185 || b .s2 2f ; 1\n\\
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186 <fetchop_opcode> .l2 <fetchop_inops02>, %3 ; 5\n\\
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187 1: stw .d%U1t%U3 %3, %1 ; 6\n\\
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188 2:"
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189 [(set_attr "type" "atomic")])
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190
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191 (define_insn "sync_new_<fetchop_name>si_insn"
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192 [(set (match_operand:SI 0 "register_operand" "=&b")
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193 (FETCHOP:SI (match_operand:SI 1 "memory_operand" "+m")
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194 (match_operand:SI 2 "<fetchop_pred>" "<fetchop_constr>")))
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195 (set (match_dup 1)
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196 (unspec:SI
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197 [(FETCHOP:SI (match_dup 1)
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198 (match_dup 2))]
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199 UNSPEC_ATOMIC))
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200 (clobber (match_scratch:SI 3 "=&B"))]
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201 ""
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202 "0: b .s2 1f ; 0\n\\
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203 || ldw .d%U1t%U0 %1, %0\n\\
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204 nop 4\n\\
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205 || b .s2 2f ; 1\n\\
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206 <fetchop_opcode> .l2 <fetchop_inops02>, %0 ; 5\n\\
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207 1: stw .d%U1t%U0 %0, %1 ; 6\n\\
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208 2:"
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209 [(set_attr "type" "atomic")])
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210
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211 (define_insn "sync_nandsi_insn"
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212 [(set (match_operand:SI 0 "memory_operand" "+m")
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213 (unspec:SI
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214 [(not:SI (and:SI (match_dup 0)
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215 (match_operand:SI 1 "reg_or_scst5_operand" "bIs5")))]
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216 UNSPEC_ATOMIC))
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217 (clobber (match_scratch:SI 2 "=&B"))]
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218 ""
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219 "0: b .s2 1f ; 0\n\\
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220 || ldw .d%U0t%U2 %0, %2\n\\
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221 nop 1\n\\
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222 nop 3\n\\
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223 || b .s2 2f ; 2\n\\
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224 and .l2 %1, %2, %2 ; 5\n\\
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225 1: not .l2 %2, %2 ; 6\n\\
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226 stw .d%U0t%U2 %2, %0 ; 7\n\\
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227 2:"
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228 [(set_attr "type" "atomic")])
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229
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230 (define_insn "sync_old_nandsi_insn"
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231 [(set (match_operand:SI 0 "register_operand" "=&b")
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232 (match_operand:SI 1 "memory_operand" "+m"))
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233 (set (match_dup 1)
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234 (unspec:SI
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235 [(not:SI (and:SI (match_dup 1)
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236 (match_operand:SI 2 "reg_or_scst5_operand" "bIs5")))]
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237 UNSPEC_ATOMIC))
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238 (clobber (match_scratch:SI 3 "=&B"))]
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239 ""
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240 "0: b .s2 1f ; 0\n\\
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241 || ldw .d%U1t%U0 %1, %0\n\\
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242 nop 1\n\\
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243 nop 3\n\\
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244 || b .s2 2f ; 2\n\\
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245 and .l2 %2, %0, %3 ; 5\n\\
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246 1: not .l2 %3, %3 ; 6\n\\
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247 stw .d%U1t%U3 %3, %1 ; 7\n\\
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248 2:"
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249 [(set_attr "type" "atomic")])
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250
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251 (define_insn "sync_new_nandsi_insn"
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252 [(set (match_operand:SI 0 "register_operand" "=&b")
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253 (not:SI (and:SI (match_operand:SI 1 "memory_operand" "+m")
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254 (match_operand:SI 2 "reg_or_scst5_operand" "bIs5"))))
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255 (set (match_dup 1)
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256 (unspec:SI
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257 [(not:SI (and:SI (match_dup 1) (match_dup 2)))]
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258 UNSPEC_ATOMIC))
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259 (clobber (match_scratch:SI 3 "=&B"))]
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260 ""
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261 "0: b .s2 1f ; 0\n\\
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262 || ldw .d%U1t%U0 %1, %0\n\\
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263 nop 1\n\\
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264 nop 3\n\\
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265 || b .s2 2f ; 2\n\\
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266 and .l2 %2, %0, %0 ; 5\n\\
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267 1: not .l2 %0, %0 ; 6\n\\
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268 stw .d%U1t%U0 %0, %1 ; 7\n\\
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269 2:"
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270 [(set_attr "type" "atomic")])
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