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annotate gcc/config/frv/constraints.md @ 111:04ced10e8804

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gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
parents 561a7518be6b
children 84e7813d76e9
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68
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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1 ;; Constraint definitions for FRV.
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2 ;; Copyright (C) 2001-2017 Free Software Foundation, Inc.
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3 ;;
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4 ;; This file is part of GCC.
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5 ;;
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6 ;; GCC is free software; you can redistribute it and/or modify
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7 ;; it under the terms of the GNU General Public License as published by
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8 ;; the Free Software Foundation; either version 3, or (at your option)
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9 ;; any later version.
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10 ;;
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11 ;; GCC is distributed in the hope that it will be useful,
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12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 ;; GNU General Public License for more details.
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15 ;;
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16 ;; You should have received a copy of the GNU General Public License
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17 ;; along with GCC; see the file COPYING3. If not see
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18 ;; <http://www.gnu.org/licenses/>.
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19
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20 ;; Register constraints.
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21 (define_register_constraint "a" "ACC_REGS"
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22 "@internal")
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23
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24 (define_register_constraint "b" "EVEN_ACC_REGS"
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25 "@internal")
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26
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27 (define_register_constraint "c" "CC_REGS"
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28 "@internal")
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29
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30 (define_register_constraint "d" "GPR_REGS"
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31 "@internal")
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32
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33 (define_register_constraint "e" "EVEN_REGS"
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34 "@internal")
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35
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36 (define_register_constraint "f" "FPR_REGS"
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37 "@internal")
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38
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39 (define_register_constraint "h" "FEVEN_REGS"
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40 "@internal")
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41
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42 (define_register_constraint "l" "LR_REG"
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43 "@internal")
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44
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45 (define_register_constraint "q" "QUAD_REGS"
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46 "@internal")
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47
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48 (define_register_constraint "t" "ICC_REGS"
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49 "@internal")
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50
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51 (define_register_constraint "u" "FCC_REGS"
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52 "@internal")
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53
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54 (define_register_constraint "v" "ICR_REGS"
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55 "@internal")
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56
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57 (define_register_constraint "w" "FCR_REGS"
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58 "@internal")
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59
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60 (define_register_constraint "x" "QUAD_FPR_REGS"
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61 "@internal")
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62
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63 (define_register_constraint "y" "LCR_REG"
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64 "@internal")
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65
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66 (define_register_constraint "z" "SPR_REGS"
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67 "@internal")
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68
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69 (define_register_constraint "A" "QUAD_ACC_REGS"
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70 "@internal")
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71
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72 (define_register_constraint "B" "ACCG_REGS"
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73 "@internal")
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74
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75 (define_register_constraint "C" "CR_REGS"
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76 "@internal")
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77
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78 (define_register_constraint "D89" "GR89_REGS"
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79 "@internal")
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80
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81 (define_register_constraint "D09" "GR9_REGS"
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82 "@internal")
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83
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84 (define_register_constraint "D08" "GR8_REGS"
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85 "@internal")
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86
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87 (define_register_constraint "D14" "FDPIC_FPTR_REGS"
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88 "@internal")
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89
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90 (define_register_constraint "D15" "FDPIC_REGS"
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91 "@internal")
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92
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93 (define_register_constraint "W" "FDPIC_CALL_REGS"
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94 "@internal")
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95
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96 (define_register_constraint "Z" "FDPIC_REGS"
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97 "@internal")
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98
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99 ;; Integer constraints.
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100 (define_constraint "I"
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101 "A signed 6-bit immediate."
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102 (and (match_code "const_int")
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103 (match_test "IN_RANGE (ival, -32, 31)")))
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104
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105 (define_constraint "J"
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106 "A signed 10-bit immediate."
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107 (and (match_code "const_int")
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108 (match_test "IN_RANGE (ival, -512, 511)")))
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109
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110 (define_constraint "K"
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111 "@internal"
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112 ;; Unused.
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113 (and (match_code "const_int")
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114 (match_test "0")))
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115
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116 (define_constraint "L"
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117 "A signed 16-bit immediate."
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118 (and (match_code "const_int")
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119 (match_test "IN_RANGE (ival, -32768, 32767)")))
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120
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121 (define_constraint "M"
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122 "An unsigned 16-bit immediate."
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123 (and (match_code "const_int")
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124 (match_test "IN_RANGE (ival, 0, 65535)")))
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125
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126 (define_constraint "N"
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127 "A signed 12-bit immediate that is negative."
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128 (and (match_code "const_int")
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129 (match_test "IN_RANGE (ival, -2048, -1)")))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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130
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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131 (define_constraint "O"
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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132 "Zero."
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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133 (and (match_code "const_int")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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134 (match_test "ival == 0")))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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135
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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136 (define_constraint "P"
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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137 "A signed 12-bit immediate that is positive."
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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138 (and (match_code "const_int")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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139 (match_test "IN_RANGE (ival, 1, 2047)")))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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140
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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141 ;; Floating-point constraints.
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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142 (define_constraint "G"
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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143 "Floating-point zero."
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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144 (and (match_code "const_double")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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145 (ior (and (match_test "mode == VOIDmode")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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146 (match_test "hval == 0 && lval == 0"))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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147 (and (match_test "mode == SFmode || mode == DFmode")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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148 (match_test "op == CONST0_RTX (mode)")))))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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149
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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150 (define_constraint "H"
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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151 "@internal"
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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152 ;; Unused.
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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153 (and (match_code "const_double")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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154 (match_test "0")))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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155
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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156 (define_constraint "Q"
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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157 "12-bit relocations."
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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158 (match_test "got12_operand (op, mode)"))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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159
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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160 (define_memory_constraint "R"
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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161 "Double word memory ops that take one instruction."
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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162 (match_test "dbl_memory_one_insn_operand (op, mode)"))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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163
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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164 (define_constraint "S"
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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165 "SYMBOL_REF."
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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166 (match_test "CONSTANT_P (op) && call_operand (op, VOIDmode)"))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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167
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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168 (define_memory_constraint "T"
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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169 "Double word memory ops that take two instructions."
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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170 (match_test "dbl_memory_two_insn_operand (op, mode)"))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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171
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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172 (define_memory_constraint "U"
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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173 "Memory operand for conditional execution."
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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174 (match_test "condexec_memory_operand (op, mode)"))