Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/i386/i386-c.c @ 111:04ced10e8804
gcc 7
author | kono |
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date | Fri, 27 Oct 2017 22:46:09 +0900 |
parents | f6334be47118 |
children | 84e7813d76e9 |
rev | line source |
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0 | 1 /* Subroutines used for macro/preprocessor support on the ia-32. |
111 | 2 Copyright (C) 2008-2017 Free Software Foundation, Inc. |
0 | 3 |
4 This file is part of GCC. | |
5 | |
6 GCC is free software; you can redistribute it and/or modify | |
7 it under the terms of the GNU General Public License as published by | |
8 the Free Software Foundation; either version 3, or (at your option) | |
9 any later version. | |
10 | |
11 GCC is distributed in the hope that it will be useful, | |
12 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 GNU General Public License for more details. | |
15 | |
16 You should have received a copy of the GNU General Public License | |
17 along with GCC; see the file COPYING3. If not see | |
18 <http://www.gnu.org/licenses/>. */ | |
19 | |
20 #include "config.h" | |
21 #include "system.h" | |
22 #include "coretypes.h" | |
111 | 23 #include "target.h" |
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24 #include "c-family/c-common.h" |
111 | 25 #include "memmodel.h" |
26 #include "tm_p.h" | |
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27 #include "c-family/c-pragma.h" |
0 | 28 |
29 static bool ix86_pragma_target_parse (tree, tree); | |
30 static void ix86_target_macros_internal | |
111 | 31 (HOST_WIDE_INT, HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit, |
0 | 32 void (*def_or_undef) (cpp_reader *, const char *)); |
33 | |
34 /* Internal function to either define or undef the appropriate system | |
35 macros. */ | |
36 static void | |
111 | 37 ix86_target_macros_internal (HOST_WIDE_INT isa_flag, |
38 HOST_WIDE_INT isa_flag2, | |
0 | 39 enum processor_type arch, |
40 enum processor_type tune, | |
41 enum fpmath_unit fpmath, | |
42 void (*def_or_undef) (cpp_reader *, | |
43 const char *)) | |
44 { | |
111 | 45 /* For some of the k6/pentium varients there weren't separate ISA bits to |
0 | 46 identify which tune/arch flag was passed, so figure it out here. */ |
47 size_t arch_len = strlen (ix86_arch_string); | |
48 size_t tune_len = strlen (ix86_tune_string); | |
49 int last_arch_char = ix86_arch_string[arch_len - 1]; | |
50 int last_tune_char = ix86_tune_string[tune_len - 1]; | |
51 | |
52 /* Built-ins based on -march=. */ | |
53 switch (arch) | |
54 { | |
55 case PROCESSOR_I386: | |
56 break; | |
57 case PROCESSOR_I486: | |
58 def_or_undef (parse_in, "__i486"); | |
59 def_or_undef (parse_in, "__i486__"); | |
60 break; | |
111 | 61 case PROCESSOR_LAKEMONT: |
62 /* Intel MCU is based on Intel Pentium CPU. */ | |
0 | 63 case PROCESSOR_PENTIUM: |
64 def_or_undef (parse_in, "__i586"); | |
65 def_or_undef (parse_in, "__i586__"); | |
66 def_or_undef (parse_in, "__pentium"); | |
67 def_or_undef (parse_in, "__pentium__"); | |
68 if (isa_flag & OPTION_MASK_ISA_MMX) | |
69 def_or_undef (parse_in, "__pentium_mmx__"); | |
70 break; | |
71 case PROCESSOR_PENTIUMPRO: | |
72 def_or_undef (parse_in, "__i686"); | |
73 def_or_undef (parse_in, "__i686__"); | |
74 def_or_undef (parse_in, "__pentiumpro"); | |
75 def_or_undef (parse_in, "__pentiumpro__"); | |
76 break; | |
77 case PROCESSOR_GEODE: | |
78 def_or_undef (parse_in, "__geode"); | |
79 def_or_undef (parse_in, "__geode__"); | |
80 break; | |
81 case PROCESSOR_K6: | |
82 def_or_undef (parse_in, "__k6"); | |
83 def_or_undef (parse_in, "__k6__"); | |
84 if (last_arch_char == '2') | |
85 def_or_undef (parse_in, "__k6_2__"); | |
86 else if (last_arch_char == '3') | |
87 def_or_undef (parse_in, "__k6_3__"); | |
88 else if (isa_flag & OPTION_MASK_ISA_3DNOW) | |
89 def_or_undef (parse_in, "__k6_3__"); | |
90 break; | |
91 case PROCESSOR_ATHLON: | |
92 def_or_undef (parse_in, "__athlon"); | |
93 def_or_undef (parse_in, "__athlon__"); | |
94 if (isa_flag & OPTION_MASK_ISA_SSE) | |
95 def_or_undef (parse_in, "__athlon_sse__"); | |
96 break; | |
97 case PROCESSOR_K8: | |
98 def_or_undef (parse_in, "__k8"); | |
99 def_or_undef (parse_in, "__k8__"); | |
100 break; | |
101 case PROCESSOR_AMDFAM10: | |
102 def_or_undef (parse_in, "__amdfam10"); | |
103 def_or_undef (parse_in, "__amdfam10__"); | |
104 break; | |
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105 case PROCESSOR_BDVER1: |
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106 def_or_undef (parse_in, "__bdver1"); |
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107 def_or_undef (parse_in, "__bdver1__"); |
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108 break; |
111 | 109 case PROCESSOR_BDVER2: |
110 def_or_undef (parse_in, "__bdver2"); | |
111 def_or_undef (parse_in, "__bdver2__"); | |
112 break; | |
113 case PROCESSOR_BDVER3: | |
114 def_or_undef (parse_in, "__bdver3"); | |
115 def_or_undef (parse_in, "__bdver3__"); | |
116 break; | |
117 case PROCESSOR_BDVER4: | |
118 def_or_undef (parse_in, "__bdver4"); | |
119 def_or_undef (parse_in, "__bdver4__"); | |
120 break; | |
121 case PROCESSOR_ZNVER1: | |
122 def_or_undef (parse_in, "__znver1"); | |
123 def_or_undef (parse_in, "__znver1__"); | |
124 break; | |
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125 case PROCESSOR_BTVER1: |
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126 def_or_undef (parse_in, "__btver1"); |
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127 def_or_undef (parse_in, "__btver1__"); |
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128 break; |
111 | 129 case PROCESSOR_BTVER2: |
130 def_or_undef (parse_in, "__btver2"); | |
131 def_or_undef (parse_in, "__btver2__"); | |
132 break; | |
0 | 133 case PROCESSOR_PENTIUM4: |
134 def_or_undef (parse_in, "__pentium4"); | |
135 def_or_undef (parse_in, "__pentium4__"); | |
136 break; | |
137 case PROCESSOR_NOCONA: | |
138 def_or_undef (parse_in, "__nocona"); | |
139 def_or_undef (parse_in, "__nocona__"); | |
140 break; | |
111 | 141 case PROCESSOR_CORE2: |
0 | 142 def_or_undef (parse_in, "__core2"); |
143 def_or_undef (parse_in, "__core2__"); | |
144 break; | |
111 | 145 case PROCESSOR_NEHALEM: |
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146 def_or_undef (parse_in, "__corei7"); |
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147 def_or_undef (parse_in, "__corei7__"); |
111 | 148 def_or_undef (parse_in, "__nehalem"); |
149 def_or_undef (parse_in, "__nehalem__"); | |
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150 break; |
111 | 151 case PROCESSOR_SANDYBRIDGE: |
152 def_or_undef (parse_in, "__corei7_avx"); | |
153 def_or_undef (parse_in, "__corei7_avx__"); | |
154 def_or_undef (parse_in, "__sandybridge"); | |
155 def_or_undef (parse_in, "__sandybridge__"); | |
156 break; | |
157 case PROCESSOR_HASWELL: | |
158 def_or_undef (parse_in, "__core_avx2"); | |
159 def_or_undef (parse_in, "__core_avx2__"); | |
160 def_or_undef (parse_in, "__haswell"); | |
161 def_or_undef (parse_in, "__haswell__"); | |
162 break; | |
163 case PROCESSOR_BONNELL: | |
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164 def_or_undef (parse_in, "__atom"); |
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165 def_or_undef (parse_in, "__atom__"); |
111 | 166 def_or_undef (parse_in, "__bonnell"); |
167 def_or_undef (parse_in, "__bonnell__"); | |
168 break; | |
169 case PROCESSOR_SILVERMONT: | |
170 def_or_undef (parse_in, "__slm"); | |
171 def_or_undef (parse_in, "__slm__"); | |
172 def_or_undef (parse_in, "__silvermont"); | |
173 def_or_undef (parse_in, "__silvermont__"); | |
174 break; | |
175 case PROCESSOR_KNL: | |
176 def_or_undef (parse_in, "__knl"); | |
177 def_or_undef (parse_in, "__knl__"); | |
178 break; | |
179 case PROCESSOR_KNM: | |
180 def_or_undef (parse_in, "__knm"); | |
181 def_or_undef (parse_in, "__knm__"); | |
182 break; | |
183 case PROCESSOR_SKYLAKE_AVX512: | |
184 def_or_undef (parse_in, "__skylake_avx512"); | |
185 def_or_undef (parse_in, "__skylake_avx512__"); | |
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186 break; |
0 | 187 /* use PROCESSOR_max to not set/unset the arch macro. */ |
188 case PROCESSOR_max: | |
189 break; | |
111 | 190 case PROCESSOR_INTEL: |
191 case PROCESSOR_GENERIC: | |
0 | 192 gcc_unreachable (); |
193 } | |
194 | |
195 /* Built-ins based on -mtune=. */ | |
196 switch (tune) | |
197 { | |
198 case PROCESSOR_I386: | |
199 def_or_undef (parse_in, "__tune_i386__"); | |
200 break; | |
201 case PROCESSOR_I486: | |
202 def_or_undef (parse_in, "__tune_i486__"); | |
203 break; | |
204 case PROCESSOR_PENTIUM: | |
205 def_or_undef (parse_in, "__tune_i586__"); | |
206 def_or_undef (parse_in, "__tune_pentium__"); | |
207 if (last_tune_char == 'x') | |
208 def_or_undef (parse_in, "__tune_pentium_mmx__"); | |
209 break; | |
210 case PROCESSOR_PENTIUMPRO: | |
211 def_or_undef (parse_in, "__tune_i686__"); | |
212 def_or_undef (parse_in, "__tune_pentiumpro__"); | |
213 switch (last_tune_char) | |
214 { | |
215 case '3': | |
216 def_or_undef (parse_in, "__tune_pentium3__"); | |
217 /* FALLTHRU */ | |
218 case '2': | |
219 def_or_undef (parse_in, "__tune_pentium2__"); | |
220 break; | |
221 } | |
222 break; | |
223 case PROCESSOR_GEODE: | |
224 def_or_undef (parse_in, "__tune_geode__"); | |
225 break; | |
226 case PROCESSOR_K6: | |
227 def_or_undef (parse_in, "__tune_k6__"); | |
228 if (last_tune_char == '2') | |
229 def_or_undef (parse_in, "__tune_k6_2__"); | |
230 else if (last_tune_char == '3') | |
231 def_or_undef (parse_in, "__tune_k6_3__"); | |
232 else if (isa_flag & OPTION_MASK_ISA_3DNOW) | |
233 def_or_undef (parse_in, "__tune_k6_3__"); | |
234 break; | |
235 case PROCESSOR_ATHLON: | |
236 def_or_undef (parse_in, "__tune_athlon__"); | |
237 if (isa_flag & OPTION_MASK_ISA_SSE) | |
238 def_or_undef (parse_in, "__tune_athlon_sse__"); | |
239 break; | |
240 case PROCESSOR_K8: | |
241 def_or_undef (parse_in, "__tune_k8__"); | |
242 break; | |
243 case PROCESSOR_AMDFAM10: | |
244 def_or_undef (parse_in, "__tune_amdfam10__"); | |
245 break; | |
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246 case PROCESSOR_BDVER1: |
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247 def_or_undef (parse_in, "__tune_bdver1__"); |
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248 break; |
111 | 249 case PROCESSOR_BDVER2: |
250 def_or_undef (parse_in, "__tune_bdver2__"); | |
251 break; | |
252 case PROCESSOR_BDVER3: | |
253 def_or_undef (parse_in, "__tune_bdver3__"); | |
254 break; | |
255 case PROCESSOR_BDVER4: | |
256 def_or_undef (parse_in, "__tune_bdver4__"); | |
257 break; | |
258 case PROCESSOR_ZNVER1: | |
259 def_or_undef (parse_in, "__tune_znver1__"); | |
260 break; | |
261 case PROCESSOR_BTVER1: | |
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262 def_or_undef (parse_in, "__tune_btver1__"); |
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263 break; |
111 | 264 case PROCESSOR_BTVER2: |
265 def_or_undef (parse_in, "__tune_btver2__"); | |
266 break; | |
0 | 267 case PROCESSOR_PENTIUM4: |
268 def_or_undef (parse_in, "__tune_pentium4__"); | |
269 break; | |
270 case PROCESSOR_NOCONA: | |
271 def_or_undef (parse_in, "__tune_nocona__"); | |
272 break; | |
111 | 273 case PROCESSOR_CORE2: |
0 | 274 def_or_undef (parse_in, "__tune_core2__"); |
275 break; | |
111 | 276 case PROCESSOR_NEHALEM: |
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277 def_or_undef (parse_in, "__tune_corei7__"); |
111 | 278 def_or_undef (parse_in, "__tune_nehalem__"); |
279 break; | |
280 case PROCESSOR_SANDYBRIDGE: | |
281 def_or_undef (parse_in, "__tune_corei7_avx__"); | |
282 def_or_undef (parse_in, "__tune_sandybridge__"); | |
283 break; | |
284 case PROCESSOR_HASWELL: | |
285 def_or_undef (parse_in, "__tune_core_avx2__"); | |
286 def_or_undef (parse_in, "__tune_haswell__"); | |
287 break; | |
288 case PROCESSOR_BONNELL: | |
289 def_or_undef (parse_in, "__tune_atom__"); | |
290 def_or_undef (parse_in, "__tune_bonnell__"); | |
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291 break; |
111 | 292 case PROCESSOR_SILVERMONT: |
293 def_or_undef (parse_in, "__tune_slm__"); | |
294 def_or_undef (parse_in, "__tune_silvermont__"); | |
295 break; | |
296 case PROCESSOR_KNL: | |
297 def_or_undef (parse_in, "__tune_knl__"); | |
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298 break; |
111 | 299 case PROCESSOR_KNM: |
300 def_or_undef (parse_in, "__tune_knm__"); | |
301 break; | |
302 case PROCESSOR_SKYLAKE_AVX512: | |
303 def_or_undef (parse_in, "__tune_skylake_avx512__"); | |
304 break; | |
305 case PROCESSOR_LAKEMONT: | |
306 def_or_undef (parse_in, "__tune_lakemont__"); | |
307 break; | |
308 case PROCESSOR_INTEL: | |
309 case PROCESSOR_GENERIC: | |
0 | 310 break; |
311 /* use PROCESSOR_max to not set/unset the tune macro. */ | |
312 case PROCESSOR_max: | |
313 break; | |
314 } | |
315 | |
111 | 316 switch (ix86_cmodel) |
317 { | |
318 case CM_SMALL: | |
319 case CM_SMALL_PIC: | |
320 def_or_undef (parse_in, "__code_model_small__"); | |
321 break; | |
322 case CM_MEDIUM: | |
323 case CM_MEDIUM_PIC: | |
324 def_or_undef (parse_in, "__code_model_medium__"); | |
325 break; | |
326 case CM_LARGE: | |
327 case CM_LARGE_PIC: | |
328 def_or_undef (parse_in, "__code_model_large__"); | |
329 break; | |
330 case CM_32: | |
331 def_or_undef (parse_in, "__code_model_32__"); | |
332 break; | |
333 case CM_KERNEL: | |
334 def_or_undef (parse_in, "__code_model_kernel__"); | |
335 break; | |
336 default: | |
337 ; | |
338 } | |
339 | |
0 | 340 if (isa_flag & OPTION_MASK_ISA_MMX) |
341 def_or_undef (parse_in, "__MMX__"); | |
342 if (isa_flag & OPTION_MASK_ISA_3DNOW) | |
343 def_or_undef (parse_in, "__3dNOW__"); | |
344 if (isa_flag & OPTION_MASK_ISA_3DNOW_A) | |
345 def_or_undef (parse_in, "__3dNOW_A__"); | |
346 if (isa_flag & OPTION_MASK_ISA_SSE) | |
347 def_or_undef (parse_in, "__SSE__"); | |
348 if (isa_flag & OPTION_MASK_ISA_SSE2) | |
349 def_or_undef (parse_in, "__SSE2__"); | |
350 if (isa_flag & OPTION_MASK_ISA_SSE3) | |
351 def_or_undef (parse_in, "__SSE3__"); | |
352 if (isa_flag & OPTION_MASK_ISA_SSSE3) | |
353 def_or_undef (parse_in, "__SSSE3__"); | |
354 if (isa_flag & OPTION_MASK_ISA_SSE4_1) | |
355 def_or_undef (parse_in, "__SSE4_1__"); | |
356 if (isa_flag & OPTION_MASK_ISA_SSE4_2) | |
357 def_or_undef (parse_in, "__SSE4_2__"); | |
358 if (isa_flag & OPTION_MASK_ISA_AES) | |
359 def_or_undef (parse_in, "__AES__"); | |
111 | 360 if (isa_flag & OPTION_MASK_ISA_SHA) |
361 def_or_undef (parse_in, "__SHA__"); | |
0 | 362 if (isa_flag & OPTION_MASK_ISA_PCLMUL) |
363 def_or_undef (parse_in, "__PCLMUL__"); | |
364 if (isa_flag & OPTION_MASK_ISA_AVX) | |
365 def_or_undef (parse_in, "__AVX__"); | |
111 | 366 if (isa_flag & OPTION_MASK_ISA_AVX2) |
367 def_or_undef (parse_in, "__AVX2__"); | |
368 if (isa_flag & OPTION_MASK_ISA_AVX512F) | |
369 def_or_undef (parse_in, "__AVX512F__"); | |
370 if (isa_flag & OPTION_MASK_ISA_AVX512ER) | |
371 def_or_undef (parse_in, "__AVX512ER__"); | |
372 if (isa_flag & OPTION_MASK_ISA_AVX512CD) | |
373 def_or_undef (parse_in, "__AVX512CD__"); | |
374 if (isa_flag & OPTION_MASK_ISA_AVX512PF) | |
375 def_or_undef (parse_in, "__AVX512PF__"); | |
376 if (isa_flag & OPTION_MASK_ISA_AVX512DQ) | |
377 def_or_undef (parse_in, "__AVX512DQ__"); | |
378 if (isa_flag & OPTION_MASK_ISA_AVX512BW) | |
379 def_or_undef (parse_in, "__AVX512BW__"); | |
380 if (isa_flag & OPTION_MASK_ISA_AVX512VL) | |
381 def_or_undef (parse_in, "__AVX512VL__"); | |
382 if (isa_flag & OPTION_MASK_ISA_AVX512VBMI) | |
383 def_or_undef (parse_in, "__AVX512VBMI__"); | |
384 if (isa_flag & OPTION_MASK_ISA_AVX512IFMA) | |
385 def_or_undef (parse_in, "__AVX512IFMA__"); | |
386 if (isa_flag2 & OPTION_MASK_ISA_AVX5124VNNIW) | |
387 def_or_undef (parse_in, "__AVX5124VNNIW__"); | |
388 if (isa_flag2 & OPTION_MASK_ISA_SGX) | |
389 def_or_undef (parse_in, "__SGX__"); | |
390 if (isa_flag2 & OPTION_MASK_ISA_AVX5124FMAPS) | |
391 def_or_undef (parse_in, "__AVX5124FMAPS__"); | |
392 if (isa_flag2 & OPTION_MASK_ISA_AVX512VPOPCNTDQ) | |
393 def_or_undef (parse_in, "__AVX512VPOPCNTDQ__"); | |
0 | 394 if (isa_flag & OPTION_MASK_ISA_FMA) |
395 def_or_undef (parse_in, "__FMA__"); | |
111 | 396 if (isa_flag & OPTION_MASK_ISA_RTM) |
397 def_or_undef (parse_in, "__RTM__"); | |
0 | 398 if (isa_flag & OPTION_MASK_ISA_SSE4A) |
399 def_or_undef (parse_in, "__SSE4A__"); | |
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400 if (isa_flag & OPTION_MASK_ISA_FMA4) |
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401 def_or_undef (parse_in, "__FMA4__"); |
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402 if (isa_flag & OPTION_MASK_ISA_XOP) |
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403 def_or_undef (parse_in, "__XOP__"); |
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404 if (isa_flag & OPTION_MASK_ISA_LWP) |
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405 def_or_undef (parse_in, "__LWP__"); |
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406 if (isa_flag & OPTION_MASK_ISA_ABM) |
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407 def_or_undef (parse_in, "__ABM__"); |
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408 if (isa_flag & OPTION_MASK_ISA_BMI) |
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409 def_or_undef (parse_in, "__BMI__"); |
111 | 410 if (isa_flag & OPTION_MASK_ISA_BMI2) |
411 def_or_undef (parse_in, "__BMI2__"); | |
412 if (isa_flag & OPTION_MASK_ISA_LZCNT) | |
413 def_or_undef (parse_in, "__LZCNT__"); | |
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414 if (isa_flag & OPTION_MASK_ISA_TBM) |
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415 def_or_undef (parse_in, "__TBM__"); |
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416 if (isa_flag & OPTION_MASK_ISA_POPCNT) |
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417 def_or_undef (parse_in, "__POPCNT__"); |
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418 if (isa_flag & OPTION_MASK_ISA_FSGSBASE) |
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419 def_or_undef (parse_in, "__FSGSBASE__"); |
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420 if (isa_flag & OPTION_MASK_ISA_RDRND) |
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421 def_or_undef (parse_in, "__RDRND__"); |
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422 if (isa_flag & OPTION_MASK_ISA_F16C) |
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423 def_or_undef (parse_in, "__F16C__"); |
111 | 424 if (isa_flag & OPTION_MASK_ISA_RDSEED) |
425 def_or_undef (parse_in, "__RDSEED__"); | |
426 if (isa_flag & OPTION_MASK_ISA_PRFCHW) | |
427 def_or_undef (parse_in, "__PRFCHW__"); | |
428 if (isa_flag & OPTION_MASK_ISA_ADX) | |
429 def_or_undef (parse_in, "__ADX__"); | |
430 if (isa_flag & OPTION_MASK_ISA_FXSR) | |
431 def_or_undef (parse_in, "__FXSR__"); | |
432 if (isa_flag & OPTION_MASK_ISA_XSAVE) | |
433 def_or_undef (parse_in, "__XSAVE__"); | |
434 if (isa_flag & OPTION_MASK_ISA_XSAVEOPT) | |
435 def_or_undef (parse_in, "__XSAVEOPT__"); | |
436 if (isa_flag & OPTION_MASK_ISA_PREFETCHWT1) | |
437 def_or_undef (parse_in, "__PREFETCHWT1__"); | |
0 | 438 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE)) |
439 def_or_undef (parse_in, "__SSE_MATH__"); | |
440 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2)) | |
441 def_or_undef (parse_in, "__SSE2_MATH__"); | |
111 | 442 if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT) |
443 def_or_undef (parse_in, "__CLFLUSHOPT__"); | |
444 if (isa_flag & OPTION_MASK_ISA_CLZERO) | |
445 def_or_undef (parse_in, "__CLZERO__"); | |
446 if (isa_flag & OPTION_MASK_ISA_XSAVEC) | |
447 def_or_undef (parse_in, "__XSAVEC__"); | |
448 if (isa_flag & OPTION_MASK_ISA_XSAVES) | |
449 def_or_undef (parse_in, "__XSAVES__"); | |
450 if (isa_flag & OPTION_MASK_ISA_MPX) | |
451 def_or_undef (parse_in, "__MPX__"); | |
452 if (isa_flag & OPTION_MASK_ISA_CLWB) | |
453 def_or_undef (parse_in, "__CLWB__"); | |
454 if (isa_flag & OPTION_MASK_ISA_MWAITX) | |
455 def_or_undef (parse_in, "__MWAITX__"); | |
456 if (isa_flag & OPTION_MASK_ISA_PKU) | |
457 def_or_undef (parse_in, "__PKU__"); | |
458 if (isa_flag2 & OPTION_MASK_ISA_RDPID) | |
459 def_or_undef (parse_in, "__RDPID__"); | |
460 if (isa_flag2 & OPTION_MASK_ISA_GFNI) | |
461 def_or_undef (parse_in, "__GFNI__"); | |
462 if (isa_flag2 & OPTION_MASK_ISA_IBT) | |
463 { | |
464 def_or_undef (parse_in, "__IBT__"); | |
465 if (flag_cf_protection != CF_NONE) | |
466 def_or_undef (parse_in, "__CET__"); | |
467 } | |
468 if (isa_flag2 & OPTION_MASK_ISA_SHSTK) | |
469 { | |
470 def_or_undef (parse_in, "__SHSTK__"); | |
471 if (flag_cf_protection != CF_NONE) | |
472 def_or_undef (parse_in, "__CET__"); | |
473 } | |
474 if (TARGET_IAMCU) | |
475 { | |
476 def_or_undef (parse_in, "__iamcu"); | |
477 def_or_undef (parse_in, "__iamcu__"); | |
478 } | |
0 | 479 } |
480 | |
481 | |
482 /* Hook to validate the current #pragma GCC target and set the state, and | |
483 update the macros based on what was changed. If ARGS is NULL, then | |
484 POP_TARGET is used to reset the options. */ | |
485 | |
486 static bool | |
487 ix86_pragma_target_parse (tree args, tree pop_target) | |
488 { | |
111 | 489 tree prev_tree = build_target_option_node (&global_options); |
0 | 490 tree cur_tree; |
491 struct cl_target_option *prev_opt; | |
492 struct cl_target_option *cur_opt; | |
111 | 493 HOST_WIDE_INT prev_isa; |
494 HOST_WIDE_INT cur_isa; | |
495 HOST_WIDE_INT diff_isa; | |
496 HOST_WIDE_INT prev_isa2; | |
497 HOST_WIDE_INT cur_isa2; | |
498 HOST_WIDE_INT diff_isa2; | |
0 | 499 enum processor_type prev_arch; |
500 enum processor_type prev_tune; | |
501 enum processor_type cur_arch; | |
502 enum processor_type cur_tune; | |
503 | |
504 if (! args) | |
505 { | |
111 | 506 cur_tree = (pop_target ? pop_target : target_option_default_node); |
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507 cl_target_option_restore (&global_options, |
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508 TREE_TARGET_OPTION (cur_tree)); |
0 | 509 } |
510 else | |
511 { | |
111 | 512 cur_tree = ix86_valid_target_attribute_tree (args, &global_options, |
513 &global_options_set); | |
514 if (!cur_tree || cur_tree == error_mark_node) | |
515 { | |
516 cl_target_option_restore (&global_options, | |
517 TREE_TARGET_OPTION (prev_tree)); | |
518 return false; | |
519 } | |
0 | 520 } |
521 | |
522 target_option_current_node = cur_tree; | |
111 | 523 ix86_reset_previous_fndecl (); |
0 | 524 |
525 /* Figure out the previous/current isa, arch, tune and the differences. */ | |
526 prev_opt = TREE_TARGET_OPTION (prev_tree); | |
527 cur_opt = TREE_TARGET_OPTION (cur_tree); | |
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528 prev_isa = prev_opt->x_ix86_isa_flags; |
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529 cur_isa = cur_opt->x_ix86_isa_flags; |
0 | 530 diff_isa = (prev_isa ^ cur_isa); |
111 | 531 prev_isa2 = prev_opt->x_ix86_isa_flags2; |
532 cur_isa2 = cur_opt->x_ix86_isa_flags2; | |
533 diff_isa2 = (prev_isa2 ^ cur_isa2); | |
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534 prev_arch = (enum processor_type) prev_opt->arch; |
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535 prev_tune = (enum processor_type) prev_opt->tune; |
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536 cur_arch = (enum processor_type) cur_opt->arch; |
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537 cur_tune = (enum processor_type) cur_opt->tune; |
0 | 538 |
539 /* If the same processor is used for both previous and current options, don't | |
540 change the macros. */ | |
541 if (cur_arch == prev_arch) | |
542 cur_arch = prev_arch = PROCESSOR_max; | |
543 | |
544 if (cur_tune == prev_tune) | |
545 cur_tune = prev_tune = PROCESSOR_max; | |
546 | |
547 /* Undef all of the macros for that are no longer current. */ | |
548 ix86_target_macros_internal (prev_isa & diff_isa, | |
111 | 549 prev_isa2 & diff_isa2, |
0 | 550 prev_arch, |
551 prev_tune, | |
111 | 552 (enum fpmath_unit) prev_opt->x_ix86_fpmath, |
0 | 553 cpp_undef); |
554 | |
111 | 555 /* For the definitions, ensure all newly defined macros are considered |
556 as used for -Wunused-macros. There is no point warning about the | |
557 compiler predefined macros. */ | |
558 cpp_options *cpp_opts = cpp_get_options (parse_in); | |
559 unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros; | |
560 cpp_opts->warn_unused_macros = 0; | |
561 | |
0 | 562 /* Define all of the macros for new options that were just turned on. */ |
563 ix86_target_macros_internal (cur_isa & diff_isa, | |
111 | 564 cur_isa2 & diff_isa2, |
0 | 565 cur_arch, |
566 cur_tune, | |
111 | 567 (enum fpmath_unit) cur_opt->x_ix86_fpmath, |
0 | 568 cpp_define); |
569 | |
111 | 570 cpp_opts->warn_unused_macros = saved_warn_unused_macros; |
571 | |
0 | 572 return true; |
573 } | |
574 | |
575 /* Function to tell the preprocessor about the defines for the current target. */ | |
576 | |
577 void | |
578 ix86_target_macros (void) | |
579 { | |
580 /* 32/64-bit won't change with target specific options, so do the assert and | |
581 builtin_define_std calls here. */ | |
582 if (TARGET_64BIT) | |
583 { | |
584 cpp_assert (parse_in, "cpu=x86_64"); | |
585 cpp_assert (parse_in, "machine=x86_64"); | |
586 cpp_define (parse_in, "__amd64"); | |
587 cpp_define (parse_in, "__amd64__"); | |
588 cpp_define (parse_in, "__x86_64"); | |
589 cpp_define (parse_in, "__x86_64__"); | |
111 | 590 if (TARGET_X32) |
591 { | |
592 cpp_define (parse_in, "_ILP32"); | |
593 cpp_define (parse_in, "__ILP32__"); | |
594 } | |
0 | 595 } |
596 else | |
597 { | |
598 cpp_assert (parse_in, "cpu=i386"); | |
599 cpp_assert (parse_in, "machine=i386"); | |
600 builtin_define_std ("i386"); | |
601 } | |
602 | |
111 | 603 if (!TARGET_80387) |
604 cpp_define (parse_in, "_SOFT_FLOAT"); | |
605 | |
606 if (TARGET_LONG_DOUBLE_64) | |
607 cpp_define (parse_in, "__LONG_DOUBLE_64__"); | |
608 | |
609 if (TARGET_LONG_DOUBLE_128) | |
610 cpp_define (parse_in, "__LONG_DOUBLE_128__"); | |
611 | |
612 if (TARGET_128BIT_LONG_DOUBLE) | |
613 cpp_define (parse_in, "__SIZEOF_FLOAT80__=16"); | |
614 else | |
615 cpp_define (parse_in, "__SIZEOF_FLOAT80__=12"); | |
616 | |
617 cpp_define (parse_in, "__SIZEOF_FLOAT128__=16"); | |
618 | |
619 cpp_define_formatted (parse_in, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE); | |
620 cpp_define_formatted (parse_in, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE); | |
621 | |
622 cpp_define (parse_in, "__GCC_ASM_FLAG_OUTPUTS__"); | |
623 | |
0 | 624 ix86_target_macros_internal (ix86_isa_flags, |
111 | 625 ix86_isa_flags2, |
0 | 626 ix86_arch, |
627 ix86_tune, | |
628 ix86_fpmath, | |
629 cpp_define); | |
111 | 630 |
631 cpp_define (parse_in, "__SEG_FS"); | |
632 cpp_define (parse_in, "__SEG_GS"); | |
0 | 633 } |
634 | |
635 | |
636 /* Register target pragmas. We need to add the hook for parsing #pragma GCC | |
637 option here rather than in i386.c since it will pull in various preprocessor | |
638 functions, and those are not present in languages like fortran without a | |
639 preprocessor. */ | |
640 | |
641 void | |
642 ix86_register_pragmas (void) | |
643 { | |
644 /* Update pragma hook to allow parsing #pragma GCC target. */ | |
645 targetm.target_option.pragma_parse = ix86_pragma_target_parse; | |
646 | |
111 | 647 c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS); |
648 c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS); | |
649 | |
0 | 650 #ifdef REGISTER_SUBTARGET_PRAGMAS |
651 REGISTER_SUBTARGET_PRAGMAS (); | |
652 #endif | |
653 } |