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1 /* Copyright (C) 2004-2017 Free Software Foundation, Inc.
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2
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3 This file is part of GCC.
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4
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5 GCC is free software; you can redistribute it and/or modify
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6 it under the terms of the GNU General Public License as published by
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7 the Free Software Foundation; either version 3, or (at your option)
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8 any later version.
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9
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10 GCC is distributed in the hope that it will be useful,
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11 but WITHOUT ANY WARRANTY; without even the implied warranty of
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12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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13 GNU General Public License for more details.
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14
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15 Under Section 7 of GPL version 3, you are granted additional
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16 permissions described in the GCC Runtime Library Exception, version
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17 3.1, as published by the Free Software Foundation.
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18
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19 You should have received a copy of the GNU General Public License and
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20 a copy of the GCC Runtime Library Exception along with this program;
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21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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22 <http://www.gnu.org/licenses/>. */
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23
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24 /* Implemented from the mm3dnow.h (of supposedly AMD origin) included with
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25 MSVC 7.1. */
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26
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27 #ifndef _MM3DNOW_H_INCLUDED
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28 #define _MM3DNOW_H_INCLUDED
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29
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30 #include <mmintrin.h>
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31 #include <prfchwintrin.h>
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32
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111
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33 #if defined __x86_64__ && !defined __SSE__ || !defined __3dNOW__
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34 #pragma GCC push_options
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35 #ifdef __x86_64__
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36 #pragma GCC target("sse,3dnow")
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37 #else
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38 #pragma GCC target("3dnow")
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39 #endif
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40 #define __DISABLE_3dNOW__
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41 #endif /* __3dNOW__ */
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42
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43 extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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44 _m_femms (void)
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45 {
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46 __builtin_ia32_femms();
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47 }
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48
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49 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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50 _m_pavgusb (__m64 __A, __m64 __B)
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51 {
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52 return (__m64)__builtin_ia32_pavgusb ((__v8qi)__A, (__v8qi)__B);
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53 }
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54
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55 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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56 _m_pf2id (__m64 __A)
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57 {
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58 return (__m64)__builtin_ia32_pf2id ((__v2sf)__A);
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59 }
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60
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61 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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62 _m_pfacc (__m64 __A, __m64 __B)
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63 {
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64 return (__m64)__builtin_ia32_pfacc ((__v2sf)__A, (__v2sf)__B);
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65 }
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66
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67 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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68 _m_pfadd (__m64 __A, __m64 __B)
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69 {
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70 return (__m64)__builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B);
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71 }
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72
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73 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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74 _m_pfcmpeq (__m64 __A, __m64 __B)
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75 {
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76 return (__m64)__builtin_ia32_pfcmpeq ((__v2sf)__A, (__v2sf)__B);
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77 }
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78
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79 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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80 _m_pfcmpge (__m64 __A, __m64 __B)
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81 {
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82 return (__m64)__builtin_ia32_pfcmpge ((__v2sf)__A, (__v2sf)__B);
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83 }
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84
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85 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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86 _m_pfcmpgt (__m64 __A, __m64 __B)
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87 {
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88 return (__m64)__builtin_ia32_pfcmpgt ((__v2sf)__A, (__v2sf)__B);
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89 }
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90
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91 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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92 _m_pfmax (__m64 __A, __m64 __B)
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93 {
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94 return (__m64)__builtin_ia32_pfmax ((__v2sf)__A, (__v2sf)__B);
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95 }
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96
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97 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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98 _m_pfmin (__m64 __A, __m64 __B)
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99 {
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100 return (__m64)__builtin_ia32_pfmin ((__v2sf)__A, (__v2sf)__B);
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101 }
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102
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103 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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104 _m_pfmul (__m64 __A, __m64 __B)
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105 {
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106 return (__m64)__builtin_ia32_pfmul ((__v2sf)__A, (__v2sf)__B);
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107 }
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108
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109 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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110 _m_pfrcp (__m64 __A)
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111 {
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112 return (__m64)__builtin_ia32_pfrcp ((__v2sf)__A);
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113 }
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114
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115 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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116 _m_pfrcpit1 (__m64 __A, __m64 __B)
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117 {
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118 return (__m64)__builtin_ia32_pfrcpit1 ((__v2sf)__A, (__v2sf)__B);
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119 }
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120
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121 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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122 _m_pfrcpit2 (__m64 __A, __m64 __B)
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123 {
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124 return (__m64)__builtin_ia32_pfrcpit2 ((__v2sf)__A, (__v2sf)__B);
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125 }
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126
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127 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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128 _m_pfrsqrt (__m64 __A)
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129 {
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130 return (__m64)__builtin_ia32_pfrsqrt ((__v2sf)__A);
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131 }
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132
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133 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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134 _m_pfrsqit1 (__m64 __A, __m64 __B)
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135 {
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136 return (__m64)__builtin_ia32_pfrsqit1 ((__v2sf)__A, (__v2sf)__B);
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137 }
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138
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139 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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140 _m_pfsub (__m64 __A, __m64 __B)
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141 {
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142 return (__m64)__builtin_ia32_pfsub ((__v2sf)__A, (__v2sf)__B);
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143 }
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144
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145 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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146 _m_pfsubr (__m64 __A, __m64 __B)
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147 {
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148 return (__m64)__builtin_ia32_pfsubr ((__v2sf)__A, (__v2sf)__B);
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149 }
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150
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151 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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152 _m_pi2fd (__m64 __A)
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153 {
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154 return (__m64)__builtin_ia32_pi2fd ((__v2si)__A);
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155 }
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156
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157 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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158 _m_pmulhrw (__m64 __A, __m64 __B)
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159 {
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160 return (__m64)__builtin_ia32_pmulhrw ((__v4hi)__A, (__v4hi)__B);
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161 }
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162
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163 extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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164 _m_prefetch (void *__P)
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165 {
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166 __builtin_prefetch (__P, 0, 3 /* _MM_HINT_T0 */);
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167 }
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168
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169 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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170 _m_from_float (float __A)
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171 {
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172 return __extension__ (__m64)(__v2sf){ __A, 0.0f };
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173 }
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174
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175 extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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176 _m_to_float (__m64 __A)
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177 {
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178 union { __v2sf v; float a[2]; } __tmp;
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179 __tmp.v = (__v2sf)__A;
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180 return __tmp.a[0];
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181 }
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182
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183 #ifdef __DISABLE_3dNOW__
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184 #undef __DISABLE_3dNOW__
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185 #pragma GCC pop_options
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186 #endif /* __DISABLE_3dNOW__ */
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187
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188 #if defined __x86_64__ && !defined __SSE__ || !defined __3dNOW_A__
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189 #pragma GCC push_options
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190 #ifdef __x86_64__
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191 #pragma GCC target("sse,3dnowa")
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192 #else
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193 #pragma GCC target("3dnowa")
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194 #endif
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195 #define __DISABLE_3dNOW_A__
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196 #endif /* __3dNOW_A__ */
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197
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198 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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199 _m_pf2iw (__m64 __A)
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200 {
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201 return (__m64)__builtin_ia32_pf2iw ((__v2sf)__A);
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202 }
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203
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204 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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205 _m_pfnacc (__m64 __A, __m64 __B)
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206 {
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207 return (__m64)__builtin_ia32_pfnacc ((__v2sf)__A, (__v2sf)__B);
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208 }
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209
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210 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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211 _m_pfpnacc (__m64 __A, __m64 __B)
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212 {
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213 return (__m64)__builtin_ia32_pfpnacc ((__v2sf)__A, (__v2sf)__B);
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214 }
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215
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216 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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217 _m_pi2fw (__m64 __A)
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218 {
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219 return (__m64)__builtin_ia32_pi2fw ((__v2si)__A);
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220 }
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221
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222 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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223 _m_pswapd (__m64 __A)
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224 {
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225 return (__m64)__builtin_ia32_pswapdsf ((__v2sf)__A);
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226 }
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227
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228 #ifdef __DISABLE_3dNOW_A__
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229 #undef __DISABLE_3dNOW_A__
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230 #pragma GCC pop_options
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231 #endif /* __DISABLE_3dNOW_A__ */
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232
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233 #endif /* _MM3DNOW_H_INCLUDED */
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