CbC/CbC_gcc: gcc/config/microblaze/microblaze.md annotate

annotate gcc/config/microblaze/microblaze.md @ 111:04ced10e8804

gcc 7

author	kono
date	Fri, 27 Oct 2017 22:46:09 +0900
parents	561a7518be6b
children	84e7813d76e9

rev	line source
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1 ;; microblaze.md -- Machine description for Xilinx MicroBlaze processors.
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	2 ;; Copyright (C) 2009-2017 Free Software Foundation, Inc.
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	3
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	4 ;; Contributed by Michael Eager <eager@eagercon.com>.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	5
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	6 ;; This file is part of GCC.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	7
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	8 ;; GCC is free software; you can redistribute it and/or modify
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	9 ;; it under the terms of the GNU General Public License as published by
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	10 ;; the Free Software Foundation; either version 3, or (at your option)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	11 ;; any later version.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	12
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	13 ;; GCC is distributed in the hope that it will be useful,
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	14 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	15 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	16 ;; GNU General Public License for more details.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	17
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	18 ;; You should have received a copy of the GNU General Public License
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	19 ;; along with GCC; see the file COPYING3. If not see
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	20 ;; <http://www.gnu.org/licenses/>. */
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	21
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	22 (include "constraints.md")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	23 (include "predicates.md")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	24
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	25 ;;----------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	26 ;; Constants
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	27 ;;----------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	28 (define_constants [
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	29 (R_SP 1) ;; Stack pointer reg
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	30 (R_SR 15) ;; Sub-routine return addr reg
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	31 (R_IR 14) ;; Interrupt return addr reg
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	32 (R_DR 16) ;; Debug trap return addr reg
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	33 (R_ER 17) ;; Exception return addr reg
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	34 (R_TMP 18) ;; Assembler temporary reg
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	35 (R_GOT 20) ;; GOT ptr reg
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	36 (MB_PIPE_3 0) ;; Microblaze 3-stage pipeline
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	37 (MB_PIPE_5 1) ;; Microblaze 5-stage pipeline
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	38 (UNSPEC_SET_GOT 101) ;;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	39 (UNSPEC_GOTOFF 102) ;; GOT offset
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	40 (UNSPEC_PLT 103) ;; jump table
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	41 (UNSPEC_CMP 104) ;; signed compare
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	42 (UNSPEC_CMPU 105) ;; unsigned compare
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	43 (UNSPEC_TLS 106) ;; jump table
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	44 ])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	45
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	46 (define_c_enum "unspec" [
04ced10e8804 gcc 7 kono parents: 68 diff changeset	47 UNSPEC_IPREFETCH
04ced10e8804 gcc 7 kono parents: 68 diff changeset	48 ])
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	49
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	50 ;;----------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	51 ;; Instruction Attributes
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	52 ;;----------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	53
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	54 ;; Classification of each insn.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	55 ;; branch conditional branch
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	56 ;; jump unconditional jump
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	57 ;; call unconditional call
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	58 ;; load load instruction(s)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	59 ;; store store instruction(s)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	60 ;; move data movement within same register set
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	61 ;; arith integer arithmetic instruction
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	62 ;; darith double precision integer arithmetic instructions
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	63 ;; imul integer multiply
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	64 ;; idiv integer divide
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	65 ;; icmp integer compare
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	66 ;; Xfadd floating point add/subtract
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	67 ;; Xfmul floating point multiply
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	68 ;; Xfmadd floating point multiply-add
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	69 ;; Xfdiv floating point divide
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	70 ;; Xfabs floating point absolute value
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	71 ;; Xfneg floating point negation
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	72 ;; Xfcmp floating point compare
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	73 ;; Xfcvt floating point convert
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	74 ;; Xfsqrt floating point square root
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	75 ;; multi multiword sequence (or user asm statements)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	76 ;; nop no operation
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	77 ;; bshift Shift operations
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	78
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	79 (define_attr "type"
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	80 "unknown,branch,jump,call,load,store,move,arith,darith,imul,idiv,icmp,multi,nop,no_delay_arith,no_delay_load,no_delay_store,no_delay_imul,no_delay_move,bshift,fadd,frsub,fmul,fdiv,fcmp,fsl,fsqrt,fcvt,trap"
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	81 (const_string "unknown"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	82
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	83 ;; Main data type used by the insn
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	84 (define_attr "mode" "unknown,none,QI,HI,SI,DI,SF,DF" (const_string "unknown"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	85
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	86 ;; # instructions (4 bytes each)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	87 (define_attr "length" "" (const_int 4))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	88
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	89 (define_code_iterator any_return [return simple_return])
04ced10e8804 gcc 7 kono parents: 68 diff changeset	90
04ced10e8804 gcc 7 kono parents: 68 diff changeset	91 ;; <optab> expands to the name of the optab for a particular code.
04ced10e8804 gcc 7 kono parents: 68 diff changeset	92 (define_code_attr optab [(return "return")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	93 (simple_return "simple_return")])
04ced10e8804 gcc 7 kono parents: 68 diff changeset	94
04ced10e8804 gcc 7 kono parents: 68 diff changeset	95
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	96 ;;----------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	97 ;; Attribute describing the processor.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	98 ;;----------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	99
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	100 ;; Describe a user's asm statement.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	101 (define_asm_attributes
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	102 [(set_attr "type" "multi")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	103
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	104 ;; whether or not generating calls to position independent functions
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	105 (define_attr "abicalls" "no,yes"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	106 (const (symbol_ref "microblaze_abicalls_attr")))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	107
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	108 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	109 ;; Microblaze DFA Pipeline description
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	110 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	111
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	112 ;;-----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	113 /*
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	114 This is description of pipeline hazards based on DFA. The
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	115 following constructions can be used for this:
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	116
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	117 o define_cpu_unit string [string]) describes a cpu functional unit
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	118 (separated by comma).
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	119
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	120 1st operand: Names of cpu function units.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	121 2nd operand: Name of automaton (see comments for
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	122 DEFINE_AUTOMATON).
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	123
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	124 All define_reservations and define_cpu_units should have unique
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	125 names which can not be "nothing".
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	126
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	127 o (exclusion_set string string) means that each CPU function unit
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	128 in the first string can not be reserved simultaneously with each
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	129 unit whose name is in the second string and vise versa. CPU
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	130 units in the string are separated by commas. For example, it is
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	131 useful for description CPU with fully pipelined floating point
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	132 functional unit which can execute simultaneously only single
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	133 floating point insns or only double floating point insns.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	134
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	135 o (presence_set string string) means that each CPU function unit in
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	136 the first string can not be reserved unless at least one of units
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	137 whose names are in the second string is reserved. This is an
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	138 asymmetric relation. CPU units in the string are separated by
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	139 commas. For example, it is useful for description that slot1 is
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	140 reserved after slot0 reservation for a VLIW processor.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	141
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	142 o (absence_set string string) means that each CPU function unit in
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	143 the first string can not be reserved only if each unit whose name
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	144 is in the second string is not reserved. This is an asymmetric
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	145 relation (actually exclusion set is analogous to this one but it
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	146 is symmetric). CPU units in the string are separated by commas.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	147 For example, it is useful for description that slot0 can not be
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	148 reserved after slot1 or slot2 reservation for a VLIW processor.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	149
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	150 o (define_bypass number out_insn_names in_insn_names) names bypass with
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	151 given latency (the first number) from insns given by the first
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	152 string (see define_insn_reservation) into insns given by the
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	153 second string. Insn names in the strings are separated by
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	154 commas.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	155
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	156 o (define_automaton string) describes names of an automaton
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	157 generated and used for pipeline hazards recognition. The names
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	158 are separated by comma. Actually it is possibly to generate the
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	159 single automaton but unfortunately it can be very large. If we
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	160 use more one automata, the summary size of the automata usually
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	161 is less than the single one. The automaton name is used in
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	162 define_cpu_unit. All automata should have unique names.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	163
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	164 o (define_reservation string string) names reservation (the first
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	165 string) of cpu functional units (the 2nd string). Sometimes unit
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	166 reservations for different insns contain common parts. In such
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	167 case, you describe common part and use one its name (the 1st
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	168 parameter) in regular expression in define_insn_reservation. All
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	169 define_reservations, define results and define_cpu_units should
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	170 have unique names which can not be "nothing".
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	171
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	172 o (define_insn_reservation name default_latency condition regexpr)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	173 describes reservation of cpu functional units (the 3nd operand)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	174 for instruction which is selected by the condition (the 2nd
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	175 parameter). The first parameter is used for output of debugging
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	176 information. The reservations are described by a regular
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	177 expression according the following syntax:
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	178
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	179 regexp = regexp "," oneof
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	180 \| oneof
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	181
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	182 oneof = oneof "\|" allof
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	183 \| allof
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	184
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	185 allof = allof "+" repeat
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	186 \| repeat
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	187
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	188 repeat = element "*" number
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	189 \| element
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	190
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	191 element = cpu_function_name
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	192 \| reservation_name
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	193 \| result_name
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	194 \| "nothing"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	195 \| "(" regexp ")"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	196
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	197 1. "," is used for describing start of the next cycle in
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	198 reservation.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	199
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	200 2. "\|" is used for describing the reservation described by the
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	201 first regular expression or the reservation described by
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	202 the second regular expression or etc.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	203
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	204 3. "+" is used for describing the reservation described by the
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	205 first regular expression and the reservation described by
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	206 the second regular expression and etc.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	207
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	208 4. "*" is used for convenience and simply means sequence in
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	209 which the regular expression are repeated NUMBER times with
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	210 cycle advancing (see ",").
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	211
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	212 5. cpu function unit name which means reservation.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	213
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	214 6. reservation name -- see define_reservation.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	215
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	216 7. string "nothing" means no units reservation.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	217
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	218 */
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	219 ;;-----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	220
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	221
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	222 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	223 ;; Microblaze 5-stage pipeline description (v5.00.a and later)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	224 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	225
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	226 (define_automaton "mbpipe_5")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	227 (define_cpu_unit "mb_issue,mb_iu,mb_wb,mb_fpu,mb_fpu_2,mb_mul,mb_mul_2,mb_div,mb_div_2,mb_bs,mb_bs_2" "mbpipe_5")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	228
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	229 (define_insn_reservation "mb-integer" 1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	230 (and (eq_attr "type" "branch,jump,call,arith,darith,icmp,nop,no_delay_arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	231 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_5)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	232 "mb_issue,mb_iu,mb_wb")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	233
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	234 (define_insn_reservation "mb-special-move" 2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	235 (and (eq_attr "type" "move")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	236 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_5)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	237 "mb_issue,mb_iu*2,mb_wb")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	238
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	239 (define_insn_reservation "mb-mem-load" 3
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	240 (and (eq_attr "type" "load,no_delay_load")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	241 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_5)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	242 "mb_issue,mb_iu,mb_wb")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	243
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	244 (define_insn_reservation "mb-mem-store" 1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	245 (and (eq_attr "type" "store,no_delay_store")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	246 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_5)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	247 "mb_issue,mb_iu,mb_wb")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	248
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	249 (define_insn_reservation "mb-mul" 3
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	250 (and (eq_attr "type" "imul,no_delay_imul")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	251 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_5)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	252 "mb_issue,mb_mul,mb_mul_2*2,mb_wb")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	253
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	254 (define_insn_reservation "mb-div" 34
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	255 (and (eq_attr "type" "idiv")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	256 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_5)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	257 "mb_issue,mb_div,mb_div_2*33,mb_wb")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	258
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	259 (define_insn_reservation "mb-bs" 2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	260 (and (eq_attr "type" "bshift")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	261 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_5)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	262 "mb_issue,mb_bs,mb_bs_2,mb_wb")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	263
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	264 (define_insn_reservation "mb-fpu-add-sub-mul" 6
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	265 (and (eq_attr "type" "fadd,frsub,fmul")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	266 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_5)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	267 "mb_issue,mb_fpu,mb_fpu_2*5,mb_wb")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	268
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	269 (define_insn_reservation "mb-fpu-fcmp" 3
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	270 (and (eq_attr "type" "fcmp")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	271 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_5)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	272 "mb_issue,mb_fpu,mb_fpu*2,mb_wb")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	273
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	274 (define_insn_reservation "mb-fpu-div" 30
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	275 (and (eq_attr "type" "fdiv")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	276 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_5)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	277 "mb_issue,mb_fpu,mb_fpu_2*29,mb_wb")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	278
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	279 (define_insn_reservation "mb-fpu-sqrt" 30
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	280 (and (eq_attr "type" "fsqrt")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	281 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_5)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	282 "mb_issue,mb_fpu,mb_fpu_2*29,mb_wb")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	283
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	284 (define_insn_reservation "mb-fpu-fcvt" 4
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	285 (and (eq_attr "type" "fcvt")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	286 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_5)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	287 "mb_issue,mb_fpu,mb_fpu_2*3,mb_wb")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	288
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	289 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	290 ;; Microblaze 3-stage pipeline description (for v4.00.a and earlier)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	291 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	292
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	293 (define_automaton "mbpipe_3")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	294 (define_cpu_unit "mb3_iu" "mbpipe_3")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	295
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	296 (define_insn_reservation "mb3-integer" 1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	297 (and (eq_attr "type" "branch,jump,call,arith,darith,icmp,nop,no_delay_arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	298 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_3)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	299 "mb3_iu")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	300
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	301 (define_insn_reservation "mb3-special-move" 2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	302 (and (eq_attr "type" "move")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	303 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_3)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	304 "mb3_iu*2")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	305
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	306 (define_insn_reservation "mb3-mem-load" 2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	307 (and (eq_attr "type" "load,no_delay_load")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	308 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_3)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	309 "mb3_iu")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	310
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	311 (define_insn_reservation "mb3-mem-store" 1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	312 (and (eq_attr "type" "store,no_delay_store")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	313 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_3)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	314 "mb3_iu")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	315
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	316 (define_insn_reservation "mb3-mul" 3
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	317 (and (eq_attr "type" "imul,no_delay_imul")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	318 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_3)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	319 "mb3_iu")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	320
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	321 (define_insn_reservation "mb3-div" 34
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	322 (and (eq_attr "type" "idiv")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	323 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_3)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	324 "mb3_iu")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	325
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	326 (define_insn_reservation "mb3-bs" 2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	327 (and (eq_attr "type" "bshift")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	328 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_3)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	329 "mb3_iu")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	330
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	331 (define_insn_reservation "mb3-fpu-add-sub-mul" 6
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	332 (and (eq_attr "type" "fadd,frsub,fmul")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	333 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_3)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	334 "mb3_iu")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	335
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	336 (define_insn_reservation "mb3-fpu-fcmp" 3
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	337 (and (eq_attr "type" "fcmp")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	338 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_3)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	339 "mb3_iu")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	340
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	341 (define_insn_reservation "mb3-fpu-div" 30
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	342 (and (eq_attr "type" "fdiv")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	343 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_3)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	344 "mb3_iu")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	345
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	346 (define_insn_reservation "mb3-fpu-sqrt" 30
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	347 (and (eq_attr "type" "fsqrt")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	348 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_3)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	349 "mb3_iu")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	350
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	351 (define_insn_reservation "mb3-fpu-fcvt" 4
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	352 (and (eq_attr "type" "fcvt")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	353 (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_3)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	354 "mb3_iu")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	355
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	356 (automata_option "v")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	357 (automata_option "time")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	358 (automata_option "progress")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	359
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	360 (define_insn "bswapsi2"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	361 [(set (match_operand:SI 0 "register_operand" "=r")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	362 (bswap:SI (match_operand:SI 1 "register_operand" "r")))]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	363 "TARGET_REORDER"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	364 "swapb %0, %1"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	365 )
04ced10e8804 gcc 7 kono parents: 68 diff changeset	366
04ced10e8804 gcc 7 kono parents: 68 diff changeset	367 (define_insn "bswaphi2"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	368 [(set (match_operand:HI 0 "register_operand" "=r")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	369 (bswap:HI (match_operand:HI 1 "register_operand" "r")))]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	370 "TARGET_REORDER"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	371 "swapb %0, %1
04ced10e8804 gcc 7 kono parents: 68 diff changeset	372 swaph %0, %0"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	373 )
04ced10e8804 gcc 7 kono parents: 68 diff changeset	374
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	375 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	376 ;; Microblaze delay slot description
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	377 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	378 (define_delay (eq_attr "type" "branch,call,jump")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	379 [(and (eq_attr "type" "!branch,call,jump,icmp,multi,no_delay_arith,no_delay_load,no_delay_store,no_delay_imul,no_delay_move,darith")
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	380 (ior (not (match_test "microblaze_no_unsafe_delay"))
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	381 (eq_attr "type" "!fadd,frsub,fmul,fdiv,fcmp,store,load")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	382 ))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	383 (nil) (nil)])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	384
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	385
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	386 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	387 ;; Microblaze FPU
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	388 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	389
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	390 (define_insn "addsf3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	391 [(set (match_operand:SF 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	392 (plus:SF (match_operand:SF 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	393 (match_operand:SF 2 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	394 "TARGET_HARD_FLOAT"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	395 "fadd\t%0,%1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	396 [(set_attr "type" "fadd")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	397 (set_attr "mode" "SF")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	398 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	399
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	400 (define_insn "subsf3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	401 [(set (match_operand:SF 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	402 (minus:SF (match_operand:SF 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	403 (match_operand:SF 2 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	404 "TARGET_HARD_FLOAT"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	405 "frsub\t%0,%2,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	406 [(set_attr "type" "frsub")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	407 (set_attr "mode" "SF")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	408 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	409
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	410 (define_insn "mulsf3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	411 [(set (match_operand:SF 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	412 (mult:SF (match_operand:SF 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	413 (match_operand:SF 2 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	414 "TARGET_HARD_FLOAT"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	415 "fmul\t%0,%1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	416 [(set_attr "type" "fmul")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	417 (set_attr "mode" "SF")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	418 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	419
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	420
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	421 (define_insn "divsf3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	422 [(set (match_operand:SF 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	423 (div:SF (match_operand:SF 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	424 (match_operand:SF 2 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	425 "TARGET_HARD_FLOAT"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	426 "fdiv\t%0,%2,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	427 [(set_attr "type" "fdiv")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	428 (set_attr "mode" "SF")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	429 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	430
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	431 (define_insn "sqrtsf2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	432 [(set (match_operand:SF 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	433 (sqrt:SF (match_operand:SF 1 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	434 "TARGET_HARD_FLOAT && TARGET_FLOAT_SQRT"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	435 "fsqrt\t%0,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	436 [(set_attr "type" "fsqrt")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	437 (set_attr "mode" "SF")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	438 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	439
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	440 (define_insn "floatsisf2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	441 [(set (match_operand:SF 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	442 (float:SF (match_operand:SI 1 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	443 "TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	444 "flt\t%0,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	445 [(set_attr "type" "fcvt")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	446 (set_attr "mode" "SF")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	447 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	448
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	449 (define_insn "fix_truncsfsi2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	450 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	451 (fix:SI (match_operand:SF 1 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	452 "TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	453 "fint\t%0,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	454 [(set_attr "type" "fcvt")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	455 (set_attr "mode" "SF")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	456 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	457
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	458 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	459 ;; Add
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	460 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	461
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	462 ;; Add 2 SImode integers [ src1 = reg ; src2 = arith ; dest = reg ]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	463 ;; Leave carry as is
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	464 (define_insn "addsi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	465 [(set (match_operand:SI 0 "register_operand" "=d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	466 (plus:SI (match_operand:SI 1 "reg_or_0_operand" "%dJ,dJ,dJ")
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	467 (match_operand:SI 2 "arith_plus_operand" "d,I,i")))]
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	468 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	469 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	470 addk\t%0,%z1,%2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	471 addik\t%0,%z1,%2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	472 addik\t%0,%z1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	473 [(set_attr "type" "arith,arith,no_delay_arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	474 (set_attr "mode" "SI,SI,SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	475 (set_attr "length" "4,4,8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	476
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	477 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	478 ;; Double Precision Additions
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	479 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	480
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	481 ;; reg_DI_dest = reg_DI_src1 + DI_src2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	482
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	483 ;; Adding 2 DI operands in register or reg/imm
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	484
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	485 (define_insn "adddi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	486 [(set (match_operand:DI 0 "register_operand" "=d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	487 (plus:DI (match_operand:DI 1 "register_operand" "%d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	488 (match_operand:DI 2 "arith_operand32" "d,P,N")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	489 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	490 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	491 add\t%L0,%L1,%L2\;addc\t%M0,%M1,%M2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	492 addi\t%L0,%L1,%2\;addc\t%M0,%M1,r0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	493 addi\t%L0,%L1,%2\;addc\t%M0,%M1,r0\;addi\t%M0,%M0,-1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	494 [(set_attr "type" "darith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	495 (set_attr "mode" "DI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	496 (set_attr "length" "8,8,12")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	497
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	498 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	499 ;; Subtraction
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	500 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	501
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	502 (define_insn "subsi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	503 [(set (match_operand:SI 0 "register_operand" "=d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	504 (minus:SI (match_operand:SI 1 "arith_operand" "d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	505 (match_operand:SI 2 "arith_operand" "d,n")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	506 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	507 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	508 rsubk\t%0,%2,%z1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	509 addik\t%0,%z1,-%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	510 [(set_attr "type" "arith,no_delay_arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	511 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	512 (set_attr "length" "4,8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	513
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	514 (define_insn "iprefetch"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	515 [(unspec [(match_operand:SI 0 "const_int_operand" "n")] UNSPEC_IPREFETCH)
04ced10e8804 gcc 7 kono parents: 68 diff changeset	516 (clobber (mem:BLK (scratch)))]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	517 "TARGET_PREFETCH"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	518 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	519 operands[2] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	520 return "mfs\t%2,rpc\n\twic\t%2,r0";
04ced10e8804 gcc 7 kono parents: 68 diff changeset	521 }
04ced10e8804 gcc 7 kono parents: 68 diff changeset	522 [(set_attr "type" "arith")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	523 (set_attr "mode" "SI")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	524 (set_attr "length" "8")])
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	525
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	526 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	527 ;; Double Precision Subtraction
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	528 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	529
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	530 (define_insn "subdi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	531 [(set (match_operand:DI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	532 (minus:DI (match_operand:DI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	533 (match_operand:DI 2 "arith_operand32" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	534 ""
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	535 "rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1"
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	536 [(set_attr "type" "darith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	537 (set_attr "mode" "DI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	538 (set_attr "length" "8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	539
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	540
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	541 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	542 ;; Multiplication
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	543 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	544
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	545 (define_insn "mulsi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	546 [(set (match_operand:SI 0 "register_operand" "=d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	547 (mult:SI (match_operand:SI 1 "register_operand" "d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	548 (match_operand:SI 2 "arith_operand" "d,I,i")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	549 "!TARGET_SOFT_MUL"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	550 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	551 mul\t%0,%1,%2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	552 muli\t%0,%1,%2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	553 muli\t%0,%1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	554 [(set_attr "type" "imul,imul,no_delay_imul")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	555 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	556 (set_attr "length" "4,4,8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	557
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	558 (define_insn "mulsidi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	559 [(set (match_operand:DI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	560 (mult:DI
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	561 (sign_extend:DI (match_operand:SI 1 "register_operand" "d"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	562 (sign_extend:DI (match_operand:SI 2 "register_operand" "d"))))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	563 "!TARGET_SOFT_MUL && TARGET_MULTIPLY_HIGH"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	564 "mul\t%L0,%1,%2\;mulh\t%M0,%1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	565 [(set_attr "type" "no_delay_arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	566 (set_attr "mode" "DI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	567 (set_attr "length" "8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	568
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	569 (define_insn "umulsidi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	570 [(set (match_operand:DI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	571 (mult:DI
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	572 (zero_extend:DI (match_operand:SI 1 "register_operand" "d"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	573 (zero_extend:DI (match_operand:SI 2 "register_operand" "d"))))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	574 "!TARGET_SOFT_MUL && TARGET_MULTIPLY_HIGH"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	575 "mul\t%L0,%1,%2\;mulhu\t%M0,%1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	576 [(set_attr "type" "no_delay_arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	577 (set_attr "mode" "DI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	578 (set_attr "length" "8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	579
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	580 (define_insn "usmulsidi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	581 [(set (match_operand:DI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	582 (mult:DI
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	583 (zero_extend:DI (match_operand:SI 1 "register_operand" "d"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	584 (sign_extend:DI (match_operand:SI 2 "register_operand" "d"))))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	585 "!TARGET_SOFT_MUL && TARGET_MULTIPLY_HIGH"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	586 "mul\t%L0,%1,%2\;mulhsu\t%M0,%2,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	587 [(set_attr "type" "no_delay_arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	588 (set_attr "mode" "DI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	589 (set_attr "length" "8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	590
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	591 (define_insn "*smulsi3_highpart"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	592 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	593 (truncate:SI
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	594 (lshiftrt:DI
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	595 (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "d"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	596 (sign_extend:DI (match_operand:SI 2 "register_operand" "d")))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	597 (const_int 32))))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	598 "!TARGET_SOFT_MUL && TARGET_MULTIPLY_HIGH"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	599 "mulh\t%0,%1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	600 [(set_attr "type" "imul")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	601 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	602 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	603
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	604 (define_insn "*umulsi3_highpart"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	605 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	606 (truncate:SI
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	607 (lshiftrt:DI
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	608 (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "d"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	609 (zero_extend:DI (match_operand:SI 2 "register_operand" "d"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	610 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	611 (const_int 32))))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	612 "!TARGET_SOFT_MUL && TARGET_MULTIPLY_HIGH"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	613 "mulhu\t%0,%1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	614 [(set_attr "type" "imul")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	615 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	616 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	617
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	618 (define_insn "*usmulsi3_highpart"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	619 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	620 (truncate:SI
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	621 (lshiftrt:DI
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	622 (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "d"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	623 (sign_extend:DI (match_operand:SI 2 "register_operand" "d"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	624 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	625 (const_int 32))))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	626 "!TARGET_SOFT_MUL && TARGET_MULTIPLY_HIGH"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	627 "mulhsu\t%0,%2,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	628 [(set_attr "type" "imul")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	629 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	630 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	631
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	632
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	633 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	634 ;; Division and remainder
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	635 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	636 (define_expand "divsi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	637 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	638 (div:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	639 (match_operand:SI 2 "register_operand" "d")))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	640 ]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	641 "(!TARGET_SOFT_DIV) \|\| (TARGET_BARREL_SHIFT && TARGET_SMALL_DIVIDES)"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	642 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	643 if (TARGET_SOFT_DIV && TARGET_BARREL_SHIFT && TARGET_SMALL_DIVIDES)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	644 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	645 microblaze_expand_divide (operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	646 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	647 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	648 else if (!TARGET_SOFT_DIV)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	649 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	650 emit_insn (gen_divsi3_internal (operands[0], operands[1], operands[2]));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	651 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	652 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	653 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	654 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	655
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	656
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	657 (define_insn "divsi3_internal"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	658 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	659 (div:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	660 (match_operand:SI 2 "register_operand" "d")))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	661 ]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	662 "!TARGET_SOFT_DIV"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	663 "idiv\t%0,%2,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	664 [(set_attr "type" "idiv")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	665 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	666 (set_attr "length" "4")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	667 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	668
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	669 (define_insn "udivsi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	670 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	671 (udiv:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	672 (match_operand:SI 2 "register_operand" "d")))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	673 ]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	674 "!TARGET_SOFT_DIV"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	675 "idivu\t%0,%2,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	676 [(set_attr "type" "idiv")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	677 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	678 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	679
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	680 (define_peephole2
04ced10e8804 gcc 7 kono parents: 68 diff changeset	681 [(set (match_operand:SI 0 "register_operand")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	682 (fix:SI (match_operand:SF 1 "register_operand")))
04ced10e8804 gcc 7 kono parents: 68 diff changeset	683 (set (pc)
04ced10e8804 gcc 7 kono parents: 68 diff changeset	684 (if_then_else (match_operator 2 "ordered_comparison_operator"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	685 [(match_operand:SI 3 "register_operand")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	686 (match_operand:SI 4 "arith_operand")])
04ced10e8804 gcc 7 kono parents: 68 diff changeset	687 (label_ref (match_operand 5))
04ced10e8804 gcc 7 kono parents: 68 diff changeset	688 (pc)))]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	689 "TARGET_HARD_FLOAT"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	690 [(set (match_dup 1) (match_dup 3))]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	691
04ced10e8804 gcc 7 kono parents: 68 diff changeset	692 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	693 rtx condition;
04ced10e8804 gcc 7 kono parents: 68 diff changeset	694 rtx cmp_op0 = operands[3];
04ced10e8804 gcc 7 kono parents: 68 diff changeset	695 rtx cmp_op1 = operands[4];
04ced10e8804 gcc 7 kono parents: 68 diff changeset	696 rtx comp_reg = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	697
04ced10e8804 gcc 7 kono parents: 68 diff changeset	698 emit_insn (gen_cstoresf4 (comp_reg, operands[2],
04ced10e8804 gcc 7 kono parents: 68 diff changeset	699 gen_rtx_REG (SFmode, REGNO (cmp_op0)),
04ced10e8804 gcc 7 kono parents: 68 diff changeset	700 gen_rtx_REG (SFmode, REGNO (cmp_op1))));
04ced10e8804 gcc 7 kono parents: 68 diff changeset	701 condition = gen_rtx_NE (SImode, comp_reg, const0_rtx);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	702 emit_jump_insn (gen_condjump (condition, operands[5]));
04ced10e8804 gcc 7 kono parents: 68 diff changeset	703 }
04ced10e8804 gcc 7 kono parents: 68 diff changeset	704 )
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	705
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	706 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	707 ;; Negation and one's complement
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	708 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	709
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	710 (define_insn "negsi2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	711 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	712 (neg:SI (match_operand:SI 1 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	713 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	714 "rsubk\t%0,%1,r0"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	715 [(set_attr "type" "arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	716 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	717 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	718
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	719 (define_insn "negdi2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	720 [(set (match_operand:DI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	721 (neg:DI (match_operand:DI 1 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	722 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	723 "rsub\t%L0,%L1,r0\;rsubc\t%M0,%M1,r0"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	724 [(set_attr "type" "darith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	725 (set_attr "mode" "DI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	726 (set_attr "length" "8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	727
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	728
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	729 (define_insn "one_cmplsi2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	730 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	731 (not:SI (match_operand:SI 1 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	732 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	733 "xori\t%0,%1,-1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	734 [(set_attr "type" "arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	735 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	736 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	737
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	738 (define_insn "*one_cmpldi2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	739 [(set (match_operand:DI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	740 (not:DI (match_operand:DI 1 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	741 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	742 "nor\t%M0,r0,%M1\;nor\t%L0,r0,%L1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	743 [(set_attr "type" "darith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	744 (set_attr "mode" "DI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	745 (set_attr "length" "8")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	746 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	747
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	748 (define_split
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	749 [(set (match_operand:DI 0 "register_operand" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	750 (not:DI (match_operand:DI 1 "register_operand" "")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	751 "reload_completed
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	752 && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	753 && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1]))"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	754
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	755 [(set (subreg:SI (match_dup 0) 0) (not:SI (subreg:SI (match_dup 1) 0)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	756 (set (subreg:SI (match_dup 0) 4) (not:SI (subreg:SI (match_dup 1) 4)))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	757 "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	758
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	759
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	760 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	761 ;; Logical
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	762 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	763
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	764 (define_insn "andsi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	765 [(set (match_operand:SI 0 "register_operand" "=d,d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	766 (and:SI (match_operand:SI 1 "arith_operand" "%d,d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	767 (match_operand:SI 2 "arith_operand" "d,I,i,M")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	768 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	769 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	770 and\t%0,%1,%2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	771 andi\t%0,%1,%2 #and1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	772 andi\t%0,%1,%2 #and2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	773 andi\t%0,%1,%2 #and3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	774 [(set_attr "type" "arith,arith,no_delay_arith,no_delay_arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	775 (set_attr "mode" "SI,SI,SI,SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	776 (set_attr "length" "4,8,8,8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	777
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	778
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	779 (define_insn "iorsi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	780 [(set (match_operand:SI 0 "register_operand" "=d,d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	781 (ior:SI (match_operand:SI 1 "arith_operand" "%d,d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	782 (match_operand:SI 2 "arith_operand" "d,I,M,i")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	783 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	784 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	785 or\t%0,%1,%2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	786 ori\t%0,%1,%2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	787 ori\t%0,%1,%2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	788 ori\t%0,%1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	789 [(set_attr "type" "arith,no_delay_arith,no_delay_arith,no_delay_arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	790 (set_attr "mode" "SI,SI,SI,SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	791 (set_attr "length" "4,8,8,8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	792
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	793 (define_insn "xorsi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	794 [(set (match_operand:SI 0 "register_operand" "=d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	795 (xor:SI (match_operand:SI 1 "arith_operand" "%d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	796 (match_operand:SI 2 "arith_operand" "d,I,i")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	797 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	798 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	799 xor\t%0,%1,%2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	800 xori\t%0,%1,%2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	801 xori\t%0,%1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	802 [(set_attr "type" "arith,arith,no_delay_arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	803 (set_attr "mode" "SI,SI,SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	804 (set_attr "length" "4,8,8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	805
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	806 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	807 ;; Zero extension
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	808 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	809
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	810 (define_insn "zero_extendhisi2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	811 [(set (match_operand:SI 0 "register_operand" "=d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	812 (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "d,R,m")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	813 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	814 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	815 andi\t%0,%1,0xffff
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	816 lhu%i1\t%0,%1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	817 lhu%i1\t%0,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	818 [(set_attr "type" "no_delay_arith,load,no_delay_load")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	819 (set_attr "mode" "SI,SI,SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	820 (set_attr "length" "8,4,8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	821
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	822 (define_insn "zero_extendqihi2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	823 [(set (match_operand:HI 0 "register_operand" "=d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	824 (zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "d,R,m")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	825 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	826 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	827 andi\t%0,%1,0x00ff
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	828 lbu%i1\t%0,%1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	829 lbu%i1\t%0,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	830 [(set_attr "type" "arith,load,no_delay_load")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	831 (set_attr "mode" "HI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	832 (set_attr "length" "4,4,8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	833
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	834 (define_insn "zero_extendqisi2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	835 [(set (match_operand:SI 0 "register_operand" "=d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	836 (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "d,R,m")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	837 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	838 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	839 andi\t%0,%1,0x00ff
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	840 lbu%i1\t%0,%1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	841 lbu%i1\t%0,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	842 [(set_attr "type" "arith,load,no_delay_load")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	843 (set_attr "mode" "SI,SI,SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	844 (set_attr "length" "4,4,8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	845
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	846 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	847 ;; Sign extension
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	848 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	849
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	850 ;; basic Sign Extend Operations
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	851
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	852 (define_insn "extendqisi2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	853 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	854 (sign_extend:SI (match_operand:QI 1 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	855 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	856 "sext8\t%0,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	857 [(set_attr "type" "arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	858 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	859 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	860
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	861 (define_insn "extendhisi2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	862 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	863 (sign_extend:SI (match_operand:HI 1 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	864 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	865 "sext16\t%0,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	866 [(set_attr "type" "arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	867 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	868 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	869
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	870 ;; Those for integer source operand are ordered
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	871 ;; widest source type first.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	872
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	873 (define_insn "extendsidi2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	874 [(set (match_operand:DI 0 "register_operand" "=d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	875 (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,R,m")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	876 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	877 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	878 if (which_alternative == 0)
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	879 output_asm_insn ("addk\t%L0,r0,%1", operands);
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	880 else
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	881 output_asm_insn ("lw%i1\t%L0,%1", operands);
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	882
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	883 output_asm_insn ("add\t%M0,%L0,%L0", operands);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	884 output_asm_insn ("addc\t%M0,r0,r0", operands);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	885 output_asm_insn ("beqi\t%M0,.+8", operands);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	886 return "addi\t%M0,r0,0xffffffff";
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	887 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	888 [(set_attr "type" "multi,multi,multi")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	889 (set_attr "mode" "DI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	890 (set_attr "length" "20,20,20")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	891
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	892 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	893 ;; Data movement
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	894 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	895
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	896 ;; 64-bit integer moves
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	897
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	898 ;; Unlike most other insns, the move insns can't be split with
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	899 ;; different predicates, because register spilling and other parts of
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	900 ;; the compiler, have memoized the insn number already.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	901
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	902 (define_expand "movdi"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	903 [(set (match_operand:DI 0 "nonimmediate_operand" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	904 (match_operand:DI 1 "general_operand" ""))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	905 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	906 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	907 /* If operands[1] is a constant address illegal for pic, then we need to
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	908 handle it just like microblaze_legitimize_address does. */
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	909 if (flag_pic && pic_address_needs_scratch (operands[1]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	910 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	911 rtx temp = force_reg (DImode, XEXP (XEXP (operands[1], 0), 0));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	912 rtx temp2 = XEXP (XEXP (operands[1], 0), 1);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	913 emit_move_insn (operands[0], gen_rtx_PLUS (DImode, temp, temp2));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	914 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	915 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	916
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	917
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	918 if ((reload_in_progress \| reload_completed) == 0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	919 && !register_operand (operands[0], DImode)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	920 && !register_operand (operands[1], DImode)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	921 && (((GET_CODE (operands[1]) != CONST_INT \|\| INTVAL (operands[1]) != 0)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	922 && operands[1] != CONST0_RTX (DImode))))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	923 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	924
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	925 rtx temp = force_reg (DImode, operands[1]);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	926 emit_move_insn (operands[0], temp);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	927 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	928 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	929 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	930 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	931
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	932
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	933
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	934 (define_insn "*movdi_internal"
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	935 [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	936 (match_operand:DI 1 "general_operand" " d,i,J,R,o,d,d"))]
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	937 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	938 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	939 switch (which_alternative)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	940 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	941 case 0:
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	942 return "addk\t%0,%1\n\taddk\t%D0,%d1";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	943 case 1:
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	944 return "addik\t%M0,r0,%h1\n\taddik\t%L0,r0,%j1 #li => la";
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	945 case 2:
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	946 return "addk\t%0,r0,r0\n\taddk\t%D0,r0,r0";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	947 case 3:
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	948 case 4:
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	949 if (reg_mentioned_p (operands[0], operands[1]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	950 return "lwi\t%D0,%o1\n\tlwi\t%0,%1";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	951 else
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	952 return "lwi\t%0,%1\n\tlwi\t%D0,%o1";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	953 case 5:
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	954 case 6:
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	955 return "swi\t%1,%0\n\tswi\t%D1,%o0";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	956 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	957 return "unreachable";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	958 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	959 [(set_attr "type" "no_delay_move,no_delay_arith,no_delay_arith,no_delay_load,no_delay_load,no_delay_store,no_delay_store")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	960 (set_attr "mode" "DI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	961 (set_attr "length" "8,8,8,8,12,8,12")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	962
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	963 (define_split
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	964 [(set (match_operand:DI 0 "register_operand" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	965 (match_operand:DI 1 "register_operand" ""))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	966 "reload_completed
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	967 && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	968 && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	969 && (REGNO(operands[0]) == (REGNO(operands[1]) + 1))"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	970
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	971 [(set (subreg:SI (match_dup 0) 4) (subreg:SI (match_dup 1) 4))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	972 (set (subreg:SI (match_dup 0) 0) (subreg:SI (match_dup 1) 0))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	973 "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	974
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	975 (define_split
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	976 [(set (match_operand:DI 0 "register_operand" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	977 (match_operand:DI 1 "register_operand" ""))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	978 "reload_completed
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	979 && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	980 && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	981 && (REGNO (operands[0]) != (REGNO (operands[1]) + 1))"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	982
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	983 [(set (subreg:SI (match_dup 0) 0) (subreg:SI (match_dup 1) 0))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	984 (set (subreg:SI (match_dup 0) 4) (subreg:SI (match_dup 1) 4))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	985 "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	986
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	987 ;; Unlike most other insns, the move insns can't be split with
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	988 ;; different predicates, because register spilling and other parts of
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	989 ;; the compiler, have memoized the insn number already.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	990
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	991 (define_expand "movsi"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	992 [(set (match_operand:SI 0 "nonimmediate_operand" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	993 (match_operand:SI 1 "general_operand" ""))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	994 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	995 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	996 if (microblaze_expand_move (SImode, operands)) DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	997 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	998 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	999
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1000 ;; Added for status registers
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1001 (define_insn "movsi_status"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1002 [(set (match_operand:SI 0 "register_operand" "=d,d,z")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1003 (match_operand:SI 1 "register_operand" "z,d,d"))]
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1004 "microblaze_is_interrupt_variant ()"
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1005 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1006 mfs\t%0,%1 #mfs
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1007 addk\t%0,%1,r0 #add movsi
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1008 mts\t%0,%1 #mts"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1009 [(set_attr "type" "move")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1010 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1011 (set_attr "length" "12")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1012
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1013 ;; This move will be not be moved to delay slot.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1014 (define_insn "*movsi_internal3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1015 [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1016 (match_operand:SI 1 "immediate_operand" "J,I,Mnis"))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1017 "(register_operand (operands[0], SImode) &&
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1018 (GET_CODE (operands[1]) == CONST_INT &&
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1019 (INTVAL (operands[1]) <= 32767 && INTVAL (operands[1]) >= -32768)))"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1020 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1021 addk\t%0,r0,r0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1022 addik\t%0,r0,%1\t# %X1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1023 addik\t%0,r0,%1\t# %X1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1024 [(set_attr "type" "arith,arith,no_delay_arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1025 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1026 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1027
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1028 ;; This move may be used for PLT label operand
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1029 (define_insn "*movsi_internal5_pltop"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1030 [(set (match_operand:SI 0 "register_operand" "=d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1031 (match_operand:SI 1 "call_insn_operand" ""))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1032 "(register_operand (operands[0], Pmode) &&
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1033 PLT_ADDR_P (operands[1]))"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1034 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1035 gcc_unreachable ();
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1036 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1037 [(set_attr "type" "load")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1038 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1039 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1040
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1041 (define_insn "*movsi_internal2"
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1042 [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d, d,d,R,m")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1043 (match_operand:SI 1 "move_src_operand" " d,I,Mnis,R,m,dJ,dJ"))]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1044 ""
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1045 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1046 addk\t%0,%1,r0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1047 addik\t%0,r0,%1\t# %X1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1048 addik\t%0,%a1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1049 lw%i1\t%0,%1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1050 lw%i1\t%0,%1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1051 sw%i0\t%z1,%0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1052 sw%i0\t%z1,%0"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1053 [(set_attr "type" "load,load,no_delay_load,load,no_delay_load,store,no_delay_store")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1054 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1055 (set_attr "length" "4,4,8,4,8,4,8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1056
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1057
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1058 ;; 16-bit Integer moves
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1059
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1060 ;; Unlike most other insns, the move insns can't be split with
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1061 ;; different predicates, because register spilling and other parts of
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1062 ;; the compiler, have memoized the insn number already.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1063 ;; Unsigned loads are used because BYTE_LOADS_ZERO_EXTEND is defined
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1064
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1065 (define_expand "movhi"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1066 [(set (match_operand:HI 0 "nonimmediate_operand" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1067 (match_operand:HI 1 "general_operand" ""))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1068 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1069 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1070 if ((reload_in_progress \| reload_completed) == 0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1071 && !register_operand (operands[0], HImode)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1072 && !register_operand (operands[1], HImode)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1073 && ((GET_CODE (operands[1]) != CONST_INT
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1074 \|\| INTVAL (operands[1]) != 0)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1075 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1076 rtx temp = force_reg (HImode, operands[1]);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1077 emit_move_insn (operands[0], temp);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1078 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1079 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1080 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1081 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1082
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1083 (define_insn "*movhi_internal2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1084 [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,d,R,m")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1085 (match_operand:HI 1 "general_operand" "I,d,R,m,dJ,dJ"))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1086 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1087 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1088 addik\t%0,r0,%1\t# %X1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1089 addk\t%0,%1,r0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1090 lhui\t%0,%1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1091 lhui\t%0,%1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1092 sh%i0\t%z1,%0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1093 sh%i0\t%z1,%0"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1094 [(set_attr "type" "arith,move,load,no_delay_load,store,no_delay_store")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1095 (set_attr "mode" "HI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1096 (set_attr "length" "4,4,4,8,8,8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1097
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1098 ;; 8-bit Integer moves
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1099
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1100 ;; Unlike most other insns, the move insns can't be split with
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1101 ;; different predicates, because register spilling and other parts of
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1102 ;; the compiler, have memoized the insn number already.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1103 ;; Unsigned loads are used because BYTE_LOADS_ZERO_EXTEND is defined
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1104
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1105 (define_expand "movqi"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1106 [(set (match_operand:QI 0 "nonimmediate_operand" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1107 (match_operand:QI 1 "general_operand" ""))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1108 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1109 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1110 if ((reload_in_progress \| reload_completed) == 0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1111 && !register_operand (operands[0], QImode)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1112 && !register_operand (operands[1], QImode)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1113 && ((GET_CODE (operands[1]) != CONST_INT
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1114 \|\| INTVAL (operands[1]) != 0)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1115 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1116 rtx temp = force_reg (QImode, operands[1]);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1117 emit_move_insn (operands[0], temp);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1118 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1119 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1120 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1121 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1122
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1123 (define_insn "*movqi_internal2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1124 [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,d,d,R,m")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1125 (match_operand:QI 1 "general_operand" "J,I,d,R,m,dJ,dJ"))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1126 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1127 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1128 addk\t%0,r0,%z1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1129 addik\t%0,r0,%1\t# %X1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1130 addk\t%0,%1,r0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1131 lbu%i1\t%0,%1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1132 lbu%i1\t%0,%1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1133 sb%i0\t%z1,%0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1134 sbi\t%z1,%0"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1135 [(set_attr "type" "arith,arith,move,load,no_delay_load,store,no_delay_store")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1136 (set_attr "mode" "QI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1137 (set_attr "length" "4,4,8,4,8,4,8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1138
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1139 ;; Block moves, see microblaze.c for more details.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1140 ;; Argument 0 is the destination
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1141 ;; Argument 1 is the source
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1142 ;; Argument 2 is the length
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1143 ;; Argument 3 is the alignment
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1144
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1145 (define_expand "movmemsi"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1146 [(parallel [(set (match_operand:BLK 0 "general_operand")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1147 (match_operand:BLK 1 "general_operand"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1148 (use (match_operand:SI 2 ""))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1149 (use (match_operand:SI 3 "const_int_operand"))])]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1150 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1151 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1152 if (microblaze_expand_block_move (operands[0], operands[1],
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1153 operands[2], operands[3]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1154 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1155 else
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1156 FAIL;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1157 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1158 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1159
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1160 ;;Load and store reverse
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1161 (define_insn "movsi4_rev"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1162 [(set (match_operand:SI 0 "reg_or_mem_operand" "=r,Q")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1163 (bswap:SI (match_operand:SF 1 "reg_or_mem_operand" "Q,r")))]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1164 "TARGET_REORDER"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1165 "@
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1166 lwr\t%0,%y1,r0
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1167 swr\t%1,%y0,r0"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1168 [(set_attr "type" "load,store")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1169 (set_attr "mode" "SI")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1170 (set_attr "length" "4,4")])
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1171
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1172 ;; 32-bit floating point moves
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1173
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1174 (define_expand "movsf"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1175 [(set (match_operand:SF 0 "nonimmediate_operand" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1176 (match_operand:SF 1 "general_operand" ""))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1177 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1178 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1179 if ((reload_in_progress \| reload_completed) == 0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1180 && !register_operand (operands[0], SFmode)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1181 && !register_operand (operands[1], SFmode)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1182 && ( ((GET_CODE (operands[1]) != CONST_INT \|\| INTVAL (operands[1]) != 0)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1183 && operands[1] != CONST0_RTX (SFmode))))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1184 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1185 rtx temp = force_reg (SFmode, operands[1]);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1186 emit_move_insn (operands[0], temp);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1187 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1188 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1189 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1190 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1191
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1192 ;; Applies to both TARGET_SOFT_FLOAT and TARGET_HARD_FLOAT
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1193 ;;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1194 (define_insn "*movsf_internal"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1195 [(set (match_operand:SF 0 "nonimmediate_operand" "=d,d,d,d,d,R,m")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1196 (match_operand:SF 1 "general_operand" "G,d,R,F,m,d,d"))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1197 "(register_operand (operands[0], SFmode)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1198 \|\| register_operand (operands[1], SFmode)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1199 \|\| operands[1] == CONST0_RTX (SFmode))"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1200 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1201 addk\t%0,r0,r0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1202 addk\t%0,%1,r0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1203 lw%i1\t%0,%1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1204 addik\t%0,r0,%F1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1205 lw%i1\t%0,%1
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1206 sw%i0\t%z1,%0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1207 swi\t%z1,%0"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1208 [(set_attr "type" "move,no_delay_load,load,no_delay_load,no_delay_load,store,no_delay_store")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1209 (set_attr "mode" "SF")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1210 (set_attr "length" "4,4,4,4,4,4,4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1211
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1212 ;; 64-bit floating point moves
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1213 (define_expand "movdf"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1214 [(set (match_operand:DF 0 "nonimmediate_operand" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1215 (match_operand:DF 1 "general_operand" ""))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1216 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1217 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1218 if (flag_pic == 2) {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1219 if (GET_CODE (operands[1]) == MEM
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1220 && !microblaze_legitimate_address_p (DFmode, XEXP (operands[1],0), 0))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1221 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1222 rtx ptr_reg;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1223 rtx result;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1224 ptr_reg = force_reg (Pmode, XEXP (operands[1],0));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1225 result = gen_rtx_MEM (DFmode, ptr_reg);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1226 emit_move_insn (operands[0], result);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1227 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1228 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1229 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1230 if ((reload_in_progress \| reload_completed) == 0
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1231 && !register_operand (operands[0], DFmode)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1232 && !register_operand (operands[1], DFmode)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1233 && (((GET_CODE (operands[1]) != CONST_INT \|\| INTVAL (operands[1]) != 0)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1234 && operands[1] != CONST0_RTX (DFmode))))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1235 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1236 rtx temp = force_reg (DFmode, operands[1]);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1237 emit_move_insn (operands[0], temp);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1238 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1239 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1240 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1241 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1242
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1243 ;; movdf_internal
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1244 ;; Applies to both TARGET_SOFT_FLOAT and TARGET_HARD_FLOAT
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1245 ;;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1246 (define_insn "*movdf_internal"
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1247 [(set (match_operand:DF 0 "nonimmediate_operand" "=d,d,d,d,o")
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1248 (match_operand:DF 1 "general_operand" "dG,o,F,T,d"))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1249 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1250 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1251 switch (which_alternative)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1252 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1253 case 0:
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1254 return "addk\t%0,r0,r0\n\taddk\t%D0,r0,r0";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1255 case 1:
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1256 case 3:
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1257 if (reg_mentioned_p (operands[0], operands[1]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1258 return "lwi\t%D0,%o1\n\tlwi\t%0,%1";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1259 else
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1260 return "lwi\t%0,%1\n\tlwi\t%D0,%o1";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1261 case 2:
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1262 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1263 return "addik\t%0,r0,%h1 \n\taddik\t%D0,r0,%j1 #Xfer Lo";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1264 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1265 case 4:
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1266 return "swi\t%1,%0\n\tswi\t%D1,%o0";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1267 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1268 gcc_unreachable ();
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1269 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1270 [(set_attr "type" "no_delay_move,no_delay_load,no_delay_load,no_delay_load,no_delay_store")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1271 (set_attr "mode" "DF")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1272 (set_attr "length" "4,8,8,16,8")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1273
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1274 (define_split
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1275 [(set (match_operand:DF 0 "register_operand" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1276 (match_operand:DF 1 "register_operand" ""))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1277 "reload_completed
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1278 && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1279 && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1280 && (REGNO (operands[0]) == (REGNO (operands[1]) + 1))"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1281 [(set (subreg:SI (match_dup 0) 4) (subreg:SI (match_dup 1) 4))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1282 (set (subreg:SI (match_dup 0) 0) (subreg:SI (match_dup 1) 0))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1283 "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1284
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1285 (define_split
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1286 [(set (match_operand:DF 0 "register_operand" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1287 (match_operand:DF 1 "register_operand" ""))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1288 "reload_completed
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1289 && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1290 && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1291 && (REGNO (operands[0]) != (REGNO (operands[1]) + 1))"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1292 [(set (subreg:SI (match_dup 0) 0) (subreg:SI (match_dup 1) 0))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1293 (set (subreg:SI (match_dup 0) 4) (subreg:SI (match_dup 1) 4))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1294 "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1295
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1296 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1297 ;; Shifts
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1298 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1299
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1300 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1301 ;; 32-bit left shifts
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1302 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1303 (define_expand "ashlsi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1304 [(set (match_operand:SI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1305 (ashift:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1306 (match_operand:SI 2 "arith_operand" "")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1307 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1308 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1309 /* Avoid recursion for trivial cases. */
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1310 if (!((GET_CODE (operands [2]) == CONST_INT) && (INTVAL (operands[2]) == 1)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1311 if (microblaze_expand_shift (operands))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1312 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1313 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1314 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1315
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1316 ;; Irrespective of if we have a barrel-shifter or not, we want to match
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1317 ;; shifts by 1 with a special pattern. When a barrel shifter is present,
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1318 ;; saves a cycle. If not, allows us to annotate the instruction for delay
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1319 ;; slot optimization
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1320 (define_insn "*ashlsi3_byone"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1321 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1322 (ashift:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1323 (match_operand:SI 2 "arith_operand" "I")))]
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1324 "(operands[2] == const1_rtx)"
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1325 "addk\t%0,%1,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1326 [(set_attr "type" "arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1327 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1328 (set_attr "length" "4")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1329 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1330
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1331 ;; Barrel shift left
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1332 (define_insn "ashlsi3_bshift"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1333 [(set (match_operand:SI 0 "register_operand" "=d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1334 (ashift:SI (match_operand:SI 1 "register_operand" "d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1335 (match_operand:SI 2 "arith_operand" "I,d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1336 "TARGET_BARREL_SHIFT"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1337 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1338 bslli\t%0,%1,%2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1339 bsll\t%0,%1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1340 [(set_attr "type" "bshift,bshift")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1341 (set_attr "mode" "SI,SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1342 (set_attr "length" "4,4")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1343 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1344
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1345 ;; The following patterns apply when there is no barrel shifter present
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1346
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1347 (define_insn "*ashlsi3_with_mul_delay"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1348 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1349 (ashift:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1350 (match_operand:SI 2 "immediate_operand" "I")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1351 "!TARGET_SOFT_MUL
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1352 && ((1 << INTVAL (operands[2])) <= 32767 && (1 << INTVAL (operands[2])) >= -32768)"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1353 "muli\t%0,%1,%m2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1354 ;; This MUL will not generate an imm. Can go into a delay slot.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1355 [(set_attr "type" "arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1356 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1357 (set_attr "length" "4")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1358 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1359
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1360 (define_insn "*ashlsi3_with_mul_nodelay"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1361 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1362 (ashift:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1363 (match_operand:SI 2 "immediate_operand" "I")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1364 "!TARGET_SOFT_MUL"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1365 "muli\t%0,%1,%m2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1366 ;; This MUL will generate an IMM. Cannot go into a delay slot
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1367 [(set_attr "type" "no_delay_arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1368 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1369 (set_attr "length" "8")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1370 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1371
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1372 (define_insn "*ashlsi3_with_size_opt"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1373 [(set (match_operand:SI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1374 (ashift:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1375 (match_operand:SI 2 "immediate_operand" "I")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1376 "(INTVAL (operands[2]) > 5 && optimize_size)"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1377 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1378 operands[3] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1379
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1380 output_asm_insn ("ori\t%3,r0,%2", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1381 if (REGNO (operands[0]) != REGNO (operands[1]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1382 output_asm_insn ("addk\t%0,%1,r0", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1383
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1384 output_asm_insn ("addik\t%3,%3,-1", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1385 output_asm_insn ("bneid\t%3,.-4", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1386 return "addk\t%0,%0,%0";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1387 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1388 [(set_attr "type" "multi")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1389 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1390 (set_attr "length" "20")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1391 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1392
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1393 (define_insn "*ashlsi3_with_rotate"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1394 [(set (match_operand:SI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1395 (ashift:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1396 (match_operand:SI 2 "immediate_operand" "I")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1397 "(INTVAL (operands[2]) > 17 && !optimize_size)"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1398 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1399 int i, nshift;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1400
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1401 nshift = INTVAL (operands[2]);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1402 operands[3] = gen_int_mode (0xFFFFFFFF << nshift, SImode);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1403
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1404 /* We do one extra shift so that the first bit (carry) coming into the MSB
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1405 will be masked out */
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1406 output_asm_insn ("src\t%0,%1", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1407 for (i = 0; i < (32 - nshift); i++)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1408 output_asm_insn ("src\t%0,%0", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1409
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1410 return "andi\t%0,%0,%3";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1411 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1412 [(set_attr "type" "multi")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1413 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1414 (set_attr "length" "80")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1415 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1416
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1417 (define_insn "*ashlsi_inline"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1418 [(set (match_operand:SI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1419 (ashift:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1420 (match_operand:SI 2 "immediate_operand" "I")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1421 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1422 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1423 int i;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1424 int nshift = INTVAL (operands[2]);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1425 if (REGNO (operands[0]) != REGNO (operands[1]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1426 output_asm_insn ("addk\t%0,r0,%1", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1427 output_asm_insn ("addk\t%0,%1,%1", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1428 for (i = 0; i < (nshift - 2); i++)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1429 output_asm_insn ("addk\t%0,%0,%0", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1430 return "addk\t%0,%0,%0";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1431 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1432 [(set_attr "type" "multi")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1433 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1434 (set_attr "length" "124")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1435 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1436
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1437 (define_insn "*ashlsi_reg"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1438 [(set (match_operand:SI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1439 (ashift:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1440 (match_operand:SI 2 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1441 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1442 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1443 operands[3] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1444 output_asm_insn ("andi\t%3,%2,31", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1445 if (REGNO (operands[0]) != REGNO (operands[1]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1446 output_asm_insn ("addk\t%0,r0,%1", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1447 /* Exit the loop if zero shift. */
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1448 output_asm_insn ("beqid\t%3,.+20", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1449 /* Emit the loop. */
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1450 output_asm_insn ("addk\t%0,%0,r0", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1451 output_asm_insn ("addik\t%3,%3,-1", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1452 output_asm_insn ("bneid\t%3,.-4", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1453 return "addk\t%0,%0,%0";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1454 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1455 [(set_attr "type" "multi")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1456 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1457 (set_attr "length" "28")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1458 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1459
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1460
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1461 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1462 ;; 32-bit right shifts
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1463 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1464 (define_expand "ashrsi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1465 [(set (match_operand:SI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1466 (ashiftrt:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1467 (match_operand:SI 2 "arith_operand" "")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1468 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1469 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1470 /* Avoid recursion for trivial cases. */
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1471 if (!((GET_CODE (operands [2]) == CONST_INT) && (INTVAL (operands[2]) == 1)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1472 if (microblaze_expand_shift (operands))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1473 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1474 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1475 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1476
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1477 ;; Irrespective of if we have a barrel-shifter or not, we want to match
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1478 ;; shifts by 1 with a special pattern. When a barrel shifter is present,
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1479 ;; saves a cycle. If not, allows us to annotate the instruction for delay
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1480 ;; slot optimization
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1481 (define_insn "*ashrsi3_byone"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1482 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1483 (ashiftrt:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1484 (match_operand:SI 2 "arith_operand" "I")))]
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1485 "(operands[2] == const1_rtx)"
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1486 "sra\t%0,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1487 [(set_attr "type" "arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1488 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1489 (set_attr "length" "4")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1490 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1491
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1492 ;; Barrel shift right logical
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1493 (define_insn "*ashrsi3_bshift"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1494 [(set (match_operand:SI 0 "register_operand" "=d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1495 (ashiftrt:SI (match_operand:SI 1 "register_operand" "d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1496 (match_operand:SI 2 "arith_operand" "I,d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1497 "TARGET_BARREL_SHIFT"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1498 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1499 bsrai\t%0,%1,%2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1500 bsra\t%0,%1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1501 [(set_attr "type" "bshift,bshift")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1502 (set_attr "mode" "SI,SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1503 (set_attr "length" "4,4")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1504 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1505
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1506 (define_insn "*ashrsi_inline"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1507 [(set (match_operand:SI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1508 (ashiftrt:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1509 (match_operand:SI 2 "immediate_operand" "I")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1510 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1511 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1512 int i;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1513 int nshift = INTVAL (operands[2]);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1514 if (REGNO (operands[0]) != REGNO (operands[1]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1515 output_asm_insn ("addk\t%0,r0,%1", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1516 output_asm_insn ("sra\t%0,%1", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1517 for (i = 0; i < (nshift - 2); i++)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1518 output_asm_insn ("sra\t%0,%0", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1519 return "sra\t%0,%0";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1520 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1521 [(set_attr "type" "multi")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1522 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1523 (set_attr "length" "124")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1524 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1525
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1526 (define_insn "*ashrsi_reg"
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1527 [(set (match_operand:SI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1528 (ashiftrt:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1529 (match_operand:SI 2 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1530 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1531 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1532 operands[3] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1533 output_asm_insn ("andi\t%3,%2,31", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1534 if (REGNO (operands[0]) != REGNO (operands[1]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1535 output_asm_insn ("addk\t%0,r0,%1", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1536 /* Exit the loop if zero shift. */
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1537 output_asm_insn ("beqid\t%3,.+20", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1538 /* Emit the loop. */
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1539 output_asm_insn ("addk\t%0,%0,r0", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1540 output_asm_insn ("addik\t%3,%3,-1", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1541 output_asm_insn ("bneid\t%3,.-4", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1542 return "sra\t%0,%0";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1543 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1544 [(set_attr "type" "multi")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1545 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1546 (set_attr "length" "28")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1547 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1548
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1549 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1550 ;; 32-bit right shifts (logical)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1551 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1552
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1553 (define_expand "lshrsi3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1554 [(set (match_operand:SI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1555 (lshiftrt:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1556 (match_operand:SI 2 "arith_operand" "")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1557 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1558 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1559 /* Avoid recursion for trivial cases. */
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1560 if (!((GET_CODE (operands [2]) == CONST_INT) && (INTVAL (operands[2]) == 1)))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1561 if (microblaze_expand_shift (operands))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1562 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1563 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1564 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1565
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1566 ;; Irrespective of if we have a barrel-shifter or not, we want to match
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1567 ;; shifts by 1 with a special pattern. When a barrel shifter is present,
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1568 ;; saves a cycle. If not, allows us to annotate the instruction for delay
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1569 ;; slot optimization
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1570 (define_insn "*lshrsi3_byone"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1571 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1572 (lshiftrt:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1573 (match_operand:SI 2 "arith_operand" "I")))]
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1574 "(operands[2] == const1_rtx)"
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1575 "srl\t%0,%1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1576 [(set_attr "type" "arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1577 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1578 (set_attr "length" "4")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1579 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1580
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1581 ;; Barrel shift right logical
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1582 (define_insn "*lshrsi3_bshift"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1583 [(set (match_operand:SI 0 "register_operand" "=d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1584 (lshiftrt:SI (match_operand:SI 1 "register_operand" "d,d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1585 (match_operand:SI 2 "arith_operand" "I,d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1586 "TARGET_BARREL_SHIFT"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1587 "@
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1588 bsrli\t%0,%1,%2
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1589 bsrl\t%0,%1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1590 [(set_attr "type" "bshift,bshift")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1591 (set_attr "mode" "SI,SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1592 (set_attr "length" "4,4")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1593 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1594
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1595 (define_insn "*lshrsi_inline"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1596 [(set (match_operand:SI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1597 (lshiftrt:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1598 (match_operand:SI 2 "immediate_operand" "I")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1599 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1600 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1601 int i;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1602 int nshift = INTVAL (operands[2]);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1603 if (REGNO (operands[0]) != REGNO (operands[1]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1604 output_asm_insn ("addk\t%0,r0,%1", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1605 output_asm_insn ("srl\t%0,%1", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1606 for (i = 0; i < (nshift - 2); i++)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1607 output_asm_insn ("srl\t%0,%0", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1608 return "srl\t%0,%0";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1609 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1610 [(set_attr "type" "multi")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1611 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1612 (set_attr "length" "124")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1613 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1614
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1615 (define_insn "*lshrsi_reg"
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1616 [(set (match_operand:SI 0 "register_operand" "=&d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1617 (lshiftrt:SI (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1618 (match_operand:SI 2 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1619 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1620 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1621 operands[3] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1622 output_asm_insn ("andi\t%3,%2,31", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1623 if (REGNO (operands[0]) != REGNO (operands[1]))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1624 output_asm_insn ("addk\t%0,r0,%1", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1625 /* Exit the loop if zero shift. */
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1626 output_asm_insn ("beqid\t%3,.+20", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1627 /* Emit the loop. */
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1628 output_asm_insn ("addk\t%0,%0,r0", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1629 output_asm_insn ("addik\t%3,%3,-1", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1630 output_asm_insn ("bneid\t%3,.-4", operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1631 return "srl\t%0,%0";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1632 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1633 [(set_attr "type" "multi")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1634 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1635 (set_attr "length" "28")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1636 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1637
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1638 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1639 ;; Setting a register from an integer comparison.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1640 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1641 (define_expand "cstoresi4"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1642 [(set (match_operand:SI 0 "register_operand")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1643 (match_operator:SI 1 "ordered_comparison_operator"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1644 [(match_operand:SI 2 "register_operand")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1645 (match_operand:SI 3 "register_operand")]))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1646 "TARGET_PATTERN_COMPARE"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1647 "if (GET_CODE (operand1) != EQ && GET_CODE (operand1) != NE)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1648 FAIL;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1649 "
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1650 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1651
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1652 (define_insn "seq_internal_pat"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1653 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1654 (eq:SI
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1655 (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1656 (match_operand:SI 2 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1657 "TARGET_PATTERN_COMPARE"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1658 "pcmpeq\t%0,%1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1659 [(set_attr "type" "arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1660 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1661 (set_attr "length" "4")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1662 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1663
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1664 (define_insn "sne_internal_pat"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1665 [(set (match_operand:SI 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1666 (ne:SI
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1667 (match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1668 (match_operand:SI 2 "register_operand" "d")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1669 "TARGET_PATTERN_COMPARE"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1670 "pcmpne\t%0,%1,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1671 [(set_attr "type" "arith")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1672 (set_attr "mode" "SI")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1673 (set_attr "length" "4")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1674 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1675
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1676 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1677 ;; Setting a register from an floating point comparison.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1678 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1679 (define_insn "cstoresf4"
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1680 [(set (match_operand:SI 0 "register_operand" "=r")
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1681 (match_operator:SI 1 "ordered_comparison_operator"
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1682 [(match_operand:SF 2 "register_operand" "r")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1683 (match_operand:SF 3 "register_operand" "r")]))]
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1684 "TARGET_HARD_FLOAT"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1685 "fcmp.%C1\t%0,%3,%2"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1686 [(set_attr "type" "fcmp")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1687 (set_attr "mode" "SF")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1688 (set_attr "length" "4")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1689 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1690
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1691 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1692 ;; Conditional branches
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1693 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1694
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1695 (define_expand "cbranchsi4"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1696 [(set (pc)
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1697 (if_then_else (match_operator 0 "ordered_comparison_operator"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1698 [(match_operand:SI 1 "register_operand")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1699 (match_operand:SI 2 "arith_operand" "I,i")])
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1700 (label_ref (match_operand 3 ""))
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1701 (pc)))]
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1702 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1703 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1704 microblaze_expand_conditional_branch (SImode, operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1705 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1706 })
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1707
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1708 (define_expand "cbranchsi4_reg"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1709 [(set (pc)
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1710 (if_then_else (match_operator 0 "ordered_comparison_operator"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1711 [(match_operand:SI 1 "register_operand")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1712 (match_operand:SI 2 "register_operand")])
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1713 (label_ref (match_operand 3 ""))
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1714 (pc)))]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1715 ""
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1716 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1717 microblaze_expand_conditional_branch_reg (SImode, operands);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1718 DONE;
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1719 })
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1720
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1721 (define_expand "cbranchsf4"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1722 [(set (pc)
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1723 (if_then_else (match_operator 0 "ordered_comparison_operator"
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1724 [(match_operand:SF 1 "register_operand")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1725 (match_operand:SF 2 "register_operand")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1726 (label_ref (match_operand 3 ""))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1727 (pc)))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1728 "TARGET_HARD_FLOAT"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1729 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1730 microblaze_expand_conditional_branch_sf (operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1731 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1732
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1733 })
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1734
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1735 ;; Used to implement comparison instructions
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1736 (define_expand "condjump"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1737 [(set (pc)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1738 (if_then_else (match_operand 0)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1739 (label_ref (match_operand 1))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1740 (pc)))])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1741
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1742 (define_insn "branch_zero"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1743 [(set (pc)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1744 (if_then_else (match_operator:SI 0 "ordered_comparison_operator"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1745 [(match_operand:SI 1 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1746 (const_int 0)])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1747 (match_operand:SI 2 "pc_or_label_operand" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1748 (match_operand:SI 3 "pc_or_label_operand" "")))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1749 ]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1750 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1751 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1752 if (operands[3] == pc_rtx)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1753 return "b%C0i%?\t%z1,%2";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1754 else
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1755 return "b%N0i%?\t%z1,%3";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1756 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1757 [(set_attr "type" "branch")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1758 (set_attr "mode" "none")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1759 (set_attr "length" "4")]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1760 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1761
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1762 (define_insn "branch_compare"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1763 [(set (pc)
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1764 (if_then_else (match_operator:SI 0 "cmp_op"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1765 [(match_operand:SI 1 "register_operand" "d")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1766 (match_operand:SI 2 "register_operand" "d")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1767 ])
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1768 (label_ref (match_operand 3))
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1769 (pc)))
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1770 (clobber(reg:SI R_TMP))]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1771 ""
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1772 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1773 operands[4] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1774 enum rtx_code code = GET_CODE (operands[0]);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1775
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1776 if (code == GT \|\| code == LE)
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1777 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1778 output_asm_insn ("cmp\tr18,%z1,%z2", operands);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1779 code = swap_condition (code);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1780 }
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1781 else if (code == GTU \|\| code == LEU)
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1782 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1783 output_asm_insn ("cmpu\tr18,%z1,%z2", operands);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1784 code = swap_condition (code);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1785 }
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1786 else if (code == GE \|\| code == LT)
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1787 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1788 output_asm_insn ("cmp\tr18,%z2,%z1", operands);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1789 }
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1790 else if (code == GEU \|\| code == LTU)
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1791 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1792 output_asm_insn ("cmpu\tr18,%z2,%z1", operands);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1793 }
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1794
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1795 operands[0] = gen_rtx_fmt_ee (signed_condition (code), SImode, operands[4], const0_rtx);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1796 return "b%C0i%?\tr18,%3";
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1797 }
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1798 [(set_attr "type" "branch")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1799 (set_attr "mode" "none")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1800 (set_attr "length" "12")]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1801 )
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1802
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1803 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1804 ;; Unconditional branches
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1805 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1806 (define_insn "jump"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1807 [(set (pc)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1808 (label_ref (match_operand 0 "" "")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1809 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1810 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1811 if (GET_CODE (operands[0]) == REG)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1812 return "br%?\t%0";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1813 else
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1814 return "bri%?\t%l0";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1815 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1816 [(set_attr "type" "jump")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1817 (set_attr "mode" "none")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1818 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1819
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1820 (define_expand "indirect_jump"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1821 [(set (pc) (match_operand 0 "register_operand" "d"))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1822 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1823 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1824 rtx dest = operands[0];
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1825 if (GET_CODE (dest) != REG \|\| GET_MODE (dest) != Pmode)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1826 operands[0] = copy_to_mode_reg (Pmode, dest);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1827
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1828 emit_jump_insn (gen_indirect_jump_internal1 (operands[0]));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1829 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1830 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1831 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1832
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1833 ;; Indirect jumps. Jump to register values. Assuming absolute jumps
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1834
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1835 (define_insn "indirect_jump_internal1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1836 [(set (pc) (match_operand:SI 0 "register_operand" "d"))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1837 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1838 "bra%?\t%0"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1839 [(set_attr "type" "jump")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1840 (set_attr "mode" "none")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1841 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1842
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1843 (define_expand "tablejump"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1844 [(set (pc)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1845 (match_operand 0 "register_operand" "d"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1846 (use (label_ref (match_operand 1 "" "")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1847 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1848 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1849 gcc_assert (GET_MODE (operands[0]) == Pmode);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1850
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1851 if (!flag_pic)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1852 emit_jump_insn (gen_tablejump_internal1 (operands[0], operands[1]));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1853 else
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1854 emit_jump_insn (gen_tablejump_internal3 (operands[0], operands[1]));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1855 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1856 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1857 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1858
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1859 (define_insn "tablejump_internal1"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1860 [(set (pc)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1861 (match_operand:SI 0 "register_operand" "d"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1862 (use (label_ref (match_operand 1 "" "")))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1863 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1864 "bra%?\t%0 "
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1865 [(set_attr "type" "jump")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1866 (set_attr "mode" "none")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1867 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1868
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1869 (define_expand "tablejump_internal3"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1870 [(parallel [(set (pc)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1871 (plus:SI (match_operand:SI 0 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1872 (label_ref:SI (match_operand:SI 1 "" ""))))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1873 (use (label_ref:SI (match_dup 1)))])]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1874 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1875 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1876 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1877
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1878 ;; need to change for MicroBlaze PIC
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1879 (define_insn ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1880 [(set (pc)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1881 (plus:SI (match_operand:SI 0 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1882 (label_ref:SI (match_operand 1 "" ""))))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1883 (use (label_ref:SI (match_dup 1)))]
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1884 "NEXT_INSN (as_a <rtx_insn *> (operands[1])) != 0
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1885 && GET_CODE (PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[1])))) == ADDR_DIFF_VEC
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1886 && flag_pic"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1887 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1888 output_asm_insn ("addk\t%0,%0,r20",operands);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1889 return "bra%?\t%0";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1890 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1891 [(set_attr "type" "jump")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1892 (set_attr "mode" "none")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1893 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1894
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1895 (define_expand "tablejump_internal4"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1896 [(parallel [(set (pc)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1897 (plus:DI (match_operand:DI 0 "register_operand" "d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1898 (label_ref:DI (match_operand:SI 1 "" ""))))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1899 (use (label_ref:DI (match_dup 1)))])]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1900 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1901 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1902 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1903
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1904 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1905 ;; Function prologue/epilogue and stack allocation
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1906 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1907 (define_expand "prologue"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1908 [(const_int 1)]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1909 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1910 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1911 microblaze_expand_prologue ();
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1912 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1913 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1914 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1915
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1916 (define_expand "epilogue"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1917 [(use (const_int 0))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1918 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1919 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1920 microblaze_expand_epilogue ();
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1921 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1922 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1923 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1924
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1925 ;; An insn to allocate new stack space for dynamic use (e.g., alloca).
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1926 ;; We copy the return address, decrement the stack pointer and save the
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1927 ;; return address again at the new stack top
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1928
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1929 (define_expand "allocate_stack"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1930 [(set (match_operand 0 "register_operand" "=r")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1931 (minus (reg 1) (match_operand 1 "register_operand" "")))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1932 (set (reg 1)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1933 (minus (reg 1) (match_dup 1)))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1934 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1935 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1936 rtx retaddr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1937 rtx rtmp = gen_rtx_REG (SImode, R_TMP);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1938 rtx neg_op0;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1939
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1940 emit_move_insn (rtmp, retaddr);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1941 if (GET_CODE (operands[1]) != CONST_INT)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1942 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1943 neg_op0 = gen_reg_rtx (Pmode);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1944 emit_insn (gen_negsi2 (neg_op0, operands[1]));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1945 } else
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1946 neg_op0 = GEN_INT (- INTVAL (operands[1]));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1947
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1948 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1949 emit_move_insn (gen_rtx_MEM (Pmode, stack_pointer_rtx), rtmp);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1950 emit_move_insn (operands[0], virtual_stack_dynamic_rtx);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1951 emit_insn (gen_rtx_CLOBBER (SImode, rtmp));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1952 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1953 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1954 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1955
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1956 (define_expand "save_stack_block"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1957 [(match_operand 0 "register_operand" "")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1958 (match_operand 1 "register_operand" "")]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1959 ""
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1960 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1961 emit_move_insn (operands[0], operands[1]);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1962 DONE;
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1963 }
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1964 )
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1965
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1966 (define_expand "restore_stack_block"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1967 [(match_operand 0 "register_operand" "")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1968 (match_operand 1 "register_operand" "")]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1969 ""
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1970 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1971 rtx retaddr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1972 rtx rtmp = gen_rtx_REG (SImode, R_TMP);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1973
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1974 /* Move the retaddr. */
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1975 emit_move_insn (rtmp, retaddr);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1976 emit_move_insn (operands[0], operands[1]);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1977 emit_move_insn (gen_rtx_MEM (Pmode, operands[0]), rtmp);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1978 DONE;
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1979 }
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1980 )
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1981
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1982 ;; Trivial return. Make it look like a normal return insn as that
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1983 ;; allows jump optimizations to work better .
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1984 (define_expand "return"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1985 [(simple_return)]
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	1986 "microblaze_can_use_return_insn ()"
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	1987 {}
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1988 )
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1989
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1990 (define_expand "simple_return"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1991 [(simple_return)]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1992 ""
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1993 {}
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1994 )
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1995
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1996 (define_insn "*<optab>"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1997 [(any_return)]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1998 ""
04ced10e8804 gcc 7 kono parents: 68 diff changeset	1999 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2000 if (microblaze_is_break_handler ())
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2001 return "rtbd\tr16, 8\;%#";
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2002 else if (microblaze_is_interrupt_variant ())
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2003 return "rtid\tr14, 0\;%#";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2004 else
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2005 return "rtsd\tr15, 8\;%#";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2006 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2007 [(set_attr "type" "jump")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2008 (set_attr "mode" "none")
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	2009 (set_attr "length" "4")]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2010 )
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2011
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2012 ;; Normal return.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2013
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	2014 (define_insn "<optab>_internal"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2015 [(any_return)
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2016 (use (match_operand:SI 0 "register_operand" ""))]
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2017 ""
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	2018 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2019 if (microblaze_is_break_handler ())
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2020 return "rtbd\tr16,8\;%#";
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2021 else if (microblaze_is_interrupt_variant ())
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2022 return "rtid\tr14,0 \;%#";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2023 else
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2024 return "rtsd\tr15,8 \;%#";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2025 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2026 [(set_attr "type" "jump")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2027 (set_attr "mode" "none")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2028 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2029
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2030
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2031 ;; Block any insns from across this point
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2032 ;; Useful to group sequences together.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2033 (define_insn "blockage"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2034 [(unspec_volatile [(const_int 0)] 0)]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2035 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2036 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2037 [(set_attr "type" "unknown")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2038 (set_attr "mode" "none")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2039 (set_attr "length" "0")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2040
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2041
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2042 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2043 ;; Function calls
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2044 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2045
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2046 (define_expand "call"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2047 [(parallel [(call (match_operand 0 "memory_operand" "m")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2048 (match_operand 1 "" "i"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2049 (clobber (reg:SI R_SR))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2050 (use (match_operand 2 "" ""))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2051 (use (match_operand 3 "" ""))])]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2052 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2053 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2054 rtx addr = XEXP (operands[0], 0);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2055
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2056 if (flag_pic == 2 && GET_CODE (addr) == SYMBOL_REF
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2057 && !SYMBOL_REF_LOCAL_P (addr))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2058 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2059 rtx temp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_PLT);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2060 XEXP (operands[0], 0) = temp;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2061 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2062
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2063 if ((GET_CODE (addr) != REG && !CONSTANT_ADDRESS_P (addr))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2064 \|\| !call_insn_operand (addr, VOIDmode))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2065 XEXP (operands[0], 0) = copy_to_mode_reg (Pmode, addr);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2066
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2067 if (GET_CODE (XEXP (operands[0], 0)) == UNSPEC)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2068 emit_call_insn (gen_call_internal_plt0 (operands[0], operands[1],
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2069 gen_rtx_REG (SImode,
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2070 GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM),
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2071 pic_offset_table_rtx));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2072 else
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2073 emit_call_insn (gen_call_internal0 (operands[0], operands[1],
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2074 gen_rtx_REG (SImode,
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2075 GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2076
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2077 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2078 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2079 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2080
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2081 (define_expand "call_internal0"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2082 [(parallel [(call (match_operand 0 "" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2083 (match_operand 1 "" ""))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2084 (clobber (match_operand:SI 2 "" ""))])]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2085 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2086 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2087 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2088 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2089
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2090 (define_expand "call_internal_plt0"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2091 [(parallel [(call (match_operand 0 "" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2092 (match_operand 1 "" ""))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2093 (clobber (match_operand:SI 2 "" ""))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2094 (use (match_operand:SI 3 "" ""))])]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2095 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2096 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2097 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2098 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2099
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2100 (define_insn "call_internal_plt"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2101 [(call (mem (match_operand:SI 0 "call_insn_plt_operand" ""))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2102 (match_operand:SI 1 "" "i"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2103 (clobber (reg:SI R_SR))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2104 (use (reg:SI R_GOT))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2105 "flag_pic"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2106 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2107 register rtx target2 = gen_rtx_REG (Pmode,
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2108 GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2109 gen_rtx_CLOBBER (VOIDmode, target2);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2110 return "brlid\tr15,%0\;%#";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2111 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2112 [(set_attr "type" "call")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2113 (set_attr "mode" "none")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2114 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2115
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2116 (define_insn "call_internal1"
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	2117 [(call (mem (match_operand:VOID 0 "call_insn_simple_operand" "ri"))
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2118 (match_operand:SI 1 "" "i"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2119 (clobber (reg:SI R_SR))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2120 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2121 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2122 register rtx target = operands[0];
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2123 register rtx target2 = gen_rtx_REG (Pmode,
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2124 GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2125 if (GET_CODE (target) == SYMBOL_REF) {
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	2126 if (microblaze_break_function_p (SYMBOL_REF_DECL (target))) {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2127 gen_rtx_CLOBBER (VOIDmode, target2);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2128 return "brki\tr16,%0\;%#";
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2129 }
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2130 else {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2131 gen_rtx_CLOBBER (VOIDmode, target2);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2132 return "brlid\tr15,%0\;%#";
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2133 }
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2134 } else if (GET_CODE (target) == CONST_INT)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2135 return "la\t%@,r0,%0\;brald\tr15,%@\;%#";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2136 else if (GET_CODE (target) == REG)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2137 return "brald\tr15,%0\;%#";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2138 else {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2139 fprintf (stderr,"Unsupported call insn\n");
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2140 return NULL;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2141 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2142 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2143 [(set_attr "type" "call")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2144 (set_attr "mode" "none")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2145 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2146
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2147 ;; calls.c now passes a fourth argument, make saber happy
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2148
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2149 (define_expand "call_value"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2150 [(parallel [(set (match_operand 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2151 (call (match_operand 1 "memory_operand" "m")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2152 (match_operand 2 "" "i")))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2153 (clobber (reg:SI R_SR))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2154 (use (match_operand 3 "" ""))])] ;; next_arg_reg
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2155 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2156 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2157 rtx addr = XEXP (operands[1], 0);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2158
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2159 if (flag_pic == 2 && GET_CODE (addr) == SYMBOL_REF
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2160 && !SYMBOL_REF_LOCAL_P (addr))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2161 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2162 rtx temp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_PLT);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2163 XEXP (operands[1], 0) = temp;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2164 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2165
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2166 if ((GET_CODE (addr) != REG && !CONSTANT_ADDRESS_P (addr))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2167 \|\| !call_insn_operand (addr, VOIDmode))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2168 XEXP (operands[1], 0) = copy_to_mode_reg (Pmode, addr);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2169
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2170 if (GET_CODE (XEXP (operands[1], 0)) == UNSPEC)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2171 emit_call_insn (gen_call_value_intern_plt0 (operands[0], operands[1],
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2172 operands[2],
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2173 gen_rtx_REG (SImode,
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2174 GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM),
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2175 pic_offset_table_rtx));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2176 else
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2177 emit_call_insn (gen_call_value_internal (operands[0], operands[1],
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2178 operands[2],
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2179 gen_rtx_REG (SImode,
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2180 GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2181
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2182 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2183 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2184 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2185
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2186
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2187 (define_expand "call_value_internal"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2188 [(parallel [(set (match_operand 0 "" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2189 (call (match_operand 1 "" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2190 (match_operand 2 "" "")))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2191 (clobber (match_operand:SI 3 "" ""))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2192 ])]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2193 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2194 {}
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2195 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2196
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2197 (define_expand "call_value_intern_plt0"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2198 [(parallel[(set (match_operand 0 "" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2199 (call (match_operand 1 "" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2200 (match_operand 2 "" "")))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2201 (clobber (match_operand:SI 3 "" ""))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2202 (use (match_operand:SI 4 "" ""))])]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2203 "flag_pic"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2204 {}
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2205 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2206
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2207 (define_insn "call_value_intern_plt"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2208 [(set (match_operand:VOID 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2209 (call (mem (match_operand:SI 1 "call_insn_plt_operand" ""))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2210 (match_operand:SI 2 "" "i")))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2211 (clobber (match_operand:SI 3 "register_operand" "=d"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2212 (use (match_operand:SI 4 "register_operand"))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2213 "flag_pic"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2214 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2215 register rtx target2=gen_rtx_REG (Pmode,GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2216
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2217 gen_rtx_CLOBBER (VOIDmode,target2);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2218 return "brlid\tr15,%1\;%#";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2219 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2220 [(set_attr "type" "call")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2221 (set_attr "mode" "none")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2222 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2223
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2224 (define_insn "call_value_intern"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2225 [(set (match_operand:VOID 0 "register_operand" "=d")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2226 (call (mem (match_operand:VOID 1 "call_insn_operand" "ri"))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2227 (match_operand:SI 2 "" "i")))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2228 (clobber (match_operand:SI 3 "register_operand" "=d"))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2229 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2230 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2231 register rtx target = operands[1];
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2232 register rtx target2=gen_rtx_REG (Pmode,GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2233
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	2234 if (GET_CODE (target) == SYMBOL_REF)
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2235 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2236 gen_rtx_CLOBBER (VOIDmode,target2);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2237 if (microblaze_break_function_p (SYMBOL_REF_DECL (target)))
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2238 return "brki\tr16,%1\;%#";
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2239 else if (SYMBOL_REF_FLAGS (target) & SYMBOL_FLAG_FUNCTION)
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2240 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2241 return "brlid\tr15,%1\;%#";
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2242 }
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2243 else
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2244 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2245 return "bralid\tr15,%1\;%#";
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2246 }
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2247 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2248 else if (GET_CODE (target) == CONST_INT)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2249 return "la\t%@,r0,%1\;brald\tr15,%@\;%#";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2250 else if (GET_CODE (target) == REG)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2251 return "brald\tr15,%1\;%#";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2252 else
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2253 return "Unsupported call insn\n";
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2254 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2255 [(set_attr "type" "call")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2256 (set_attr "mode" "none")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2257 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2258
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2259
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2260 ;; Call subroutine returning any type.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2261 (define_expand "untyped_call"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2262 [(parallel [(call (match_operand 0 "" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2263 (const_int 0))
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2264 (match_operand 1 "" "")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2265 (match_operand 2 "" "")])]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2266 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2267 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2268 if (operands[0]) /* silence statement not reached warnings */
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2269 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2270 int i;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2271
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2272 emit_call_insn (gen_call (operands[0], const0_rtx, NULL, const0_rtx));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2273
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2274 for (i = 0; i < XVECLEN (operands[2], 0); i++)
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2275 {
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2276 rtx set = XVECEXP (operands[2], 0, i);
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2277 emit_move_insn (SET_DEST (set), SET_SRC (set));
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2278 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2279
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2280 emit_insn (gen_blockage ());
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2281 DONE;
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2282 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2283 }
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2284 )
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2285
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2286 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2287 ;; Misc.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2288 ;;----------------------------------------------------------------
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2289
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2290 (define_insn "nop"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2291 [(const_int 0)]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2292 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2293 "nop"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2294 [(set_attr "type" "nop")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2295 (set_attr "mode" "none")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2296 (set_attr "length" "4")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2297
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	2298 ;; Trap instruction pattern for __builtin_trap. Same as the glibc ABORT_INSTRUCTION
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2299 (define_insn "trap"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2300 [(trap_if (const_int 1) (const_int 0))]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2301 ""
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2302 "brki\tr0,-1"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2303 [(set_attr "type" "trap")]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2304 )
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2305
68 561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2306 ;; The insn to set GOT. The hardcoded number "8" accounts for $pc difference
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2307 ;; between "mfs" and "addik" instructions.
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2308 (define_insn "set_got"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2309 [(set (match_operand:SI 0 "register_operand" "=r")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2310 (unspec:SI [(const_int 0)] UNSPEC_SET_GOT))]
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2311 ""
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2312 "mfs\t%0,rpc\n\taddik\t%0,%0,_GLOBAL_OFFSET_TABLE_+8"
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2313 [(set_attr "type" "multi")
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2314 (set_attr "length" "12")])
561a7518be6b update gcc-4.6 Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> parents: diff changeset	2315
111 04ced10e8804 gcc 7 kono parents: 68 diff changeset	2316 ;; This insn gives the count of leading number of zeros for the second
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2317 ;; operand and stores the result in first operand.
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2318 (define_insn "clzsi2"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2319 [(set (match_operand:SI 0 "register_operand" "=r")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2320 (clz:SI (match_operand:SI 1 "register_operand" "r")))]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2321 "TARGET_HAS_CLZ"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2322 "clz\t%0,%1"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2323 [(set_attr "type" "arith")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2324 (set_attr "mode" "SI")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2325 (set_attr "length" "4")])
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2326
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2327 ; This is used in compiling the unwind routines.
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2328 (define_expand "eh_return"
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2329 [(use (match_operand 0 "general_operand" ""))]
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2330 ""
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2331 "
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2332 {
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2333 microblaze_eh_return (operands[0]);
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2334 DONE;
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2335 }")
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2336
04ced10e8804 gcc 7 kono parents: 68 diff changeset	2337 (include "sync.md")

Mercurial > hg > CbC > CbC_gcc

annotate gcc/config/microblaze/microblaze.md @ 111:04ced10e8804