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1 ;; Hardware Transactional Memory (HTM) patterns.
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2 ;; Copyright (C) 2013-2017 Free Software Foundation, Inc.
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3 ;; Contributed by Peter Bergner <bergner@vnet.ibm.com>.
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4
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5 ;; This file is part of GCC.
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6
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7 ;; GCC is free software; you can redistribute it and/or modify it
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8 ;; under the terms of the GNU General Public License as published
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9 ;; by the Free Software Foundation; either version 3, or (at your
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10 ;; option) any later version.
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11
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12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 ;; License for more details.
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16
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17 ;; You should have received a copy of the GNU General Public License
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18 ;; along with GCC; see the file COPYING3. If not see
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19 ;; <http://www.gnu.org/licenses/>.
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20
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21 (define_constants
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22 [(TFHAR_SPR 128)
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23 (TFIAR_SPR 129)
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24 (TEXASR_SPR 130)
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25 (TEXASRU_SPR 131)
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26 (MAX_HTM_OPERANDS 4)
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27 ])
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28
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29 ;;
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30 ;; UNSPEC usage
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31 ;;
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32
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33 (define_c_enum "unspec"
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34 [UNSPEC_HTM_FENCE
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35 ])
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36
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37 ;;
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38 ;; UNSPEC_VOLATILE usage
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39 ;;
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40
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41 (define_c_enum "unspecv"
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42 [UNSPECV_HTM_TABORT
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43 UNSPECV_HTM_TABORTXC
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44 UNSPECV_HTM_TABORTXCI
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45 UNSPECV_HTM_TBEGIN
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46 UNSPECV_HTM_TCHECK
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47 UNSPECV_HTM_TEND
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48 UNSPECV_HTM_TRECHKPT
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49 UNSPECV_HTM_TRECLAIM
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50 UNSPECV_HTM_TSR
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51 UNSPECV_HTM_TTEST
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52 UNSPECV_HTM_MFSPR
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53 UNSPECV_HTM_MTSPR
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54 ])
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55
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56 (define_expand "tabort"
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57 [(parallel
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58 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
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59 (unspec_volatile:CC [(match_operand:SI 0 "base_reg_operand" "b")]
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60 UNSPECV_HTM_TABORT))
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61 (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
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62 "TARGET_HTM"
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63 {
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64 operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
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65 MEM_VOLATILE_P (operands[2]) = 1;
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66 })
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67
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68 (define_insn "*tabort"
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69 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
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70 (unspec_volatile:CC [(match_operand:SI 0 "base_reg_operand" "b")]
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71 UNSPECV_HTM_TABORT))
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72 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
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73 "TARGET_HTM"
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74 "tabort. %0"
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75 [(set_attr "type" "htmsimple")
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76 (set_attr "length" "4")])
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77
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78 (define_expand "tabort<wd>c"
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79 [(parallel
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80 [(set (match_operand:CC 3 "cc_reg_operand" "=x")
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81 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
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82 (match_operand:GPR 1 "gpc_reg_operand" "r")
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83 (match_operand:GPR 2 "gpc_reg_operand" "r")]
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84 UNSPECV_HTM_TABORTXC))
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85 (set (match_dup 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))])]
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86 "TARGET_HTM"
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87 {
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88 operands[4] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
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89 MEM_VOLATILE_P (operands[4]) = 1;
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90 })
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91
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92 (define_insn "*tabort<wd>c"
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93 [(set (match_operand:CC 3 "cc_reg_operand" "=x")
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94 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
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95 (match_operand:GPR 1 "gpc_reg_operand" "r")
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96 (match_operand:GPR 2 "gpc_reg_operand" "r")]
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97 UNSPECV_HTM_TABORTXC))
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98 (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))]
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99 "TARGET_HTM"
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100 "tabort<wd>c. %0,%1,%2"
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101 [(set_attr "type" "htmsimple")
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102 (set_attr "length" "4")])
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103
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104 (define_expand "tabort<wd>ci"
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105 [(parallel
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106 [(set (match_operand:CC 3 "cc_reg_operand" "=x")
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107 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
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108 (match_operand:GPR 1 "gpc_reg_operand" "r")
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109 (match_operand 2 "s5bit_cint_operand" "n")]
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110 UNSPECV_HTM_TABORTXCI))
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111 (set (match_dup 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))])]
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112 "TARGET_HTM"
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113 {
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114 operands[4] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
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115 MEM_VOLATILE_P (operands[4]) = 1;
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116 })
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117
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118 (define_insn "*tabort<wd>ci"
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119 [(set (match_operand:CC 3 "cc_reg_operand" "=x")
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120 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
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121 (match_operand:GPR 1 "gpc_reg_operand" "r")
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122 (match_operand 2 "s5bit_cint_operand" "n")]
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123 UNSPECV_HTM_TABORTXCI))
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124 (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))]
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125 "TARGET_HTM"
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126 "tabort<wd>ci. %0,%1,%2"
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127 [(set_attr "type" "htmsimple")
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128 (set_attr "length" "4")])
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129
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130 (define_expand "tbegin"
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131 [(parallel
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132 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
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133 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
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134 UNSPECV_HTM_TBEGIN))
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135 (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
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136 "TARGET_HTM"
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137 {
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138 operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
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139 MEM_VOLATILE_P (operands[2]) = 1;
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140 })
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141
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142 (define_insn "*tbegin"
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143 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
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144 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
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145 UNSPECV_HTM_TBEGIN))
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146 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
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147 "TARGET_HTM"
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148 "tbegin. %0"
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149 [(set_attr "type" "htm")
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150 (set_attr "length" "4")])
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151
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152 (define_expand "tcheck"
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153 [(parallel
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154 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
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155 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK))
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156 (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
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157 "TARGET_HTM"
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158 {
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159 operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
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160 MEM_VOLATILE_P (operands[1]) = 1;
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161 })
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162
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163 (define_insn "*tcheck"
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164 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
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165 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK))
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166 (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
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167 "TARGET_HTM"
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168 "tcheck %0"
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169 [(set_attr "type" "htm")
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170 (set_attr "length" "4")])
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171
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172 (define_expand "tend"
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173 [(parallel
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174 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
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175 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
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176 UNSPECV_HTM_TEND))
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177 (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
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178 "TARGET_HTM"
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179 {
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180 operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
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181 MEM_VOLATILE_P (operands[2]) = 1;
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182 })
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183
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184 (define_insn "*tend"
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185 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
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186 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
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187 UNSPECV_HTM_TEND))
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188 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
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189 "TARGET_HTM"
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190 "tend. %0"
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191 [(set_attr "type" "htm")
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192 (set_attr "length" "4")])
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193
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194 (define_expand "trechkpt"
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195 [(parallel
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196 [(set (match_operand:CC 0 "cc_reg_operand" "=x")
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197 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT))
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198 (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
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199 "TARGET_HTM"
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200 {
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201 operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
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202 MEM_VOLATILE_P (operands[1]) = 1;
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203 })
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204
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205 (define_insn "*trechkpt"
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206 [(set (match_operand:CC 0 "cc_reg_operand" "=x")
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207 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT))
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208 (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
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209 "TARGET_HTM"
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210 "trechkpt."
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211 [(set_attr "type" "htmsimple")
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212 (set_attr "length" "4")])
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213
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214 (define_expand "treclaim"
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215 [(parallel
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216 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
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217 (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
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218 UNSPECV_HTM_TRECLAIM))
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219 (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
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220 "TARGET_HTM"
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221 {
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222 operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
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223 MEM_VOLATILE_P (operands[2]) = 1;
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224 })
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225
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226 (define_insn "*treclaim"
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227 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
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228 (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
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229 UNSPECV_HTM_TRECLAIM))
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230 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
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231 "TARGET_HTM"
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232 "treclaim. %0"
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233 [(set_attr "type" "htmsimple")
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234 (set_attr "length" "4")])
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235
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236 (define_expand "tsr"
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237 [(parallel
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238 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
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239 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
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240 UNSPECV_HTM_TSR))
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241 (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
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242 "TARGET_HTM"
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243 {
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244 operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
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245 MEM_VOLATILE_P (operands[2]) = 1;
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246 })
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247
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248 (define_insn "*tsr"
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249 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
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250 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
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251 UNSPECV_HTM_TSR))
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252 (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
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253 "TARGET_HTM"
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254 "tsr. %0"
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255 [(set_attr "type" "htmsimple")
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256 (set_attr "length" "4")])
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257
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258 (define_expand "ttest"
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259 [(parallel
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260 [(set (match_operand:CC 0 "cc_reg_operand" "=x")
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261 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST))
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262 (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
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263 "TARGET_HTM"
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264 {
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265 operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
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266 MEM_VOLATILE_P (operands[1]) = 1;
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267 })
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268
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269 (define_insn "*ttest"
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270 [(set (match_operand:CC 0 "cc_reg_operand" "=x")
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271 (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST))
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272 (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
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273 "TARGET_HTM"
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274 "tabortwci. 0,1,0"
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275 [(set_attr "type" "htmsimple")
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276 (set_attr "length" "4")])
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277
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278 (define_insn "htm_mfspr_<mode>"
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279 [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
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280 (unspec_volatile:GPR [(match_operand 1 "u10bit_cint_operand" "n")
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281 (match_operand:GPR 2 "htm_spr_reg_operand" "")]
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282 UNSPECV_HTM_MFSPR))]
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283 "TARGET_HTM"
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284 "mfspr %0,%1";
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285 [(set_attr "type" "htm")
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286 (set_attr "length" "4")])
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287
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288 (define_insn "htm_mtspr_<mode>"
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289 [(set (match_operand:GPR 2 "htm_spr_reg_operand" "")
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290 (unspec_volatile:GPR [(match_operand:GPR 0 "gpc_reg_operand" "r")
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291 (match_operand 1 "u10bit_cint_operand" "n")]
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292 UNSPECV_HTM_MTSPR))]
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293 "TARGET_HTM"
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294 "mtspr %1,%0";
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295 [(set_attr "type" "htm")
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296 (set_attr "length" "4")])
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