Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/s390/constraints.md @ 111:04ced10e8804
gcc 7
| author | kono |
|---|---|
| date | Fri, 27 Oct 2017 22:46:09 +0900 |
| parents | 77e2b8dfacca |
| children | 84e7813d76e9 |
| rev | line source |
|---|---|
| 0 | 1 ;; Constraints definitions belonging to the gcc backend for IBM S/390. |
| 111 | 2 ;; Copyright (C) 2006-2017 Free Software Foundation, Inc. |
| 0 | 3 ;; Written by Wolfgang Gellerich, using code and information found in |
| 4 ;; files s390.md, s390.h, and s390.c. | |
| 5 ;; | |
| 6 ;; This file is part of GCC. | |
| 7 ;; | |
| 8 ;; GCC is free software; you can redistribute it and/or modify it under | |
| 9 ;; the terms of the GNU General Public License as published by the Free | |
| 10 ;; Software Foundation; either version 3, or (at your option) any later | |
| 11 ;; version. | |
| 12 ;; | |
| 13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
| 14 ;; WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 15 ;; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 16 ;; for more details. | |
| 17 ;; | |
| 18 ;; You should have received a copy of the GNU General Public License | |
| 19 ;; along with GCC; see the file COPYING3. If not see | |
| 20 ;; <http://www.gnu.org/licenses/>. | |
| 21 | |
| 22 | |
| 23 ;; | |
| 24 ;; Special constraints for s/390 machine description: | |
| 25 ;; | |
| 26 ;; a -- Any address register from 1 to 15. | |
| 27 ;; b -- Memory operand whose address is a symbol reference or a symbol | |
| 28 ;; reference + constant which can be proven to be naturally aligned. | |
| 29 ;; c -- Condition code register 33. | |
| 30 ;; d -- Any register from 0 to 15. | |
| 31 ;; f -- Floating point registers. | |
| 111 | 32 ;; j -- Multiple letter constraint for constant scalar and vector values |
| 33 ;; j00: constant zero scalar or vector | |
| 34 ;; jm1: constant scalar or vector with all bits set | |
| 35 ;; jxx: contiguous bitmask of 0 or 1 in all vector elements | |
| 36 ;; jyy: constant consisting of byte chunks being either 0 or 0xff | |
| 37 ;; jKK: constant vector with all elements having the same value and | |
| 38 ;; matching K constraint | |
| 39 ;; jm6: An integer operand with the lowest order 6 bits all ones. | |
| 0 | 40 ;; t -- Access registers 36 and 37. |
| 111 | 41 ;; v -- Vector registers v0-v31. |
| 0 | 42 ;; C -- A signed 8-bit constant (-128..127) |
| 43 ;; D -- An unsigned 16-bit constant (0..65535) | |
| 44 ;; G -- Const double zero operand | |
| 45 ;; I -- An 8-bit constant (0..255). | |
| 46 ;; J -- A 12-bit constant (0..4095). | |
| 47 ;; K -- A 16-bit constant (-32768..32767). | |
| 48 ;; L -- Value appropriate as displacement. | |
| 49 ;; (0..4095) for short displacement | |
| 50 ;; (-524288..524287) for long displacement | |
| 51 ;; M -- Constant integer with a value of 0x7fffffff. | |
| 52 ;; N -- Multiple letter constraint followed by 4 parameter letters. | |
| 53 ;; 0..9,x: number of the part counting from most to least significant | |
| 54 ;; H,Q: mode of the part | |
| 55 ;; D,S,H: mode of the containing operand | |
| 56 ;; 0,F: value of the other parts (F - all bits set) | |
| 111 | 57 ;; -- |
| 58 ;; xxDq satisfies s390_contiguous_bitmask_p for DImode | |
| 59 ;; (with possible wraparound of the one-bit range) | |
| 60 ;; xxSw satisfies s390_contiguous_bitmask_p for SImode | |
| 61 ;; (with possible wraparound of the one-bit range) | |
| 62 ;; xxSq satisfies s390_contiguous_bitmask_nowrap_p for SImode | |
| 63 ;; (without wraparound of the one-bit range) | |
| 0 | 64 ;; |
| 65 ;; The constraint matches if the specified part of a constant | |
| 66 ;; has a value different from its other parts. If the letter x | |
| 67 ;; is specified instead of a part number, the constraint matches | |
| 68 ;; if there is any single part with non-default value. | |
| 69 ;; O -- Multiple letter constraint followed by 1 parameter. | |
| 70 ;; s: Signed extended immediate value (-2G .. 2G-1). | |
| 71 ;; p: Positive extended immediate value (0 .. 4G-1). | |
| 72 ;; n: Negative extended immediate value (-4G+1 .. -1). | |
| 73 ;; These constraints do not accept any operand if the machine does | |
| 74 ;; not provide the extended-immediate facility. | |
| 75 ;; P -- Any integer constant that can be loaded without literal pool. | |
| 76 ;; Q -- Memory reference without index register and with short displacement. | |
| 77 ;; R -- Memory reference with index register and short displacement. | |
| 78 ;; S -- Memory reference without index register but with long displacement. | |
| 79 ;; T -- Memory reference with index register and long displacement. | |
| 80 ;; A -- Multiple letter constraint followed by Q, R, S, or T: | |
| 81 ;; Offsettable memory reference of type specified by second letter. | |
| 82 ;; B -- Multiple letter constraint followed by Q, R, S, or T: | |
| 83 ;; Memory reference of the type specified by second letter that | |
| 84 ;; does *not* refer to a literal pool entry. | |
| 111 | 85 ;; U -- Pointer with short displacement. (deprecated - use ZR) |
| 86 ;; W -- Pointer with long displacement. (deprecated - use ZT) | |
| 87 ;; Y -- Address style operand without index. | |
| 36 | 88 ;; ZQ -- Pointer without index register and with short displacement. |
| 89 ;; ZR -- Pointer with index register and short displacement. | |
| 90 ;; ZS -- Pointer without index register but with long displacement. | |
| 91 ;; ZT -- Pointer with index register and long displacement. | |
| 92 ;; | |
| 0 | 93 ;; |
| 94 | |
| 95 | |
| 96 ;; | |
| 97 ;; Register constraints. | |
| 98 ;; | |
| 99 | |
|
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100 (define_register_constraint "a" |
| 0 | 101 "ADDR_REGS" |
| 102 "Any address register from 1 to 15.") | |
| 103 | |
| 104 | |
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105 (define_register_constraint "c" |
| 0 | 106 "CC_REGS" |
| 107 "Condition code register 33") | |
| 108 | |
| 109 | |
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110 (define_register_constraint "d" |
| 0 | 111 "GENERAL_REGS" |
| 112 "Any register from 0 to 15") | |
| 113 | |
| 114 | |
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115 (define_register_constraint "f" |
| 0 | 116 "FP_REGS" |
| 117 "Floating point registers") | |
| 118 | |
| 119 | |
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120 (define_register_constraint "t" |
| 0 | 121 "ACCESS_REGS" |
| 122 "@internal | |
| 123 Access registers 36 and 37") | |
| 124 | |
| 125 | |
| 111 | 126 (define_register_constraint "v" |
| 127 "VEC_REGS" | |
| 128 "Vector registers v0-v31") | |
| 129 | |
| 130 | |
| 0 | 131 ;; |
| 132 ;; General constraints for constants. | |
| 133 ;; | |
| 134 | |
| 135 (define_constraint "C" | |
| 136 "@internal | |
| 137 An 8-bit signed immediate constant (-128..127)" | |
| 138 (and (match_code "const_int") | |
| 139 (match_test "ival >= -128 && ival <= 127"))) | |
| 140 | |
| 141 | |
| 142 (define_constraint "D" | |
| 143 "An unsigned 16-bit constant (0..65535)" | |
| 144 (and (match_code "const_int") | |
| 145 (match_test "ival >= 0 && ival <= 65535"))) | |
| 146 | |
| 147 | |
| 148 (define_constraint "G" | |
| 149 "@internal | |
| 150 Const double zero operand" | |
| 151 (and (match_code "const_double") | |
| 152 (match_test "s390_float_const_zero_p (op)"))) | |
| 153 | |
| 154 | |
| 155 (define_constraint "I" | |
| 156 "An 8-bit constant (0..255)" | |
| 157 (and (match_code "const_int") | |
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158 (match_test "(unsigned HOST_WIDE_INT) ival <= 255"))) |
| 0 | 159 |
| 160 | |
| 161 (define_constraint "J" | |
| 162 "A 12-bit constant (0..4095)" | |
| 163 (and (match_code "const_int") | |
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164 (match_test "(unsigned HOST_WIDE_INT) ival <= 4095"))) |
| 0 | 165 |
| 166 | |
| 167 (define_constraint "K" | |
| 168 "A 16-bit constant (-32768..32767)" | |
| 169 (and (match_code "const_int") | |
| 170 (match_test "ival >= -32768 && ival <= 32767"))) | |
| 171 | |
| 172 | |
| 173 (define_constraint "L" | |
| 174 "Value appropriate as displacement. | |
| 175 (0..4095) for short displacement | |
| 176 (-524288..524287) for long displacement" | |
| 177 (and (match_code "const_int") | |
| 178 (match_test "TARGET_LONG_DISPLACEMENT ? | |
| 179 (ival >= -524288 && ival <= 524287) | |
| 180 : (ival >= 0 && ival <= 4095)"))) | |
| 181 | |
| 182 | |
| 183 (define_constraint "M" | |
| 184 "Constant integer with a value of 0x7fffffff" | |
| 185 (and (match_code "const_int") | |
| 186 (match_test "ival == 2147483647"))) | |
| 187 | |
| 188 | |
| 189 (define_constraint "P" | |
| 190 "@internal | |
| 191 Any integer constant that can be loaded without literal pool" | |
| 192 (and (match_code "const_int") | |
| 193 (match_test "legitimate_reload_constant_p (GEN_INT (ival))"))) | |
| 194 | |
| 195 | |
| 196 (define_address_constraint "Y" | |
| 111 | 197 "Address style operand without index register" |
| 0 | 198 |
| 111 | 199 ;; Simply check for base + offset style operands. Reload will take |
| 200 ;; care of making sure we have a proper base register. | |
| 0 | 201 |
| 111 | 202 (match_test "s390_decompose_addrstyle_without_index (op, NULL, NULL)" )) |
| 0 | 203 |
| 204 | |
| 205 ;; N -- Multiple letter constraint followed by 4 parameter letters. | |
| 206 ;; 0..9,x: number of the part counting from most to least significant | |
| 207 ;; H,Q: mode of the part | |
| 208 ;; D,S,H: mode of the containing operand | |
| 209 ;; 0,F: value of the other parts (F = all bits set) | |
| 210 ;; | |
| 211 ;; The constraint matches if the specified part of a constant | |
| 212 ;; has a value different from its other parts. If the letter x | |
| 213 ;; is specified instead of a part number, the constraint matches | |
| 214 ;; if there is any single part with non-default value. | |
| 215 ;; | |
|
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216 ;; The following patterns define only those constraints that are actually |
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217 ;; used in s390.md. If you need an additional one, simply add it in the |
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218 ;; obvious way. Function s390_N_constraint_str is ready to handle all |
| 0 | 219 ;; combinations. |
| 220 ;; | |
| 221 | |
| 222 | |
| 223 (define_constraint "NxQS0" | |
| 224 "@internal" | |
| 225 (and (match_code "const_int") | |
| 226 (match_test "s390_N_constraint_str (\"xQS0\", ival)"))) | |
| 227 | |
| 228 | |
| 229 (define_constraint "NxQD0" | |
| 230 "@internal" | |
| 231 (and (match_code "const_int") | |
| 232 (match_test "s390_N_constraint_str (\"xQD0\", ival)"))) | |
| 233 | |
| 234 | |
| 235 (define_constraint "N3HD0" | |
| 236 "@internal" | |
| 237 (and (match_code "const_int") | |
| 238 (match_test "s390_N_constraint_str (\"3HD0\", ival)"))) | |
| 239 | |
| 240 | |
| 241 (define_constraint "N2HD0" | |
| 242 "@internal" | |
| 243 (and (match_code "const_int") | |
| 244 (match_test "s390_N_constraint_str (\"2HD0\", ival)"))) | |
| 245 | |
| 246 | |
| 247 (define_constraint "N1SD0" | |
| 248 "@internal" | |
| 249 (and (match_code "const_int") | |
| 250 (match_test "s390_N_constraint_str (\"1SD0\", ival)"))) | |
| 251 | |
| 252 | |
| 253 (define_constraint "N1HS0" | |
| 254 "@internal" | |
| 255 (and (match_code "const_int") | |
| 256 (match_test "s390_N_constraint_str (\"1HS0\", ival)"))) | |
| 257 | |
| 258 | |
| 259 (define_constraint "N1HD0" | |
| 260 "@internal" | |
| 261 (and (match_code "const_int") | |
| 262 (match_test "s390_N_constraint_str (\"1HD0\", ival)"))) | |
| 263 | |
| 264 | |
| 265 (define_constraint "N0SD0" | |
| 266 "@internal" | |
| 267 (and (match_code "const_int") | |
| 268 (match_test "s390_N_constraint_str (\"0SD0\", ival)"))) | |
| 269 | |
| 270 | |
| 271 (define_constraint "N0HS0" | |
| 272 "@internal" | |
| 273 (and (match_code "const_int") | |
| 274 (match_test "s390_N_constraint_str (\"0HS0\", ival)"))) | |
| 275 | |
| 276 | |
| 277 (define_constraint "N0HD0" | |
| 278 "@internal" | |
| 279 (and (match_code "const_int") | |
| 280 (match_test "s390_N_constraint_str (\"0HD0\", ival)"))) | |
| 281 | |
| 282 | |
| 283 (define_constraint "NxQDF" | |
| 284 "@internal" | |
| 285 (and (match_code "const_int") | |
| 286 (match_test "s390_N_constraint_str (\"xQDF\", ival)"))) | |
| 287 | |
| 288 | |
| 289 (define_constraint "N1SDF" | |
| 290 "@internal" | |
| 291 (and (match_code "const_int") | |
| 292 (match_test "s390_N_constraint_str (\"1SDF\", ival)"))) | |
| 293 | |
| 294 | |
| 295 (define_constraint "N0SDF" | |
| 296 "@internal" | |
| 297 (and (match_code "const_int") | |
| 298 (match_test "s390_N_constraint_str (\"0SDF\", ival)"))) | |
| 299 | |
| 300 | |
| 301 (define_constraint "N3HDF" | |
| 302 "@internal" | |
| 303 (and (match_code "const_int") | |
| 304 (match_test "s390_N_constraint_str (\"3HDF\", ival)"))) | |
| 305 | |
| 306 | |
| 307 (define_constraint "N2HDF" | |
| 308 "@internal" | |
| 309 (and (match_code "const_int") | |
| 310 (match_test "s390_N_constraint_str (\"2HDF\", ival)"))) | |
| 311 | |
| 312 | |
| 313 (define_constraint "N1HDF" | |
| 314 "@internal" | |
| 315 (and (match_code "const_int") | |
| 316 (match_test "s390_N_constraint_str (\"1HDF\", ival)"))) | |
| 317 | |
| 318 | |
| 319 (define_constraint "N0HDF" | |
| 320 "@internal" | |
| 321 (and (match_code "const_int") | |
| 322 (match_test "s390_N_constraint_str (\"0HDF\", ival)"))) | |
| 323 | |
| 324 | |
| 325 (define_constraint "N0HSF" | |
| 326 "@internal" | |
| 327 (and (match_code "const_int") | |
| 328 (match_test "s390_N_constraint_str (\"0HSF\", ival)"))) | |
| 329 | |
| 330 | |
| 331 (define_constraint "N1HSF" | |
| 332 "@internal" | |
| 333 (and (match_code "const_int") | |
| 334 (match_test "s390_N_constraint_str (\"1HSF\", ival)"))) | |
| 335 | |
| 336 | |
| 337 (define_constraint "NxQSF" | |
| 338 "@internal" | |
| 339 (and (match_code "const_int") | |
| 340 (match_test "s390_N_constraint_str (\"xQSF\", ival)"))) | |
| 341 | |
| 342 | |
| 343 (define_constraint "NxQHF" | |
| 344 "@internal" | |
| 345 (and (match_code "const_int") | |
| 346 (match_test "s390_N_constraint_str (\"xQHF\", ival)"))) | |
| 347 | |
| 348 | |
| 349 (define_constraint "NxQH0" | |
| 350 "@internal" | |
| 351 (and (match_code "const_int") | |
| 352 (match_test "s390_N_constraint_str (\"xQH0\", ival)"))) | |
| 353 | |
| 111 | 354 (define_constraint "NxxDw" |
| 355 "@internal" | |
| 356 (and (match_code "const_int") | |
| 357 (match_test "s390_contiguous_bitmask_p (ival, true, 64, NULL, NULL)"))) | |
| 0 | 358 |
| 111 | 359 (define_constraint "NxxSq" |
| 360 "@internal" | |
| 361 (and (match_code "const_int") | |
| 362 (match_test "s390_contiguous_bitmask_p (ival, false, 32, NULL, NULL)"))) | |
| 0 | 363 |
| 111 | 364 (define_constraint "NxxSw" |
| 365 "@internal" | |
| 366 (and (match_code "const_int") | |
| 367 (match_test "s390_contiguous_bitmask_p (ival, true, 32, NULL, NULL)"))) | |
| 0 | 368 |
| 369 ;; | |
| 370 ;; Double-letter constraints starting with O follow. | |
| 371 ;; | |
| 372 | |
| 373 | |
| 374 (define_constraint "Os" | |
| 375 "@internal | |
| 376 Signed extended immediate value (-2G .. 2G-1). | |
| 377 This constraint will only match if the machine provides | |
| 378 the extended-immediate facility." | |
| 379 (and (match_code "const_int") | |
| 380 (match_test "s390_O_constraint_str ('s', ival)"))) | |
| 381 | |
| 382 | |
| 383 (define_constraint "Op" | |
| 384 "@internal | |
| 385 Positive extended immediate value (0 .. 4G-1). | |
| 386 This constraint will only match if the machine provides | |
| 387 the extended-immediate facility." | |
| 388 (and (match_code "const_int") | |
| 389 (match_test "s390_O_constraint_str ('p', ival)"))) | |
| 390 | |
| 391 | |
| 392 (define_constraint "On" | |
| 393 "@internal | |
| 394 Negative extended immediate value (-4G+1 .. -1). | |
| 395 This constraint will only match if the machine provides | |
| 396 the extended-immediate facility." | |
| 397 (and (match_code "const_int") | |
| 398 (match_test "s390_O_constraint_str ('n', ival)"))) | |
| 399 | |
| 400 | |
| 111 | 401 ;; |
| 402 ;; Vector constraints follow. | |
| 403 ;; | |
| 0 | 404 |
| 111 | 405 (define_constraint "j00" |
| 406 "Zero scalar or vector constant" | |
| 407 (match_test "op == CONST0_RTX (GET_MODE (op))")) | |
| 408 | |
| 409 (define_constraint "jm1" | |
| 410 "All one bit scalar or vector constant" | |
| 411 (match_test "op == CONSTM1_RTX (GET_MODE (op))")) | |
| 412 | |
| 413 ; vector generate mask operand - support for up to 64 bit elements | |
| 414 (define_constraint "jxx" | |
| 415 "@internal" | |
| 416 (and (match_code "const_vector") | |
| 417 (match_test "s390_contiguous_bitmask_vector_p (op, NULL, NULL)"))) | |
| 418 | |
| 419 ; vector generate byte mask operand - this is only supposed to deal | |
| 420 ; with real vectors 128 bit values of being either 0 or -1 are handled | |
| 421 ; with j00 and jm1 | |
| 422 (define_constraint "jyy" | |
| 423 "@internal" | |
| 424 (and (match_code "const_vector") | |
| 425 (match_test "s390_bytemask_vector_p (op, NULL)"))) | |
| 426 | |
| 427 ; vector replicate immediate operand - support for up to 64 bit elements | |
| 428 (define_constraint "jKK" | |
| 429 "@internal" | |
| 430 (and (and (and (match_code "const_vector") | |
| 431 (match_test "const_vec_duplicate_p (op)")) | |
| 432 (match_test "GET_MODE_UNIT_SIZE (GET_MODE (op)) <= 8")) | |
| 433 (match_test "satisfies_constraint_K (XVECEXP (op, 0, 0))"))) | |
| 434 | |
| 435 (define_constraint "jm6" | |
| 436 "@internal An integer operand with the lowest order 6 bits all ones." | |
| 437 (match_operand 0 "const_int_6bitset_operand")) | |
| 0 | 438 |
| 439 ;; | |
| 440 ;; Memory constraints follow. | |
| 441 ;; | |
| 442 | |
| 443 (define_memory_constraint "Q" | |
| 444 "Memory reference without index register and with short displacement" | |
| 445 (match_test "s390_mem_constraint (\"Q\", op)")) | |
| 446 | |
| 447 | |
| 448 (define_memory_constraint "R" | |
| 449 "Memory reference with index register and short displacement" | |
| 450 (match_test "s390_mem_constraint (\"R\", op)")) | |
| 451 | |
| 452 | |
| 453 (define_memory_constraint "S" | |
| 454 "Memory reference without index register but with long displacement" | |
| 455 (match_test "s390_mem_constraint (\"S\", op)")) | |
| 456 | |
| 457 | |
| 458 (define_memory_constraint "T" | |
| 459 "Memory reference with index register and long displacement" | |
| 460 (match_test "s390_mem_constraint (\"T\", op)")) | |
| 461 | |
| 462 | |
| 463 (define_memory_constraint "b" | |
| 464 "Memory reference whose address is a naturally aligned symbol reference." | |
| 465 (match_test "MEM_P (op) | |
| 466 && s390_check_symref_alignment (XEXP (op, 0), | |
| 467 GET_MODE_SIZE (GET_MODE (op)))")) | |
| 468 | |
| 469 ; This defines 'm' as normal memory constraint. This is only possible | |
| 470 ; since the standard memory constraint is re-defined in s390.h using | |
| 471 ; the TARGET_MEM_CONSTRAINT macro. | |
| 472 (define_memory_constraint "m" | |
| 473 "Matches the most general memory address for pre-z10 machines." | |
| 111 | 474 (match_test "s390_mem_constraint (\"T\", op)")) |
| 0 | 475 |
| 476 (define_memory_constraint "AQ" | |
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477 "@internal |
| 0 | 478 Offsettable memory reference without index register and with short displacement" |
| 479 (match_test "s390_mem_constraint (\"AQ\", op)")) | |
| 480 | |
| 481 | |
| 482 (define_memory_constraint "AR" | |
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483 "@internal |
| 0 | 484 Offsettable memory reference with index register and short displacement" |
| 485 (match_test "s390_mem_constraint (\"AR\", op)")) | |
| 486 | |
| 487 | |
| 488 (define_memory_constraint "AS" | |
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489 "@internal |
| 0 | 490 Offsettable memory reference without index register but with long displacement" |
| 491 (match_test "s390_mem_constraint (\"AS\", op)")) | |
| 492 | |
| 493 | |
| 494 (define_memory_constraint "AT" | |
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
36
diff
changeset
|
495 "@internal |
| 0 | 496 Offsettable memory reference with index register and long displacement" |
| 497 (match_test "s390_mem_constraint (\"AT\", op)")) | |
| 498 | |
| 499 | |
| 500 | |
| 501 (define_constraint "BQ" | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
36
diff
changeset
|
502 "@internal |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
36
diff
changeset
|
503 Memory reference without index register and with short |
| 0 | 504 displacement that does *not* refer to a literal pool entry." |
| 505 (match_test "s390_mem_constraint (\"BQ\", op)")) | |
| 506 | |
| 507 | |
| 508 (define_constraint "BR" | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
36
diff
changeset
|
509 "@internal |
| 0 | 510 Memory reference with index register and short displacement that |
| 511 does *not* refer to a literal pool entry. " | |
| 512 (match_test "s390_mem_constraint (\"BR\", op)")) | |
| 513 | |
| 514 | |
| 515 (define_constraint "BS" | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
36
diff
changeset
|
516 "@internal |
| 0 | 517 Memory reference without index register but with long displacement |
| 518 that does *not* refer to a literal pool entry. " | |
| 519 (match_test "s390_mem_constraint (\"BS\", op)")) | |
| 520 | |
| 521 | |
| 522 (define_constraint "BT" | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
36
diff
changeset
|
523 "@internal |
| 0 | 524 Memory reference with index register and long displacement that |
| 525 does *not* refer to a literal pool entry. " | |
| 526 (match_test "s390_mem_constraint (\"BT\", op)")) | |
| 527 | |
| 528 | |
| 529 (define_address_constraint "U" | |
| 111 | 530 "Pointer with short displacement. (deprecated - use ZR)" |
| 531 (match_test "s390_mem_constraint (\"ZR\", op)")) | |
| 0 | 532 |
| 36 | 533 (define_address_constraint "W" |
| 111 | 534 "Pointer with long displacement. (deprecated - use ZT)" |
| 535 (match_test "s390_mem_constraint (\"ZT\", op)")) | |
| 36 | 536 |
| 0 | 537 |
| 36 | 538 (define_address_constraint "ZQ" |
| 539 "Pointer without index register and with short displacement." | |
| 540 (match_test "s390_mem_constraint (\"ZQ\", op)")) | |
| 0 | 541 |
| 36 | 542 (define_address_constraint "ZR" |
| 543 "Pointer with index register and short displacement." | |
| 544 (match_test "s390_mem_constraint (\"ZR\", op)")) | |
| 545 | |
| 546 (define_address_constraint "ZS" | |
| 547 "Pointer without index register but with long displacement." | |
| 548 (match_test "s390_mem_constraint (\"ZS\", op)")) | |
| 549 | |
| 550 (define_address_constraint "ZT" | |
| 551 "Pointer with index register and long displacement." | |
| 552 (match_test "s390_mem_constraint (\"ZT\", op)")) |