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111
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1 /* An SH specific RTL pass that tries to optimize clrt and sett insns.
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2 Copyright (C) 2013-2017 Free Software Foundation, Inc.
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3
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4 This file is part of GCC.
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5
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6 GCC is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 3, or (at your option)
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9 any later version.
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10
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11 GCC is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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15
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16 You should have received a copy of the GNU General Public License
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17 along with GCC; see the file COPYING3. If not see
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18 <http://www.gnu.org/licenses/>. */
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19
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20 #include "config.h"
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21 #include "system.h"
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22 #include "coretypes.h"
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23 #include "backend.h"
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24 #include "target.h"
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25 #include "rtl.h"
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26 #include "df.h"
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27 #include "cfgrtl.h"
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28 #include "tree-pass.h"
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29
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30 #include <vector>
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31 #include <algorithm>
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32
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33 /*
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34 This pass tries to eliminate unnecessary sett or clrt instructions in cases
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35 where the ccreg value is already known to be the same as the constant set
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36 would set it to. This is done as follows:
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37
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38 Check every BB's insn and see if it's a sett or clrt.
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39 Once a sett or clrt insn is hit, walk insns and predecessor basic blocks
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40 backwards from that insn and determine all possible ccreg values from all
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41 basic block paths.
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42 Insns that set the ccreg value in some way (simple set, clobber etc) are
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43 recorded. Conditional branches where one edge leads to the sett / clrt insn
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44 are also recorded, since for each edge in the conditional branch the ccreg
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45 value is known constant.
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46 After collecting all possible ccreg values at the sett / clrt insn, check that
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47 all the values are the same. If that value is the same as the sett / clrt
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48 insn would set the ccreg to, the sett / clrt insn can be eliminated.
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49 */
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50
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51
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52 // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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53 // Helper functions
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54
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55 #define log_msg(...)\
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56 do { if (dump_file != NULL) fprintf (dump_file, __VA_ARGS__); } while (0)
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57
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58 #define log_insn(i)\
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59 do { if (dump_file != NULL) print_rtl_single (dump_file, \
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60 (const_rtx)i); } while (0)
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61
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62 #define log_rtx(r)\
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63 do { if (dump_file != NULL) print_rtl (dump_file, (const_rtx)r); } while (0)
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64
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65 #define log_return(retval, ...)\
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66 do { if (dump_file != NULL) fprintf (dump_file, __VA_ARGS__); \
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67 return retval; } while (0)
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68
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69 #define log_return_void(...)\
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70 do { if (dump_file != NULL) fprintf (dump_file, __VA_ARGS__); \
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71 return; } while (0)
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72
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73 // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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74 // RTL pass class
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75
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76 class sh_optimize_sett_clrt : public rtl_opt_pass
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77 {
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78 public:
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79 sh_optimize_sett_clrt (gcc::context* ctx, const char* name);
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80 virtual ~sh_optimize_sett_clrt (void);
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81 virtual bool gate (function*);
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82 virtual unsigned int execute (function* fun);
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83
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84 private:
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85 static const pass_data default_pass_data;
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86
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87 struct ccreg_value
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88 {
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89 // The insn at which the ccreg value was determined.
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90 // Might be NULL if e.g. an unknown value is recorded for an
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91 // empty basic block.
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92 rtx_insn *insn;
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93
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94 // The basic block where the insn was discovered.
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95 basic_block bb;
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96
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97 // The value of ccreg. If NULL_RTX, the exact value is not known, but
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98 // the ccreg is changed in some way (e.g. clobbered).
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99 rtx value;
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100 };
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101
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102 // Update the mode of the captured m_ccreg with the specified mode.
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103 void update_ccreg_mode (machine_mode m);
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104
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105 // Given an insn pattern, check if it sets the ccreg to a constant value
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106 // of either zero or STORE_FLAG_VALUE. If so, return the value rtx,
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107 // NULL_RTX otherwise.
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108 rtx const_setcc_value (rtx pat) const;
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109
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110 // Given a start insn and its basic block, recursively determine all
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111 // possible ccreg values in all basic block paths that can lead to the
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112 // start insn.
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113 bool find_last_ccreg_values (rtx_insn *start_insn, basic_block bb,
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114 std::vector<ccreg_value>& values_out,
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115 std::vector<basic_block>& prev_visited_bb) const;
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116
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117 // Given a cbranch insn, its basic block and another basic block, determine
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118 // the value to which the ccreg will be set after jumping/falling through to
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119 // the specified target basic block.
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120 bool sh_cbranch_ccreg_value (rtx_insn *cbranch_insn,
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121 basic_block cbranch_insn_bb,
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122 basic_block branch_target_bb) const;
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123
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124 // Check whether all of the ccreg values are the same.
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125 static bool all_ccreg_values_equal (const std::vector<ccreg_value>& values);
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126
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127 // Remove REG_DEAD and REG_UNUSED notes from insns of the specified
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128 // ccreg_value entries.
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129 void remove_ccreg_dead_unused_notes (std::vector<ccreg_value>& values) const;
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130
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131 // rtx of the ccreg that is obtained from the target.
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132 rtx m_ccreg;
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133 };
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134
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135 const pass_data sh_optimize_sett_clrt::default_pass_data =
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136 {
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137 RTL_PASS, // type
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138 "", // name (overwritten by the constructor)
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139 OPTGROUP_NONE, // optinfo_flags
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140 TV_OPTIMIZE, // tv_id
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141 0, // properties_required
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142 0, // properties_provided
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143 0, // properties_destroyed
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144 0, // todo_flags_start
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145 0 // todo_flags_finish
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146 };
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147
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148 sh_optimize_sett_clrt::sh_optimize_sett_clrt (gcc::context* ctx,
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149 const char* name)
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150 : rtl_opt_pass (default_pass_data, ctx),
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151 m_ccreg (NULL_RTX)
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152 {
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153 // Overwrite default name in pass_data base class.
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154 this->name = name;
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155 }
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156
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157 sh_optimize_sett_clrt::~sh_optimize_sett_clrt (void)
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158 {
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159 }
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160
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161 bool
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162 sh_optimize_sett_clrt::gate (function*)
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163 {
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164 return optimize > 0;
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165 }
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166
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167 unsigned int
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168 sh_optimize_sett_clrt::execute (function* fun)
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169 {
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170 unsigned int ccr0 = INVALID_REGNUM;
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171 unsigned int ccr1 = INVALID_REGNUM;
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172
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173 if (targetm.fixed_condition_code_regs (&ccr0, &ccr1)
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174 && ccr0 != INVALID_REGNUM)
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175 {
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176 // Initially create a reg rtx with VOIDmode.
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177 // When the constant setcc is discovered, the mode is changed
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178 // to the mode that is actually used by the target.
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179 m_ccreg = gen_rtx_REG (VOIDmode, ccr0);
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180 }
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181
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182 if (m_ccreg == NULL_RTX)
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183 log_return (0, "no ccreg.\n\n");
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184
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185 if (STORE_FLAG_VALUE != 1)
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186 log_return (0, "unsupported STORE_FLAG_VALUE %d", STORE_FLAG_VALUE);
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187
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188 log_msg ("ccreg: ");
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189 log_rtx (m_ccreg);
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190 log_msg (" STORE_FLAG_VALUE = %d\n", STORE_FLAG_VALUE);
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191
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192 if (!df_regs_ever_live_p (ccr0))
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193 log_return (0, "ccreg never live\n\n");
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194
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195 // Output vector for find_known_ccreg_values.
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196 std::vector<ccreg_value> ccreg_values;
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197 ccreg_values.reserve (32);
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198
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199 // Something for recording visited basic blocks to avoid infinite recursion.
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200 std::vector<basic_block> visited_bbs;
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201 visited_bbs.reserve (32);
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202
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203 // Look for insns that set the ccreg to a constant value and see if it can
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204 // be optimized.
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205 basic_block bb;
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206 FOR_EACH_BB_REVERSE_FN (bb, fun)
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207 for (rtx_insn *next_i, *i = NEXT_INSN (BB_HEAD (bb));
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208 i != NULL_RTX && i != BB_END (bb); i = next_i)
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209 {
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210 next_i = NEXT_INSN (i);
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211
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212 if (!INSN_P (i) || !NONDEBUG_INSN_P (i))
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213 continue;
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214
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215 rtx setcc_val = const_setcc_value (PATTERN (i));
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216 if (setcc_val != NULL_RTX)
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217 {
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218 update_ccreg_mode (GET_MODE (XEXP (PATTERN (i), 0)));
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219
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220 log_msg ("\n\nfound const setcc insn in [bb %d]: \n", bb->index);
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221 log_insn (i);
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222 log_msg ("\n");
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223
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224 ccreg_values.clear ();
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225 visited_bbs.clear ();
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226 bool ok = find_last_ccreg_values (PREV_INSN (i), bb, ccreg_values,
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227 visited_bbs);
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228
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229 log_msg ("number of ccreg values collected: %u\n",
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230 (unsigned int)ccreg_values.size ());
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231
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232 // If all the collected values are equal and are equal to the
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233 // constant value of the setcc insn, the setcc insn can be
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234 // removed.
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235 if (ok && all_ccreg_values_equal (ccreg_values)
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236 && rtx_equal_p (ccreg_values.front ().value, setcc_val))
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237 {
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238 log_msg ("all values are ");
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239 log_rtx (setcc_val);
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240 log_msg ("\n");
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241
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242 delete_insn (i);
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243 remove_ccreg_dead_unused_notes (ccreg_values);
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244 }
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245 }
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246 }
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247
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248 log_return (0, "\n\n");
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249 }
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250
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251 void
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252 sh_optimize_sett_clrt::update_ccreg_mode (machine_mode m)
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253 {
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254 if (GET_MODE (m_ccreg) == m)
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255 return;
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256
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257 PUT_MODE (m_ccreg, m);
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258 log_msg ("updated ccreg mode: ");
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259 log_rtx (m_ccreg);
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260 log_msg ("\n\n");
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261 }
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262
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263 rtx
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264 sh_optimize_sett_clrt::const_setcc_value (rtx pat) const
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265 {
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266 if (GET_CODE (pat) == SET
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267 && REG_P (XEXP (pat, 0)) && REGNO (XEXP (pat, 0)) == REGNO (m_ccreg)
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268 && CONST_INT_P (XEXP (pat, 1))
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269 && (INTVAL (XEXP (pat, 1)) == 0
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270 || INTVAL (XEXP (pat, 1)) == STORE_FLAG_VALUE))
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271 return XEXP (pat, 1);
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272 else
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273 return NULL_RTX;
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274 }
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275
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276 bool
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277 sh_optimize_sett_clrt
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278 ::sh_cbranch_ccreg_value (rtx_insn *cbranch_insn, basic_block cbranch_insn_bb,
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279 basic_block branch_target_bb) const
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280 {
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281 rtx pc_set_rtx = pc_set (cbranch_insn);
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282 gcc_assert (pc_set_rtx != NULL_RTX);
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283 gcc_assert (branch_target_bb != NULL);
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284
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285 rtx cond = XEXP (XEXP (pc_set_rtx, 1), 0);
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286 bool branch_if;
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287
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288 if (GET_CODE (cond) == NE
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289 && REG_P (XEXP (cond, 0)) && REGNO (XEXP (cond, 0)) == REGNO (m_ccreg)
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290 && XEXP (cond, 1) == const0_rtx)
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291 branch_if = true;
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292
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293 else if (GET_CODE (cond) == EQ
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294 && REG_P (XEXP (cond, 0)) && REGNO (XEXP (cond, 0)) == REGNO (m_ccreg)
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295 && XEXP (cond, 1) == const0_rtx)
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296 branch_if = false;
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297
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298 else
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299 gcc_unreachable ();
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300
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301 if (branch_target_bb == BRANCH_EDGE (cbranch_insn_bb)->dest)
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302 return branch_if;
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303 else if (branch_target_bb == FALLTHRU_EDGE (cbranch_insn_bb)->dest)
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304 return !branch_if;
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305 else
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306 gcc_unreachable ();
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307 }
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308
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309 bool
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310 sh_optimize_sett_clrt
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311 ::find_last_ccreg_values (rtx_insn *start_insn, basic_block bb,
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312 std::vector<ccreg_value>& values_out,
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313 std::vector<basic_block>& prev_visited_bb) const
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314 {
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315 // FIXME: For larger CFGs this will unnecessarily re-visit basic blocks.
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316 // Once a basic block has been visited, the result should be stored in
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317 // some container so that it can be looked up quickly eliminating the
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318 // re-visits.
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319 log_msg ("looking for ccreg values in [bb %d] ", bb->index);
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320 if (!prev_visited_bb.empty ())
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321 log_msg ("(prev visited [bb %d])", prev_visited_bb.back ()->index);
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322 log_msg ("\n");
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323
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324 for (rtx_insn *i = start_insn; i != NULL && i != PREV_INSN (BB_HEAD (bb));
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325 i = PREV_INSN (i))
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326 {
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327 if (!INSN_P (i))
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328 continue;
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329
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330 if (reg_set_p (m_ccreg, i))
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331 {
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332 const_rtx set_rtx = set_of (m_ccreg, i);
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333
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334 ccreg_value v;
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335 v.insn = i;
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336 v.bb = bb;
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337 v.value = set_rtx != NULL_RTX && GET_CODE (set_rtx) == SET
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338 ? XEXP (set_rtx, 1)
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339 : NULL_RTX;
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340
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341 log_msg ("found setcc in [bb %d] in insn:\n", bb->index);
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342 log_insn (i);
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343 log_msg ("\nccreg value: ");
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344 log_rtx (v.value);
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345 log_msg ("\n");
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346
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347 values_out.push_back (v);
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348 return true;
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349 }
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350
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351 if (any_condjump_p (i) && onlyjump_p (i) && !prev_visited_bb.empty ())
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352 {
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353 // For a conditional branch the ccreg value will be a known constant
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354 // of either 0 or STORE_FLAG_VALUE after branching/falling through
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355 // to one of the two successor BBs. Record the value for the BB
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356 // where we came from.
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357 log_msg ("found cbranch in [bb %d]:\n", bb->index);
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358 log_insn (i);
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359
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360 ccreg_value v;
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361 v.insn = i;
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362 v.bb = bb;
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363 v.value = GEN_INT (sh_cbranch_ccreg_value (i, bb,
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364 prev_visited_bb.back ()));
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365
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366 log_msg (" branches to [bb %d] with ccreg value ",
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367 prev_visited_bb.back ()->index);
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368 log_rtx (v.value);
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369 log_msg ("\n");
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370
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371 values_out.push_back (v);
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372 return true;
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373 }
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374 }
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375
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376 // If here, we've walked up all the insns of the current basic block
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377 // and none of them seems to modify the ccreg.
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378 // In this case, check the predecessor basic blocks.
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379 unsigned int pred_bb_count = 0;
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380
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381 // If the current basic block is not in the stack of previously visited
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382 // basic blocks yet, we can recursively check the predecessor basic blocks.
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383 // Otherwise we have a loop in the CFG and recursing again will result in
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384 // an infinite loop.
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385 if (std::find (prev_visited_bb.rbegin (), prev_visited_bb.rend (), bb)
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386 == prev_visited_bb.rend ())
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387 {
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388 prev_visited_bb.push_back (bb);
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389
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390 for (edge_iterator ei = ei_start (bb->preds); !ei_end_p (ei);
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391 ei_next (&ei))
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392 {
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393 if (ei_edge (ei)->flags & EDGE_COMPLEX)
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394 log_return (false, "aborting due to complex edge\n");
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395
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396 basic_block pred_bb = ei_edge (ei)->src;
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397 pred_bb_count += 1;
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398 if (!find_last_ccreg_values (BB_END (pred_bb), pred_bb, values_out,
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399 prev_visited_bb))
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400 return false;
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401 }
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402
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403 prev_visited_bb.pop_back ();
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404 }
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405 else
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406 log_msg ("loop detected for [bb %d]\n", bb->index);
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407
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408 log_msg ("[bb %d] pred_bb_count = %u\n", bb->index, pred_bb_count);
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409
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410 if (pred_bb_count == 0)
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411 {
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412 // If we haven't checked a single predecessor basic block, the current
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413 // basic block is probably a leaf block and we don't know the ccreg value.
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414 log_msg ("unknown ccreg value for [bb %d]\n", bb->index);
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415
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416 ccreg_value v;
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417 v.insn = BB_END (bb);
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418 v.bb = bb;
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419 v.value = NULL_RTX;
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420
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421 values_out.push_back (v);
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422 }
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423
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424 return true;
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425 }
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426
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427 bool
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428 sh_optimize_sett_clrt
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429 ::all_ccreg_values_equal (const std::vector<ccreg_value>& values)
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430 {
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431 if (values.empty ())
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432 return false;
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433
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434 rtx last_value = values.front ().value;
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435
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436 // If the ccreg is modified in the insn but the exact value is not known
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437 // the value rtx might be null.
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438 if (last_value == NULL_RTX)
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439 return false;
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440
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441 for (std::vector<ccreg_value>::const_iterator i = values.begin ();
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442 i != values.end (); ++i)
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443 if (i->value == NULL_RTX || !rtx_equal_p (last_value, i->value))
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444 return false;
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445
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446 return true;
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447 }
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448
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449 void
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450 sh_optimize_sett_clrt
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451 ::remove_ccreg_dead_unused_notes (std::vector<ccreg_value>& values) const
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452 {
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453 for (std::vector<ccreg_value>::iterator i = values.begin ();
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454 i != values.end (); ++i)
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455 {
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456 if (i->insn == NULL_RTX)
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457 continue;
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458
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459 rtx n = find_regno_note (i->insn, REG_DEAD, REGNO (m_ccreg));
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460 if (n != NULL_RTX)
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461 remove_note (i->insn, n);
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462
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463 n = find_regno_note (i->insn, REG_UNUSED, REGNO (m_ccreg));
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464 if (n != NULL_RTX)
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465 remove_note (i->insn, n);
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466 }
|
|
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467 }
|
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468
|
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469 // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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470 // This allows instantiating the pass somewhere else without having to pull
|
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|
471 // in a header file.
|
|
|
472 opt_pass*
|
|
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473 make_pass_sh_optimize_sett_clrt (gcc::context* ctx, const char* name)
|
|
|
474 {
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|
|
475 return new sh_optimize_sett_clrt (ctx, name);
|
|
|
476 }
|
