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111
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1 /* Definitions of target machine for GNU compiler for TILE-Gx.
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2 Copyright (C) 2011-2017 Free Software Foundation, Inc.
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3 Contributed by Walter Lee (walt@tilera.com)
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4
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5 This file is part of GCC.
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6
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7 GCC is free software; you can redistribute it and/or modify it
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8 under the terms of the GNU General Public License as published
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9 by the Free Software Foundation; either version 3, or (at your
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10 option) any later version.
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11
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12 GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 License for more details.
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16
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17 You should have received a copy of the GNU General Public License
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18 along with GCC; see the file COPYING3. If not see
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19 <http://www.gnu.org/licenses/>. */
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20
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21 /* Default target_flags if no switches are specified */
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22 #ifndef TARGET_DEFAULT
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23 #define TARGET_DEFAULT 0
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24 #endif
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25
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26 #ifndef TARGET_BIG_ENDIAN_DEFAULT
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27 #define TARGET_BIG_ENDIAN_DEFAULT 0
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28 #endif
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29
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30 #ifndef TARGET_ENDIAN_DEFAULT
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31 #if TARGET_BIG_ENDIAN_DEFAULT
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32 #define TARGET_ENDIAN_DEFAULT MASK_BIG_ENDIAN
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33 #else
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34 #define TARGET_ENDIAN_DEFAULT 0
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35 #endif
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36 #endif
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37
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38 /* This is used by tilegx_cpu_cpp_builtins to indicate the byte order
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39 we're compiling for. */
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40 #define TILEGX_CPU_CPP_ENDIAN_BUILTINS() \
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41 do \
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42 { \
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43 if (TARGET_BIG_ENDIAN) \
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44 builtin_define ("__BIG_ENDIAN__"); \
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45 else \
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46 builtin_define ("__LITTLE_ENDIAN__"); \
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47 } \
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48 while (0)
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49
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50 #include "config/tilegx/tilegx-opts.h"
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51
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52
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53 /* Target CPU builtins. */
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54 #define TARGET_CPU_CPP_BUILTINS() \
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55 tilegx_cpu_cpp_builtins (pfile)
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56
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57 #undef PTRDIFF_TYPE
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58 #define PTRDIFF_TYPE (TARGET_32BIT ? "int" : "long int")
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59
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60 #undef SIZE_TYPE
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61 #define SIZE_TYPE (TARGET_32BIT ? "unsigned int" : "long unsigned int")
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62
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63 #undef WCHAR_TYPE
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64 #define WCHAR_TYPE "int"
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65
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66 #undef WCHAR_TYPE_SIZE
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67 #define WCHAR_TYPE_SIZE 32
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68
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69
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70 /* Target machine storage layout */
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71
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72 #define BITS_BIG_ENDIAN 0
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73 #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
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74 #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
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75 #define FLOAT_WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
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76
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77 #define UNITS_PER_WORD 8
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78 #define PARM_BOUNDARY BITS_PER_WORD
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79 #define STACK_BOUNDARY 128
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80 #define FUNCTION_BOUNDARY 64
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81 #define BIGGEST_ALIGNMENT 128
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82 #define STRICT_ALIGNMENT 1
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83
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84 #define INT_TYPE_SIZE 32
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85 #define LONG_TYPE_SIZE (TARGET_32BIT ? 32 : 64)
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86 #define LONG_LONG_TYPE_SIZE 64
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87 #define FLOAT_TYPE_SIZE 32
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88 #define DOUBLE_TYPE_SIZE 64
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89 #define LONG_DOUBLE_TYPE_SIZE 64
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90 #define POINTER_SIZE LONG_TYPE_SIZE
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91
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92 #define PCC_BITFIELD_TYPE_MATTERS 1
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93 #define FASTEST_ALIGNMENT 64
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94 #define BIGGEST_FIELD_ALIGNMENT 128
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95 #define WIDEST_HARDWARE_FP_SIZE 64
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96
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97 /* Make arrays of chars word-aligned for the same reasons. */
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98 #define DATA_ALIGNMENT(TYPE, ALIGN) \
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99 (TREE_CODE (TYPE) == ARRAY_TYPE \
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100 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
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101 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
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102
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103 /* Make local arrays of chars word-aligned for the same reasons. */
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104 #define LOCAL_ALIGNMENT(TYPE, ALIGN) DATA_ALIGNMENT (TYPE, ALIGN)
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105
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106
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107 /* Standard register usage. */
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108
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109 #define FIRST_PSEUDO_REGISTER (64 + 4)
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110
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111 #define FIXED_REGISTERS \
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112 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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113 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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114 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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115 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
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116 1, 1, 1, 1}
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117 #define CALL_USED_REGISTERS \
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118 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
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119 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
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120 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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121 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
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122 1, 1, 1, 1}
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123
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124 #define CALL_REALLY_USED_REGISTERS \
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125 CALL_USED_REGISTERS
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126
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127 #define REG_ALLOC_ORDER { \
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128 10, 11, 12, 13, 14, /* call used */ \
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129 15, 16, 17, 18, 19, \
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130 20, 21, 22, 23, 24, \
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131 25, 26, 27, 28, 29, \
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132 \
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133 9, 8, 7, 6, 5, /* argument */ \
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134 4, 3, 2, 1, 0, \
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135 \
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136 55, /* return address */ \
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137 \
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138 30, 31, 32, 33, 34, /* call saved registers */ \
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139 35, 36, 37, 38, 39, \
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140 40, 41, 42, 43, 44, \
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141 45, 46, 47, 48, 49, \
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142 50, 51, \
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143 \
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144 52, /* hard frame pointer */ \
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145 53, 54, /* tp, sp */ \
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146 \
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147 56, 57, 58, 59, 60, /* special purpose */ \
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148 61, 62, 63, 64, 65, /* or fake registers */ \
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149 66, 67 \
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150 }
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151
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152 /* Register that holds an address into the text segment that can be
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153 used by pic code. */
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154 #define TILEGX_PIC_TEXT_LABEL_REGNUM (flag_pic ? 50 : INVALID_REGNUM)
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155 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 51 : INVALID_REGNUM)
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156 #define HARD_FRAME_POINTER_REGNUM 52
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157 #define THREAD_POINTER_REGNUM 53
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158 #define STACK_POINTER_REGNUM 54
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159 #define TILEGX_LINK_REGNUM 55
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160 #define FRAME_POINTER_REGNUM 64
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161 #define ARG_POINTER_REGNUM 65
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162 /* SPR storing the comparison value for compare and exchange. */
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163 #define TILEGX_CMPEXCH_REGNUM 66
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164 /* Pseudo registers used to enforce order between instructions that
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165 touch the networks. */
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166 #define TILEGX_NETORDER_REGNUM 67
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167 #define STATIC_CHAIN_REGNUM 10
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168
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169
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170 enum reg_class
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171 {
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172 NO_REGS,
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173 R0_REGS,
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174 R1_REGS,
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175 R2_REGS,
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176 R3_REGS,
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177 R4_REGS,
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178 R5_REGS,
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179 R6_REGS,
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180 R7_REGS,
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181 R8_REGS,
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182 R9_REGS,
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183 R10_REGS,
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184 ALL_REGS,
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185 LIM_REG_CLASSES
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186 };
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187
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188 #define N_REG_CLASSES (int) LIM_REG_CLASSES
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189
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190 /* Since GENERAL_REGS is the same class as ALL_REGS, don't give it a
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191 different class number; just make it an alias. */
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192 #define GENERAL_REGS ALL_REGS
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193
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194 #define REG_CLASS_NAMES \
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195 { \
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196 "NO_REGS", \
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197 "R0_REGS", \
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198 "R1_REGS", \
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199 "R2_REGS", \
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200 "R3_REGS", \
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201 "R4_REGS", \
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202 "R5_REGS", \
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203 "R6_REGS", \
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204 "R7_REGS", \
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205 "R8_REGS", \
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206 "R9_REGS", \
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207 "R10_REGS", \
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208 "ALL_REGS" \
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209 }
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210
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211 #define REG_CLASS_CONTENTS \
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212 { \
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213 { 0 }, \
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214 { 1 << 0 }, \
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215 { 1 << 1 }, \
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216 { 1 << 2 }, \
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217 { 1 << 3 }, \
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218 { 1 << 4 }, \
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219 { 1 << 5 }, \
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220 { 1 << 6 }, \
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221 { 1 << 7 }, \
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222 { 1 << 8 }, \
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223 { 1 << 9 }, \
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224 { 1 << 10 }, \
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225 { 0xffffffff, 0xffffffff } \
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226 }
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227
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228 #define REGNO_REG_CLASS(REGNO) \
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229 ((unsigned)(REGNO) <= 10 ? \
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230 (enum reg_class)(R0_REGS + (REGNO)) : ALL_REGS)
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231
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232 #define INDEX_REG_CLASS NO_REGS
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233 #define BASE_REG_CLASS ALL_REGS
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234
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235 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
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236
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237 #define CLASS_MAX_NREGS(CLASS, MODE) \
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238 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
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239
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240
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241 /* Stack layout; function entry, exit and calling. */
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242
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243 #define STACK_GROWS_DOWNWARD 1
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244 #define FRAME_GROWS_DOWNWARD 1
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245
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246 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \
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247 plus_constant (Pmode, (FRAME), UNITS_PER_WORD)
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248
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249 #define FIRST_PARM_OFFSET(FNDECL) 0
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250
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251 #define ACCUMULATE_OUTGOING_ARGS 1
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252
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253 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
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254
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255 #define INCOMING_FRAME_SP_OFFSET 0
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256
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257 #define STACK_POINTER_OFFSET (2 * UNITS_PER_WORD)
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258
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259 #define ARG_POINTER_CFA_OFFSET(FNDECL) (-STACK_POINTER_OFFSET)
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260
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261 #define DEFAULT_PCC_STRUCT_RETURN 0
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262
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263 /* The first 10 registers may hold return value. */
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264 #define TILEGX_NUM_RETURN_REGS 10
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265
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266 /* The first 10 registers hold function arguments. */
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267 #define TILEGX_NUM_ARG_REGS 10
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268
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269 #define FUNCTION_ARG_REGNO_P(N) ((N) < TILEGX_NUM_ARG_REGS)
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270
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271 /* The type used to store the number of words of arguments scanned so
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272 far during argument scanning. This includes any space that is
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273 skipped. */
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274 #define CUMULATIVE_ARGS int
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275
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276 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
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277 ((CUM) = 0)
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278
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279
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280 #define ELIMINABLE_REGS \
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281 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
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282 {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
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283 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
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284 {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
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285
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286 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
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287 ((OFFSET) = tilegx_initial_elimination_offset((FROM),(TO)))
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288
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289 #define PROFILE_BEFORE_PROLOGUE 1
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290
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291 #define FUNCTION_PROFILER(FILE, LABELNO) \
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292 tilegx_function_profiler (FILE, LABELNO)
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293
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294 #define TRAMPOLINE_SIZE (TARGET_32BIT ? 48 : 56)
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295 #define TRAMPOLINE_ALIGNMENT 64
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296 #define TRAMPOLINE_SECTION text_section
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297
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298
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299 /* Call frame debugging information. */
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300
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301 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, TILEGX_LINK_REGNUM)
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302
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303 #define RETURN_ADDR_RTX tilegx_return_addr
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304
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305 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (TILEGX_LINK_REGNUM)
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306
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307 #define DWARF_ZERO_REG 63
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308
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309 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N + 12) : INVALID_REGNUM)
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310 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 11)
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311 #define EH_RETURN_HANDLER_RTX tilegx_eh_return_handler_rtx ()
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312
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313 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
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314 tilegx_asm_preferred_eh_data_format ((CODE), (GLOBAL))
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315
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316
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317 /* Addressing modes, and classification of registers for them. */
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318
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319 #define HAVE_POST_INCREMENT 1
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320 #define HAVE_POST_DECREMENT 1
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321 #define HAVE_POST_MODIFY_DISP 1
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322
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323 #define REGNO_OK_FOR_INDEX_P(regno) 0
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324 #define REGNO_OK_FOR_BASE_P(regno) \
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325 ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
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326
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327 #define MAX_REGS_PER_ADDRESS 1
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328
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329 #define CONSTANT_ADDRESS_P(X) 0
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330
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331 #define LEGITIMATE_PIC_OPERAND_P(X) tilegx_legitimate_pic_operand_p (X)
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332
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333
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334 #define CASE_VECTOR_MODE Pmode
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335 #define CASE_VECTOR_PC_RELATIVE 0
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336 #define JUMP_TABLES_IN_TEXT_SECTION 0
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337
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338 #define DEFAULT_SIGNED_CHAR 1
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339
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340 #define MOVE_MAX UNITS_PER_WORD
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341
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342 /* Use a value of 11 for MOVE_RATIO and friends, because TILEPro
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343 returns structs as large as 10 words in registers. Because of some
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344 some code generation inefficiency, we never get smaller code for
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345 turning that into a memcpy, so pick a value that guarantees this
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346 doesn't happen. */
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347 #define TILEGX_CALL_RATIO 11
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348 #define MOVE_RATIO(speed) ((speed) ? 15 : TILEGX_CALL_RATIO)
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349 #define CLEAR_RATIO(speed) ((speed) ? 15 : TILEGX_CALL_RATIO)
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350 #define SET_RATIO(speed) ((speed) ? 15 : TILEGX_CALL_RATIO)
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351
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352 #define WORD_REGISTER_OPERATIONS 1
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353
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354 #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
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355
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356 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
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357 if (GET_MODE_CLASS (MODE) == MODE_INT \
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358 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
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359 { \
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360 if ((MODE) == SImode) \
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361 (UNSIGNEDP) = 0; \
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362 (MODE) = DImode; \
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363 }
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364
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365 /* Define SLOW_BYTE_ACCESS to avoid making a QI or HI mode
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366 register. */
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367 #define SLOW_BYTE_ACCESS 1
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368
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369 #define SHIFT_COUNT_TRUNCATED 0
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370
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371 #define SHORT_IMMEDIATES_SIGN_EXTEND 1
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372
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373 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
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374 #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
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375
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376 #define Pmode (TARGET_32BIT ? SImode : DImode)
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377
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378 #define STACK_SIZE_MODE Pmode
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379
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380 #define STORE_FLAG_VALUE 1
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381
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382 #define FUNCTION_MODE DImode
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383
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384 #define NO_FUNCTION_CSE 1
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385
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386 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
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387 ((LENGTH) = tilegx_adjust_insn_length ((INSN), (LENGTH)))
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388
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389 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
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390
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391 #define BRANCH_COST(speed_p, predictable_p) ((predictable_p) ? 2 : 6)
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392
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393
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394 /* Control the assembler format that we output. */
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395
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396 #undef NO_DOLLAR_IN_LABEL
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397
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398 #define ASM_COMMENT_START "##"
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399
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400 #define TEXT_SECTION_ASM_OP "\t.text"
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401
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402 #define DATA_SECTION_ASM_OP "\t.data"
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403
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404 #undef READONLY_DATA_SECTION_ASM_OP
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405 #define READONLY_DATA_SECTION_ASM_OP "\t.section\t.rodata, \"a\""
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406
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407 #undef BSS_SECTION_ASM_OP
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408 #define BSS_SECTION_ASM_OP "\t.section\t.bss, \"wa\""
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409
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410 #undef INIT_SECTION_ASM_OP
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411 #define INIT_SECTION_ASM_OP "\t.section\t.init, \"ax\""
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412
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413 #undef FINI_SECTION_ASM_OP
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414 #define FINI_SECTION_ASM_OP "\t.section\t.fini, \"ax\""
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415
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416 #define GLOBAL_ASM_OP ".global "
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417
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418 #define SUPPORTS_WEAK 1
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419
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420 #define USER_LABEL_PREFIX ""
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421
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422 #define REGISTER_PREFIX ""
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423 #define REGISTER_NAMES \
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424 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
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425 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
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426 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
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427 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
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428 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", \
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429 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", \
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430 "r48", "r49", "r50", "r51", "r52", "tp", "sp", "lr", \
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431 "?r56?","idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero", \
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432 "?FRAME?", "?ARG?", "?CMPEXCH?", "?NET?" }
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433
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434 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
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435 tilegx_final_prescan_insn (insn)
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436
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437 #define ASM_OUTPUT_OPCODE(STREAM, PTR) \
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438 (PTR = tilegx_asm_output_opcode (STREAM, PTR))
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439
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440 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
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441 do \
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442 { \
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443 char label[256]; \
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444 ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE)); \
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445 fprintf (FILE, "%s ", \
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446 integer_asm_op (GET_MODE_SIZE (Pmode), TRUE)); \
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447 assemble_name (FILE, label); \
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448 fprintf (FILE, "\n"); \
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449 } \
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450 while (0)
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451
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452 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
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453 do \
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454 { \
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455 char label[256]; \
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456 ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE)); \
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457 fprintf (FILE, "%s ", \
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458 integer_asm_op (GET_MODE_SIZE (Pmode), TRUE)); \
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459 assemble_name (FILE, label); \
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460 ASM_GENERATE_INTERNAL_LABEL (label, "L", (REL)); \
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461 fprintf (FILE, "-"); \
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462 assemble_name (FILE, label); \
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463 fprintf (FILE, "\n"); \
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464 } \
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465 while (0)
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466
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467 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
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468 do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", 1 << (LOG)); } while (0)
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469
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470 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
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471 ( fputs (".comm ", (FILE)), \
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472 assemble_name ((FILE), (NAME)), \
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473 fprintf ((FILE), ",%u\n", (unsigned int)(ROUNDED)))
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474
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475 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
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476 ( fputs (".lcomm ", (FILE)), \
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477 assemble_name ((FILE), (NAME)), \
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478 fprintf ((FILE), ",%u\n", (unsigned int)(ROUNDED)))
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479
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480 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
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481 static void __attribute__((__used__)) \
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482 call_ ## FUNC (void) \
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483 { \
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484 asm (SECTION_OP); \
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485 asm ("{ moveli r0, hw2_last(" #FUNC " - . - 8); lnk r1 }\n"); \
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486 asm ("shl16insli r0, r0, hw1(" #FUNC " - .)\n"); \
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487 asm ("shl16insli r0, r0, hw0(" #FUNC " - . + 8)\n"); \
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488 asm ("add r0, r1, r0\n"); \
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489 asm ("jalr r0\n"); \
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490 asm (TEXT_SECTION_ASM_OP); \
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491 }
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492
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493
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494
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495 #define INIT_EXPANDERS tilegx_init_expanders ()
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496
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497 /* A C structure for machine-specific, per-function data. This is
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498 added to the cfun structure. */
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499 typedef struct GTY(()) machine_function
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500 {
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501 /* Symbol for the text label used for pic. */
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502 rtx text_label_symbol;
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503
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504 /* Register for the text label. */
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505 rtx text_label_rtx;
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506
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507 /* Register for the pic offset table. */
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508 rtx got_rtx;
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509
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510 /* The function calls tls_get_addr. */
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511 int calls_tls_get_addr;
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512 } machine_function;
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513
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514 #ifndef HAVE_AS_TLS
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515 #define HAVE_AS_TLS 0
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516 #endif
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517
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518 #ifndef ENDIAN_SPEC
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519 #if TARGET_BIG_ENDIAN_DEFAULT
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520 #define ENDIAN_SPEC \
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521 "%{!mlittle-endian:-EB} \
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522 %{mlittle-endian:%{mbig-endian: \
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523 %e-mbig-endian and -mlittle-endian may not be used together}-EL}"
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524 #else
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525 #define ENDIAN_SPEC \
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526 "%{!mbig-endian:-EL} \
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527 %{mbig-endian:%{mlittle-endian: \
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528 %e-mbig-endian and -mlittle-endian may not be used together}-EB}"
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529 #endif
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530 #endif
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531
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532 #define EXTRA_SPECS \
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533 { "endian_spec", ENDIAN_SPEC }
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