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111
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1 /* Code for RTL register eliminations.
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2 Copyright (C) 2010-2017 Free Software Foundation, Inc.
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3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
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4
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5 This file is part of GCC.
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6
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7 GCC is free software; you can redistribute it and/or modify it under
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8 the terms of the GNU General Public License as published by the Free
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9 Software Foundation; either version 3, or (at your option) any later
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10 version.
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11
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12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
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14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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15 for more details.
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16
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17 You should have received a copy of the GNU General Public License
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18 along with GCC; see the file COPYING3. If not see
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19 <http://www.gnu.org/licenses/>. */
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20
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21 /* Eliminable registers (like a soft argument or frame pointer) are
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22 widely used in RTL. These eliminable registers should be replaced
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23 by real hard registers (like the stack pointer or hard frame
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24 pointer) plus some offset. The offsets usually change whenever the
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25 stack is expanded. We know the final offsets only at the very end
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26 of LRA.
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27
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28 Within LRA, we usually keep the RTL in such a state that the
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29 eliminable registers can be replaced by just the corresponding hard
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30 register (without any offset). To achieve this we should add the
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31 initial elimination offset at the beginning of LRA and update the
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32 offsets whenever the stack is expanded. We need to do this before
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33 every constraint pass because the choice of offset often affects
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34 whether a particular address or memory constraint is satisfied.
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35
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36 We keep RTL code at most time in such state that the virtual
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37 registers can be changed by just the corresponding hard registers
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38 (with zero offsets) and we have the right RTL code. To achieve this
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39 we should add initial offset at the beginning of LRA work and update
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40 offsets after each stack expanding. But actually we update virtual
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41 registers to the same virtual registers + corresponding offsets
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42 before every constraint pass because it affects constraint
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43 satisfaction (e.g. an address displacement became too big for some
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44 target).
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45
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46 The final change of eliminable registers to the corresponding hard
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47 registers are done at the very end of LRA when there were no change
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48 in offsets anymore:
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49
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50 fp + 42 => sp + 42
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51
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52 */
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53
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54 #include "config.h"
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55 #include "system.h"
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56 #include "coretypes.h"
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57 #include "backend.h"
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58 #include "target.h"
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59 #include "rtl.h"
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60 #include "tree.h"
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61 #include "df.h"
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62 #include "memmodel.h"
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63 #include "tm_p.h"
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64 #include "optabs.h"
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65 #include "regs.h"
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66 #include "ira.h"
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67 #include "recog.h"
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68 #include "output.h"
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69 #include "rtl-error.h"
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70 #include "lra-int.h"
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71
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72 /* This structure is used to record information about hard register
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73 eliminations. */
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74 struct lra_elim_table
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75 {
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76 /* Hard register number to be eliminated. */
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77 int from;
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78 /* Hard register number used as replacement. */
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79 int to;
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80 /* Difference between values of the two hard registers above on
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81 previous iteration. */
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82 HOST_WIDE_INT previous_offset;
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83 /* Difference between the values on the current iteration. */
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84 HOST_WIDE_INT offset;
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85 /* Nonzero if this elimination can be done. */
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86 bool can_eliminate;
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87 /* CAN_ELIMINATE since the last check. */
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88 bool prev_can_eliminate;
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89 /* REG rtx for the register to be eliminated. We cannot simply
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90 compare the number since we might then spuriously replace a hard
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91 register corresponding to a pseudo assigned to the reg to be
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92 eliminated. */
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93 rtx from_rtx;
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94 /* REG rtx for the replacement. */
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95 rtx to_rtx;
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96 };
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97
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98 /* The elimination table. Each array entry describes one possible way
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99 of eliminating a register in favor of another. If there is more
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100 than one way of eliminating a particular register, the most
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101 preferred should be specified first. */
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102 static struct lra_elim_table *reg_eliminate = 0;
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103
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104 /* This is an intermediate structure to initialize the table. It has
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105 exactly the members provided by ELIMINABLE_REGS. */
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106 static const struct elim_table_1
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107 {
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108 const int from;
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109 const int to;
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110 } reg_eliminate_1[] =
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111
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112 ELIMINABLE_REGS;
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113
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114 #define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
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115
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116 /* Print info about elimination table to file F. */
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117 static void
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118 print_elim_table (FILE *f)
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119 {
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120 struct lra_elim_table *ep;
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121
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122 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
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123 fprintf (f, "%s eliminate %d to %d (offset=" HOST_WIDE_INT_PRINT_DEC
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124 ", prev_offset=" HOST_WIDE_INT_PRINT_DEC ")\n",
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125 ep->can_eliminate ? "Can" : "Can't",
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126 ep->from, ep->to, ep->offset, ep->previous_offset);
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127 }
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128
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129 /* Print info about elimination table to stderr. */
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130 void
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131 lra_debug_elim_table (void)
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132 {
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133 print_elim_table (stderr);
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134 }
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135
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136 /* Setup possibility of elimination in elimination table element EP to
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137 VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame
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138 pointer to stack pointer is not possible anymore. */
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139 static void
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140 setup_can_eliminate (struct lra_elim_table *ep, bool value)
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141 {
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142 ep->can_eliminate = ep->prev_can_eliminate = value;
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143 if (! value
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144 && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM)
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145 frame_pointer_needed = 1;
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146 if (!frame_pointer_needed)
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147 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = 0;
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148 }
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149
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150 /* Map: eliminable "from" register -> its current elimination,
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151 or NULL if none. The elimination table may contain more than
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152 one elimination for the same hard register, but this map specifies
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153 the one that we are currently using. */
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154 static struct lra_elim_table *elimination_map[FIRST_PSEUDO_REGISTER];
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155
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156 /* When an eliminable hard register becomes not eliminable, we use the
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157 following special structure to restore original offsets for the
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158 register. */
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159 static struct lra_elim_table self_elim_table;
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160
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161 /* Offsets should be used to restore original offsets for eliminable
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162 hard register which just became not eliminable. Zero,
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163 otherwise. */
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164 static HOST_WIDE_INT self_elim_offsets[FIRST_PSEUDO_REGISTER];
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165
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166 /* Map: hard regno -> RTL presentation. RTL presentations of all
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167 potentially eliminable hard registers are stored in the map. */
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168 static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER];
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169
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170 /* Set up ELIMINATION_MAP of the currently used eliminations. */
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171 static void
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172 setup_elimination_map (void)
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173 {
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174 int i;
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175 struct lra_elim_table *ep;
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176
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177 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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178 elimination_map[i] = NULL;
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179 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
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180 if (ep->can_eliminate && elimination_map[ep->from] == NULL)
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181 elimination_map[ep->from] = ep;
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182 }
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183
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184
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185
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186 /* Compute the sum of X and Y, making canonicalizations assumed in an
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187 address, namely: sum constant integers, surround the sum of two
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188 constants with a CONST, put the constant as the second operand, and
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189 group the constant on the outermost sum.
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190
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191 This routine assumes both inputs are already in canonical form. */
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192 static rtx
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193 form_sum (rtx x, rtx y)
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194 {
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195 machine_mode mode = GET_MODE (x);
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196
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197 if (mode == VOIDmode)
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198 mode = GET_MODE (y);
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199
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200 if (mode == VOIDmode)
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201 mode = Pmode;
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202
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203 if (CONST_INT_P (x))
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204 return plus_constant (mode, y, INTVAL (x));
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205 else if (CONST_INT_P (y))
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206 return plus_constant (mode, x, INTVAL (y));
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207 else if (CONSTANT_P (x))
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208 std::swap (x, y);
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209
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210 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
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211 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
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212
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213 /* Note that if the operands of Y are specified in the opposite
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214 order in the recursive calls below, infinite recursion will
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215 occur. */
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216 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
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217 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
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218
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219 /* If both constant, encapsulate sum. Otherwise, just form sum. A
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220 constant will have been placed second. */
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221 if (CONSTANT_P (x) && CONSTANT_P (y))
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222 {
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223 if (GET_CODE (x) == CONST)
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224 x = XEXP (x, 0);
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225 if (GET_CODE (y) == CONST)
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226 y = XEXP (y, 0);
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227
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228 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
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229 }
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230
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231 return gen_rtx_PLUS (mode, x, y);
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232 }
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233
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234 /* Return the current substitution hard register of the elimination of
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235 HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */
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236 int
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237 lra_get_elimination_hard_regno (int hard_regno)
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238 {
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239 struct lra_elim_table *ep;
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240
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241 if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
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242 return hard_regno;
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243 if ((ep = elimination_map[hard_regno]) == NULL)
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244 return hard_regno;
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245 return ep->to;
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246 }
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247
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248 /* Return elimination which will be used for hard reg REG, NULL
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249 otherwise. */
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250 static struct lra_elim_table *
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251 get_elimination (rtx reg)
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252 {
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253 int hard_regno;
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254 struct lra_elim_table *ep;
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255 HOST_WIDE_INT offset;
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256
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257 lra_assert (REG_P (reg));
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258 if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
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259 return NULL;
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260 if ((ep = elimination_map[hard_regno]) != NULL)
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261 return ep->from_rtx != reg ? NULL : ep;
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262 if ((offset = self_elim_offsets[hard_regno]) == 0)
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263 return NULL;
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264 /* This is an iteration to restore offsets just after HARD_REGNO
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265 stopped to be eliminable. */
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266 self_elim_table.from = self_elim_table.to = hard_regno;
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267 self_elim_table.from_rtx
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268 = self_elim_table.to_rtx
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269 = eliminable_reg_rtx[hard_regno];
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270 lra_assert (self_elim_table.from_rtx != NULL);
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271 self_elim_table.offset = offset;
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272 return &self_elim_table;
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273 }
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274
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275 /* Transform (subreg (plus reg const)) to (plus (subreg reg) const)
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276 when it is possible. Return X or the transformation result if the
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277 transformation is done. */
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278 static rtx
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279 move_plus_up (rtx x)
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280 {
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281 rtx subreg_reg;
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282 machine_mode x_mode, subreg_reg_mode;
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283
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284 if (GET_CODE (x) != SUBREG || !subreg_lowpart_p (x))
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285 return x;
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286 subreg_reg = SUBREG_REG (x);
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287 x_mode = GET_MODE (x);
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288 subreg_reg_mode = GET_MODE (subreg_reg);
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289 if (!paradoxical_subreg_p (x)
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290 && GET_CODE (subreg_reg) == PLUS
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291 && CONSTANT_P (XEXP (subreg_reg, 1))
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292 && GET_MODE_CLASS (x_mode) == MODE_INT
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293 && GET_MODE_CLASS (subreg_reg_mode) == MODE_INT)
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294 {
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295 rtx cst = simplify_subreg (x_mode, XEXP (subreg_reg, 1), subreg_reg_mode,
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296 subreg_lowpart_offset (x_mode,
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297 subreg_reg_mode));
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298 if (cst && CONSTANT_P (cst))
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299 return gen_rtx_PLUS (x_mode, lowpart_subreg (x_mode,
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300 XEXP (subreg_reg, 0),
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301 subreg_reg_mode), cst);
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302 }
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303 return x;
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304 }
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305
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306 /* Scan X and replace any eliminable registers (such as fp) with a
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307 replacement (such as sp) if SUBST_P, plus an offset. The offset is
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308 a change in the offset between the eliminable register and its
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309 substitution if UPDATE_P, or the full offset if FULL_P, or
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310 otherwise zero. If FULL_P, we also use the SP offsets for
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311 elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating
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312 offsets of register elimnable to SP. If UPDATE_SP_OFFSET is
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313 non-zero, don't use difference of the offset and the previous
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314 offset.
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315
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316 MEM_MODE is the mode of an enclosing MEM. We need this to know how
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317 much to adjust a register for, e.g., PRE_DEC. Also, if we are
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318 inside a MEM, we are allowed to replace a sum of a hard register
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319 and the constant zero with the hard register, which we cannot do
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320 outside a MEM. In addition, we need to record the fact that a
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321 hard register is referenced outside a MEM.
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322
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323 If we make full substitution to SP for non-null INSN, add the insn
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324 sp offset. */
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325 rtx
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326 lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
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327 bool subst_p, bool update_p,
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328 HOST_WIDE_INT update_sp_offset, bool full_p)
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329 {
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330 enum rtx_code code = GET_CODE (x);
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331 struct lra_elim_table *ep;
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332 rtx new_rtx;
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333 int i, j;
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334 const char *fmt;
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335 int copied = 0;
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336
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337 lra_assert (!update_p || !full_p);
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338 lra_assert (update_sp_offset == 0 || (!subst_p && update_p && !full_p));
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339 if (! current_function_decl)
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340 return x;
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341
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342 switch (code)
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343 {
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344 CASE_CONST_ANY:
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345 case CONST:
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346 case SYMBOL_REF:
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347 case CODE_LABEL:
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348 case PC:
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349 case CC0:
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350 case ASM_INPUT:
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351 case ADDR_VEC:
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352 case ADDR_DIFF_VEC:
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353 case RETURN:
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354 return x;
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355
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356 case REG:
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357 /* First handle the case where we encounter a bare hard register
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358 that is eliminable. Replace it with a PLUS. */
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359 if ((ep = get_elimination (x)) != NULL)
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360 {
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361 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
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362
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363 if (update_sp_offset != 0)
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364 {
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365 if (ep->to_rtx == stack_pointer_rtx)
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366 return plus_constant (Pmode, to, update_sp_offset);
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367 return to;
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368 }
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369 else if (update_p)
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370 return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
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371 else if (full_p)
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372 return plus_constant (Pmode, to,
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373 ep->offset
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374 - (insn != NULL_RTX
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375 && ep->to_rtx == stack_pointer_rtx
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376 ? lra_get_insn_recog_data (insn)->sp_offset
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377 : 0));
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378 else
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379 return to;
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380 }
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381 return x;
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382
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383 case PLUS:
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384 /* If this is the sum of an eliminable register and a constant, rework
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385 the sum. */
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386 if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1)))
|
|
|
387 {
|
|
|
388 if ((ep = get_elimination (XEXP (x, 0))) != NULL)
|
|
|
389 {
|
|
|
390 HOST_WIDE_INT offset;
|
|
|
391 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
|
|
|
392
|
|
|
393 if (! update_p && ! full_p)
|
|
|
394 return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
|
|
|
395
|
|
|
396 if (update_sp_offset != 0)
|
|
|
397 offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
|
|
|
398 else
|
|
|
399 offset = (update_p
|
|
|
400 ? ep->offset - ep->previous_offset : ep->offset);
|
|
|
401 if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
|
|
|
402 offset -= lra_get_insn_recog_data (insn)->sp_offset;
|
|
|
403 if (CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) == -offset)
|
|
|
404 return to;
|
|
|
405 else
|
|
|
406 return gen_rtx_PLUS (Pmode, to,
|
|
|
407 plus_constant (Pmode,
|
|
|
408 XEXP (x, 1), offset));
|
|
|
409 }
|
|
|
410
|
|
|
411 /* If the hard register is not eliminable, we are done since
|
|
|
412 the other operand is a constant. */
|
|
|
413 return x;
|
|
|
414 }
|
|
|
415
|
|
|
416 /* If this is part of an address, we want to bring any constant
|
|
|
417 to the outermost PLUS. We will do this by doing hard
|
|
|
418 register replacement in our operands and seeing if a constant
|
|
|
419 shows up in one of them.
|
|
|
420
|
|
|
421 Note that there is no risk of modifying the structure of the
|
|
|
422 insn, since we only get called for its operands, thus we are
|
|
|
423 either modifying the address inside a MEM, or something like
|
|
|
424 an address operand of a load-address insn. */
|
|
|
425
|
|
|
426 {
|
|
|
427 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
|
|
|
428 subst_p, update_p,
|
|
|
429 update_sp_offset, full_p);
|
|
|
430 rtx new1 = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
|
|
|
431 subst_p, update_p,
|
|
|
432 update_sp_offset, full_p);
|
|
|
433
|
|
|
434 new0 = move_plus_up (new0);
|
|
|
435 new1 = move_plus_up (new1);
|
|
|
436 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
|
|
|
437 return form_sum (new0, new1);
|
|
|
438 }
|
|
|
439 return x;
|
|
|
440
|
|
|
441 case MULT:
|
|
|
442 /* If this is the product of an eliminable hard register and a
|
|
|
443 constant, apply the distribute law and move the constant out
|
|
|
444 so that we have (plus (mult ..) ..). This is needed in order
|
|
|
445 to keep load-address insns valid. This case is pathological.
|
|
|
446 We ignore the possibility of overflow here. */
|
|
|
447 if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))
|
|
|
448 && (ep = get_elimination (XEXP (x, 0))) != NULL)
|
|
|
449 {
|
|
|
450 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
|
|
|
451
|
|
|
452 if (update_sp_offset != 0)
|
|
|
453 {
|
|
|
454 if (ep->to_rtx == stack_pointer_rtx)
|
|
|
455 return plus_constant (Pmode,
|
|
|
456 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
|
|
|
457 update_sp_offset * INTVAL (XEXP (x, 1)));
|
|
|
458 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
|
|
|
459 }
|
|
|
460 else if (update_p)
|
|
|
461 return plus_constant (Pmode,
|
|
|
462 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
|
|
|
463 (ep->offset - ep->previous_offset)
|
|
|
464 * INTVAL (XEXP (x, 1)));
|
|
|
465 else if (full_p)
|
|
|
466 {
|
|
|
467 HOST_WIDE_INT offset = ep->offset;
|
|
|
468
|
|
|
469 if (insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
|
|
|
470 offset -= lra_get_insn_recog_data (insn)->sp_offset;
|
|
|
471 return
|
|
|
472 plus_constant (Pmode,
|
|
|
473 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
|
|
|
474 offset * INTVAL (XEXP (x, 1)));
|
|
|
475 }
|
|
|
476 else
|
|
|
477 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
|
|
|
478 }
|
|
|
479
|
|
|
480 /* fall through */
|
|
|
481
|
|
|
482 case CALL:
|
|
|
483 case COMPARE:
|
|
|
484 /* See comments before PLUS about handling MINUS. */
|
|
|
485 case MINUS:
|
|
|
486 case DIV: case UDIV:
|
|
|
487 case MOD: case UMOD:
|
|
|
488 case AND: case IOR: case XOR:
|
|
|
489 case ROTATERT: case ROTATE:
|
|
|
490 case ASHIFTRT: case LSHIFTRT: case ASHIFT:
|
|
|
491 case NE: case EQ:
|
|
|
492 case GE: case GT: case GEU: case GTU:
|
|
|
493 case LE: case LT: case LEU: case LTU:
|
|
|
494 {
|
|
|
495 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
|
|
|
496 subst_p, update_p,
|
|
|
497 update_sp_offset, full_p);
|
|
|
498 rtx new1 = XEXP (x, 1)
|
|
|
499 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
|
|
|
500 subst_p, update_p,
|
|
|
501 update_sp_offset, full_p) : 0;
|
|
|
502
|
|
|
503 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
|
|
|
504 return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
|
|
|
505 }
|
|
|
506 return x;
|
|
|
507
|
|
|
508 case EXPR_LIST:
|
|
|
509 /* If we have something in XEXP (x, 0), the usual case,
|
|
|
510 eliminate it. */
|
|
|
511 if (XEXP (x, 0))
|
|
|
512 {
|
|
|
513 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
|
|
|
514 subst_p, update_p,
|
|
|
515 update_sp_offset, full_p);
|
|
|
516 if (new_rtx != XEXP (x, 0))
|
|
|
517 {
|
|
|
518 /* If this is a REG_DEAD note, it is not valid anymore.
|
|
|
519 Using the eliminated version could result in creating a
|
|
|
520 REG_DEAD note for the stack or frame pointer. */
|
|
|
521 if (REG_NOTE_KIND (x) == REG_DEAD)
|
|
|
522 return (XEXP (x, 1)
|
|
|
523 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
|
|
|
524 subst_p, update_p,
|
|
|
525 update_sp_offset, full_p)
|
|
|
526 : NULL_RTX);
|
|
|
527
|
|
|
528 x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
|
|
|
529 }
|
|
|
530 }
|
|
|
531
|
|
|
532 /* fall through */
|
|
|
533
|
|
|
534 case INSN_LIST:
|
|
|
535 case INT_LIST:
|
|
|
536 /* Now do eliminations in the rest of the chain. If this was
|
|
|
537 an EXPR_LIST, this might result in allocating more memory than is
|
|
|
538 strictly needed, but it simplifies the code. */
|
|
|
539 if (XEXP (x, 1))
|
|
|
540 {
|
|
|
541 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
|
|
|
542 subst_p, update_p,
|
|
|
543 update_sp_offset, full_p);
|
|
|
544 if (new_rtx != XEXP (x, 1))
|
|
|
545 return
|
|
|
546 gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x),
|
|
|
547 XEXP (x, 0), new_rtx);
|
|
|
548 }
|
|
|
549 return x;
|
|
|
550
|
|
|
551 case PRE_INC:
|
|
|
552 case POST_INC:
|
|
|
553 case PRE_DEC:
|
|
|
554 case POST_DEC:
|
|
|
555 /* We do not support elimination of a register that is modified.
|
|
|
556 elimination_effects has already make sure that this does not
|
|
|
557 happen. */
|
|
|
558 return x;
|
|
|
559
|
|
|
560 case PRE_MODIFY:
|
|
|
561 case POST_MODIFY:
|
|
|
562 /* We do not support elimination of a hard register that is
|
|
|
563 modified. LRA has already make sure that this does not
|
|
|
564 happen. The only remaining case we need to consider here is
|
|
|
565 that the increment value may be an eliminable register. */
|
|
|
566 if (GET_CODE (XEXP (x, 1)) == PLUS
|
|
|
567 && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
|
|
|
568 {
|
|
|
569 rtx new_rtx = lra_eliminate_regs_1 (insn, XEXP (XEXP (x, 1), 1),
|
|
|
570 mem_mode, subst_p, update_p,
|
|
|
571 update_sp_offset, full_p);
|
|
|
572
|
|
|
573 if (new_rtx != XEXP (XEXP (x, 1), 1))
|
|
|
574 return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
|
|
|
575 gen_rtx_PLUS (GET_MODE (x),
|
|
|
576 XEXP (x, 0), new_rtx));
|
|
|
577 }
|
|
|
578 return x;
|
|
|
579
|
|
|
580 case STRICT_LOW_PART:
|
|
|
581 case NEG: case NOT:
|
|
|
582 case SIGN_EXTEND: case ZERO_EXTEND:
|
|
|
583 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
|
|
|
584 case FLOAT: case FIX:
|
|
|
585 case UNSIGNED_FIX: case UNSIGNED_FLOAT:
|
|
|
586 case ABS:
|
|
|
587 case SQRT:
|
|
|
588 case FFS:
|
|
|
589 case CLZ:
|
|
|
590 case CTZ:
|
|
|
591 case POPCOUNT:
|
|
|
592 case PARITY:
|
|
|
593 case BSWAP:
|
|
|
594 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
|
|
|
595 subst_p, update_p,
|
|
|
596 update_sp_offset, full_p);
|
|
|
597 if (new_rtx != XEXP (x, 0))
|
|
|
598 return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
|
|
|
599 return x;
|
|
|
600
|
|
|
601 case SUBREG:
|
|
|
602 new_rtx = lra_eliminate_regs_1 (insn, SUBREG_REG (x), mem_mode,
|
|
|
603 subst_p, update_p,
|
|
|
604 update_sp_offset, full_p);
|
|
|
605
|
|
|
606 if (new_rtx != SUBREG_REG (x))
|
|
|
607 {
|
|
|
608 if (MEM_P (new_rtx) && !paradoxical_subreg_p (x))
|
|
|
609 {
|
|
|
610 SUBREG_REG (x) = new_rtx;
|
|
|
611 alter_subreg (&x, false);
|
|
|
612 return x;
|
|
|
613 }
|
|
|
614 else if (! subst_p)
|
|
|
615 {
|
|
|
616 /* LRA can transform subregs itself. So don't call
|
|
|
617 simplify_gen_subreg until LRA transformations are
|
|
|
618 finished. Function simplify_gen_subreg can do
|
|
|
619 non-trivial transformations (like truncation) which
|
|
|
620 might make LRA work to fail. */
|
|
|
621 SUBREG_REG (x) = new_rtx;
|
|
|
622 return x;
|
|
|
623 }
|
|
|
624 else
|
|
|
625 return simplify_gen_subreg (GET_MODE (x), new_rtx,
|
|
|
626 GET_MODE (new_rtx), SUBREG_BYTE (x));
|
|
|
627 }
|
|
|
628
|
|
|
629 return x;
|
|
|
630
|
|
|
631 case MEM:
|
|
|
632 /* Our only special processing is to pass the mode of the MEM to our
|
|
|
633 recursive call and copy the flags. While we are here, handle this
|
|
|
634 case more efficiently. */
|
|
|
635 return
|
|
|
636 replace_equiv_address_nv
|
|
|
637 (x,
|
|
|
638 lra_eliminate_regs_1 (insn, XEXP (x, 0), GET_MODE (x),
|
|
|
639 subst_p, update_p, update_sp_offset, full_p));
|
|
|
640
|
|
|
641 case USE:
|
|
|
642 /* Handle insn_list USE that a call to a pure function may generate. */
|
|
|
643 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), VOIDmode,
|
|
|
644 subst_p, update_p, update_sp_offset, full_p);
|
|
|
645 if (new_rtx != XEXP (x, 0))
|
|
|
646 return gen_rtx_USE (GET_MODE (x), new_rtx);
|
|
|
647 return x;
|
|
|
648
|
|
|
649 case CLOBBER:
|
|
|
650 case SET:
|
|
|
651 gcc_unreachable ();
|
|
|
652
|
|
|
653 default:
|
|
|
654 break;
|
|
|
655 }
|
|
|
656
|
|
|
657 /* Process each of our operands recursively. If any have changed, make a
|
|
|
658 copy of the rtx. */
|
|
|
659 fmt = GET_RTX_FORMAT (code);
|
|
|
660 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
|
|
|
661 {
|
|
|
662 if (*fmt == 'e')
|
|
|
663 {
|
|
|
664 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, i), mem_mode,
|
|
|
665 subst_p, update_p,
|
|
|
666 update_sp_offset, full_p);
|
|
|
667 if (new_rtx != XEXP (x, i) && ! copied)
|
|
|
668 {
|
|
|
669 x = shallow_copy_rtx (x);
|
|
|
670 copied = 1;
|
|
|
671 }
|
|
|
672 XEXP (x, i) = new_rtx;
|
|
|
673 }
|
|
|
674 else if (*fmt == 'E')
|
|
|
675 {
|
|
|
676 int copied_vec = 0;
|
|
|
677 for (j = 0; j < XVECLEN (x, i); j++)
|
|
|
678 {
|
|
|
679 new_rtx = lra_eliminate_regs_1 (insn, XVECEXP (x, i, j), mem_mode,
|
|
|
680 subst_p, update_p,
|
|
|
681 update_sp_offset, full_p);
|
|
|
682 if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
|
|
|
683 {
|
|
|
684 rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
|
|
|
685 XVEC (x, i)->elem);
|
|
|
686 if (! copied)
|
|
|
687 {
|
|
|
688 x = shallow_copy_rtx (x);
|
|
|
689 copied = 1;
|
|
|
690 }
|
|
|
691 XVEC (x, i) = new_v;
|
|
|
692 copied_vec = 1;
|
|
|
693 }
|
|
|
694 XVECEXP (x, i, j) = new_rtx;
|
|
|
695 }
|
|
|
696 }
|
|
|
697 }
|
|
|
698
|
|
|
699 return x;
|
|
|
700 }
|
|
|
701
|
|
|
702 /* This function is used externally in subsequent passes of GCC. It
|
|
|
703 always does a full elimination of X. */
|
|
|
704 rtx
|
|
|
705 lra_eliminate_regs (rtx x, machine_mode mem_mode,
|
|
|
706 rtx insn ATTRIBUTE_UNUSED)
|
|
|
707 {
|
|
|
708 return lra_eliminate_regs_1 (NULL, x, mem_mode, true, false, 0, true);
|
|
|
709 }
|
|
|
710
|
|
|
711 /* Stack pointer offset before the current insn relative to one at the
|
|
|
712 func start. RTL insns can change SP explicitly. We keep the
|
|
|
713 changes from one insn to another through this variable. */
|
|
|
714 static HOST_WIDE_INT curr_sp_change;
|
|
|
715
|
|
|
716 /* Scan rtx X for references to elimination source or target registers
|
|
|
717 in contexts that would prevent the elimination from happening.
|
|
|
718 Update the table of eliminables to reflect the changed state.
|
|
|
719 MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not
|
|
|
720 within a MEM. */
|
|
|
721 static void
|
|
|
722 mark_not_eliminable (rtx x, machine_mode mem_mode)
|
|
|
723 {
|
|
|
724 enum rtx_code code = GET_CODE (x);
|
|
|
725 struct lra_elim_table *ep;
|
|
|
726 int i, j;
|
|
|
727 const char *fmt;
|
|
|
728
|
|
|
729 switch (code)
|
|
|
730 {
|
|
|
731 case PRE_INC:
|
|
|
732 case POST_INC:
|
|
|
733 case PRE_DEC:
|
|
|
734 case POST_DEC:
|
|
|
735 case POST_MODIFY:
|
|
|
736 case PRE_MODIFY:
|
|
|
737 if (XEXP (x, 0) == stack_pointer_rtx
|
|
|
738 && ((code != PRE_MODIFY && code != POST_MODIFY)
|
|
|
739 || (GET_CODE (XEXP (x, 1)) == PLUS
|
|
|
740 && XEXP (x, 0) == XEXP (XEXP (x, 1), 0)
|
|
|
741 && CONST_INT_P (XEXP (XEXP (x, 1), 1)))))
|
|
|
742 {
|
|
|
743 int size = GET_MODE_SIZE (mem_mode);
|
|
|
744
|
|
|
745 #ifdef PUSH_ROUNDING
|
|
|
746 /* If more bytes than MEM_MODE are pushed, account for
|
|
|
747 them. */
|
|
|
748 size = PUSH_ROUNDING (size);
|
|
|
749 #endif
|
|
|
750 if (code == PRE_DEC || code == POST_DEC)
|
|
|
751 curr_sp_change -= size;
|
|
|
752 else if (code == PRE_INC || code == POST_INC)
|
|
|
753 curr_sp_change += size;
|
|
|
754 else if (code == PRE_MODIFY || code == POST_MODIFY)
|
|
|
755 curr_sp_change += INTVAL (XEXP (XEXP (x, 1), 1));
|
|
|
756 }
|
|
|
757 else if (REG_P (XEXP (x, 0))
|
|
|
758 && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER)
|
|
|
759 {
|
|
|
760 /* If we modify the source of an elimination rule, disable
|
|
|
761 it. Do the same if it is the destination and not the
|
|
|
762 hard frame register. */
|
|
|
763 for (ep = reg_eliminate;
|
|
|
764 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
|
|
|
765 ep++)
|
|
|
766 if (ep->from_rtx == XEXP (x, 0)
|
|
|
767 || (ep->to_rtx == XEXP (x, 0)
|
|
|
768 && ep->to_rtx != hard_frame_pointer_rtx))
|
|
|
769 setup_can_eliminate (ep, false);
|
|
|
770 }
|
|
|
771 return;
|
|
|
772
|
|
|
773 case USE:
|
|
|
774 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
|
|
|
775 /* If using a hard register that is the source of an eliminate
|
|
|
776 we still think can be performed, note it cannot be
|
|
|
777 performed since we don't know how this hard register is
|
|
|
778 used. */
|
|
|
779 for (ep = reg_eliminate;
|
|
|
780 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
|
|
|
781 ep++)
|
|
|
782 if (ep->from_rtx == XEXP (x, 0)
|
|
|
783 && ep->to_rtx != hard_frame_pointer_rtx)
|
|
|
784 setup_can_eliminate (ep, false);
|
|
|
785 return;
|
|
|
786
|
|
|
787 case CLOBBER:
|
|
|
788 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
|
|
|
789 /* If clobbering a hard register that is the replacement
|
|
|
790 register for an elimination we still think can be
|
|
|
791 performed, note that it cannot be performed. Otherwise, we
|
|
|
792 need not be concerned about it. */
|
|
|
793 for (ep = reg_eliminate;
|
|
|
794 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
|
|
|
795 ep++)
|
|
|
796 if (ep->to_rtx == XEXP (x, 0)
|
|
|
797 && ep->to_rtx != hard_frame_pointer_rtx)
|
|
|
798 setup_can_eliminate (ep, false);
|
|
|
799 return;
|
|
|
800
|
|
|
801 case SET:
|
|
|
802 if (SET_DEST (x) == stack_pointer_rtx
|
|
|
803 && GET_CODE (SET_SRC (x)) == PLUS
|
|
|
804 && XEXP (SET_SRC (x), 0) == SET_DEST (x)
|
|
|
805 && CONST_INT_P (XEXP (SET_SRC (x), 1)))
|
|
|
806 {
|
|
|
807 curr_sp_change += INTVAL (XEXP (SET_SRC (x), 1));
|
|
|
808 return;
|
|
|
809 }
|
|
|
810 if (! REG_P (SET_DEST (x))
|
|
|
811 || REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER)
|
|
|
812 mark_not_eliminable (SET_DEST (x), mem_mode);
|
|
|
813 else
|
|
|
814 {
|
|
|
815 /* See if this is setting the replacement hard register for
|
|
|
816 an elimination.
|
|
|
817
|
|
|
818 If DEST is the hard frame pointer, we do nothing because
|
|
|
819 we assume that all assignments to the frame pointer are
|
|
|
820 for non-local gotos and are being done at a time when
|
|
|
821 they are valid and do not disturb anything else. Some
|
|
|
822 machines want to eliminate a fake argument pointer (or
|
|
|
823 even a fake frame pointer) with either the real frame
|
|
|
824 pointer or the stack pointer. Assignments to the hard
|
|
|
825 frame pointer must not prevent this elimination. */
|
|
|
826 for (ep = reg_eliminate;
|
|
|
827 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
|
|
|
828 ep++)
|
|
|
829 if (ep->to_rtx == SET_DEST (x)
|
|
|
830 && SET_DEST (x) != hard_frame_pointer_rtx)
|
|
|
831 setup_can_eliminate (ep, false);
|
|
|
832 }
|
|
|
833
|
|
|
834 mark_not_eliminable (SET_SRC (x), mem_mode);
|
|
|
835 return;
|
|
|
836
|
|
|
837 case MEM:
|
|
|
838 /* Our only special processing is to pass the mode of the MEM to
|
|
|
839 our recursive call. */
|
|
|
840 mark_not_eliminable (XEXP (x, 0), GET_MODE (x));
|
|
|
841 return;
|
|
|
842
|
|
|
843 default:
|
|
|
844 break;
|
|
|
845 }
|
|
|
846
|
|
|
847 fmt = GET_RTX_FORMAT (code);
|
|
|
848 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
|
|
|
849 {
|
|
|
850 if (*fmt == 'e')
|
|
|
851 mark_not_eliminable (XEXP (x, i), mem_mode);
|
|
|
852 else if (*fmt == 'E')
|
|
|
853 for (j = 0; j < XVECLEN (x, i); j++)
|
|
|
854 mark_not_eliminable (XVECEXP (x, i, j), mem_mode);
|
|
|
855 }
|
|
|
856 }
|
|
|
857
|
|
|
858
|
|
|
859
|
|
|
860 #ifdef HARD_FRAME_POINTER_REGNUM
|
|
|
861
|
|
|
862 /* Find offset equivalence note for reg WHAT in INSN and return the
|
|
|
863 found elmination offset. If the note is not found, return NULL.
|
|
|
864 Remove the found note. */
|
|
|
865 static rtx
|
|
|
866 remove_reg_equal_offset_note (rtx_insn *insn, rtx what)
|
|
|
867 {
|
|
|
868 rtx link, *link_loc;
|
|
|
869
|
|
|
870 for (link_loc = ®_NOTES (insn);
|
|
|
871 (link = *link_loc) != NULL_RTX;
|
|
|
872 link_loc = &XEXP (link, 1))
|
|
|
873 if (REG_NOTE_KIND (link) == REG_EQUAL
|
|
|
874 && GET_CODE (XEXP (link, 0)) == PLUS
|
|
|
875 && XEXP (XEXP (link, 0), 0) == what
|
|
|
876 && CONST_INT_P (XEXP (XEXP (link, 0), 1)))
|
|
|
877 {
|
|
|
878 *link_loc = XEXP (link, 1);
|
|
|
879 return XEXP (XEXP (link, 0), 1);
|
|
|
880 }
|
|
|
881 return NULL_RTX;
|
|
|
882 }
|
|
|
883
|
|
|
884 #endif
|
|
|
885
|
|
|
886 /* Scan INSN and eliminate all eliminable hard registers in it.
|
|
|
887
|
|
|
888 If REPLACE_P is true, do the replacement destructively. Also
|
|
|
889 delete the insn as dead it if it is setting an eliminable register.
|
|
|
890
|
|
|
891 If REPLACE_P is false, just update the offsets while keeping the
|
|
|
892 base register the same. If FIRST_P, use the sp offset for
|
|
|
893 elimination to sp. Otherwise, use UPDATE_SP_OFFSET for this. If
|
|
|
894 UPDATE_SP_OFFSET is non-zero, don't use difference of the offset
|
|
|
895 and the previous offset. Attach the note about used elimination
|
|
|
896 for insns setting frame pointer to update elimination easy (without
|
|
|
897 parsing already generated elimination insns to find offset
|
|
|
898 previously used) in future. */
|
|
|
899
|
|
|
900 void
|
|
|
901 eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p,
|
|
|
902 HOST_WIDE_INT update_sp_offset)
|
|
|
903 {
|
|
|
904 int icode = recog_memoized (insn);
|
|
|
905 rtx old_set = single_set (insn);
|
|
|
906 bool validate_p;
|
|
|
907 int i;
|
|
|
908 rtx substed_operand[MAX_RECOG_OPERANDS];
|
|
|
909 rtx orig_operand[MAX_RECOG_OPERANDS];
|
|
|
910 struct lra_elim_table *ep;
|
|
|
911 rtx plus_src, plus_cst_src;
|
|
|
912 lra_insn_recog_data_t id;
|
|
|
913 struct lra_static_insn_data *static_id;
|
|
|
914
|
|
|
915 if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn))
|
|
|
916 {
|
|
|
917 lra_assert (GET_CODE (PATTERN (insn)) == USE
|
|
|
918 || GET_CODE (PATTERN (insn)) == CLOBBER
|
|
|
919 || GET_CODE (PATTERN (insn)) == ASM_INPUT);
|
|
|
920 return;
|
|
|
921 }
|
|
|
922
|
|
|
923 /* Check for setting an eliminable register. */
|
|
|
924 if (old_set != 0 && REG_P (SET_DEST (old_set))
|
|
|
925 && (ep = get_elimination (SET_DEST (old_set))) != NULL)
|
|
|
926 {
|
|
|
927 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
|
|
|
928 if (ep->from_rtx == SET_DEST (old_set) && ep->can_eliminate)
|
|
|
929 {
|
|
|
930 bool delete_p = replace_p;
|
|
|
931
|
|
|
932 #ifdef HARD_FRAME_POINTER_REGNUM
|
|
|
933 if (ep->from == FRAME_POINTER_REGNUM
|
|
|
934 && ep->to == HARD_FRAME_POINTER_REGNUM)
|
|
|
935 /* If this is setting the frame pointer register to the
|
|
|
936 hardware frame pointer register and this is an
|
|
|
937 elimination that will be done (tested above), this
|
|
|
938 insn is really adjusting the frame pointer downward
|
|
|
939 to compensate for the adjustment done before a
|
|
|
940 nonlocal goto. */
|
|
|
941 {
|
|
|
942 rtx src = SET_SRC (old_set);
|
|
|
943 rtx off = remove_reg_equal_offset_note (insn, ep->to_rtx);
|
|
|
944
|
|
|
945 /* We should never process such insn with non-zero
|
|
|
946 UPDATE_SP_OFFSET. */
|
|
|
947 lra_assert (update_sp_offset == 0);
|
|
|
948
|
|
|
949 if (off != NULL_RTX
|
|
|
950 || src == ep->to_rtx
|
|
|
951 || (GET_CODE (src) == PLUS
|
|
|
952 && XEXP (src, 0) == ep->to_rtx
|
|
|
953 && CONST_INT_P (XEXP (src, 1))))
|
|
|
954 {
|
|
|
955 HOST_WIDE_INT offset;
|
|
|
956
|
|
|
957 if (replace_p)
|
|
|
958 {
|
|
|
959 SET_DEST (old_set) = ep->to_rtx;
|
|
|
960 lra_update_insn_recog_data (insn);
|
|
|
961 return;
|
|
|
962 }
|
|
|
963 offset = (off != NULL_RTX ? INTVAL (off)
|
|
|
964 : src == ep->to_rtx ? 0 : INTVAL (XEXP (src, 1)));
|
|
|
965 offset -= (ep->offset - ep->previous_offset);
|
|
|
966 src = plus_constant (Pmode, ep->to_rtx, offset);
|
|
|
967
|
|
|
968 /* First see if this insn remains valid when we
|
|
|
969 make the change. If not, keep the INSN_CODE
|
|
|
970 the same and let the constraint pass fit it
|
|
|
971 up. */
|
|
|
972 validate_change (insn, &SET_SRC (old_set), src, 1);
|
|
|
973 validate_change (insn, &SET_DEST (old_set),
|
|
|
974 ep->from_rtx, 1);
|
|
|
975 if (! apply_change_group ())
|
|
|
976 {
|
|
|
977 SET_SRC (old_set) = src;
|
|
|
978 SET_DEST (old_set) = ep->from_rtx;
|
|
|
979 }
|
|
|
980 lra_update_insn_recog_data (insn);
|
|
|
981 /* Add offset note for future updates. */
|
|
|
982 add_reg_note (insn, REG_EQUAL, copy_rtx (src));
|
|
|
983 return;
|
|
|
984 }
|
|
|
985 }
|
|
|
986 #endif
|
|
|
987
|
|
|
988 /* This insn isn't serving a useful purpose. We delete it
|
|
|
989 when REPLACE is set. */
|
|
|
990 if (delete_p)
|
|
|
991 lra_delete_dead_insn (insn);
|
|
|
992 return;
|
|
|
993 }
|
|
|
994 }
|
|
|
995
|
|
|
996 /* We allow one special case which happens to work on all machines we
|
|
|
997 currently support: a single set with the source or a REG_EQUAL
|
|
|
998 note being a PLUS of an eliminable register and a constant. */
|
|
|
999 plus_src = plus_cst_src = 0;
|
|
|
1000 if (old_set && REG_P (SET_DEST (old_set)))
|
|
|
1001 {
|
|
|
1002 if (GET_CODE (SET_SRC (old_set)) == PLUS)
|
|
|
1003 plus_src = SET_SRC (old_set);
|
|
|
1004 /* First see if the source is of the form (plus (...) CST). */
|
|
|
1005 if (plus_src
|
|
|
1006 && CONST_INT_P (XEXP (plus_src, 1)))
|
|
|
1007 plus_cst_src = plus_src;
|
|
|
1008 /* Check that the first operand of the PLUS is a hard reg or
|
|
|
1009 the lowpart subreg of one. */
|
|
|
1010 if (plus_cst_src)
|
|
|
1011 {
|
|
|
1012 rtx reg = XEXP (plus_cst_src, 0);
|
|
|
1013
|
|
|
1014 if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
|
|
|
1015 reg = SUBREG_REG (reg);
|
|
|
1016
|
|
|
1017 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
|
|
|
1018 plus_cst_src = 0;
|
|
|
1019 }
|
|
|
1020 }
|
|
|
1021 if (plus_cst_src)
|
|
|
1022 {
|
|
|
1023 rtx reg = XEXP (plus_cst_src, 0);
|
|
|
1024 HOST_WIDE_INT offset = INTVAL (XEXP (plus_cst_src, 1));
|
|
|
1025
|
|
|
1026 if (GET_CODE (reg) == SUBREG)
|
|
|
1027 reg = SUBREG_REG (reg);
|
|
|
1028
|
|
|
1029 if (REG_P (reg) && (ep = get_elimination (reg)) != NULL)
|
|
|
1030 {
|
|
|
1031 rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx;
|
|
|
1032
|
|
|
1033 if (! replace_p)
|
|
|
1034 {
|
|
|
1035 if (update_sp_offset == 0)
|
|
|
1036 offset += (ep->offset - ep->previous_offset);
|
|
|
1037 if (ep->to_rtx == stack_pointer_rtx)
|
|
|
1038 {
|
|
|
1039 if (first_p)
|
|
|
1040 offset -= lra_get_insn_recog_data (insn)->sp_offset;
|
|
|
1041 else
|
|
|
1042 offset += update_sp_offset;
|
|
|
1043 }
|
|
|
1044 offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src));
|
|
|
1045 }
|
|
|
1046
|
|
|
1047 if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
|
|
|
1048 to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx);
|
|
|
1049 /* If we have a nonzero offset, and the source is already a
|
|
|
1050 simple REG, the following transformation would increase
|
|
|
1051 the cost of the insn by replacing a simple REG with (plus
|
|
|
1052 (reg sp) CST). So try only when we already had a PLUS
|
|
|
1053 before. */
|
|
|
1054 if (offset == 0 || plus_src)
|
|
|
1055 {
|
|
|
1056 rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset);
|
|
|
1057
|
|
|
1058 old_set = single_set (insn);
|
|
|
1059
|
|
|
1060 /* First see if this insn remains valid when we make the
|
|
|
1061 change. If not, try to replace the whole pattern
|
|
|
1062 with a simple set (this may help if the original insn
|
|
|
1063 was a PARALLEL that was only recognized as single_set
|
|
|
1064 due to REG_UNUSED notes). If this isn't valid
|
|
|
1065 either, keep the INSN_CODE the same and let the
|
|
|
1066 constraint pass fix it up. */
|
|
|
1067 if (! validate_change (insn, &SET_SRC (old_set), new_src, 0))
|
|
|
1068 {
|
|
|
1069 rtx new_pat = gen_rtx_SET (SET_DEST (old_set), new_src);
|
|
|
1070
|
|
|
1071 if (! validate_change (insn, &PATTERN (insn), new_pat, 0))
|
|
|
1072 SET_SRC (old_set) = new_src;
|
|
|
1073 }
|
|
|
1074 lra_update_insn_recog_data (insn);
|
|
|
1075 /* This can't have an effect on elimination offsets, so skip
|
|
|
1076 right to the end. */
|
|
|
1077 return;
|
|
|
1078 }
|
|
|
1079 }
|
|
|
1080 }
|
|
|
1081
|
|
|
1082 /* Eliminate all eliminable registers occurring in operands that
|
|
|
1083 can be handled by the constraint pass. */
|
|
|
1084 id = lra_get_insn_recog_data (insn);
|
|
|
1085 static_id = id->insn_static_data;
|
|
|
1086 validate_p = false;
|
|
|
1087 for (i = 0; i < static_id->n_operands; i++)
|
|
|
1088 {
|
|
|
1089 orig_operand[i] = *id->operand_loc[i];
|
|
|
1090 substed_operand[i] = *id->operand_loc[i];
|
|
|
1091
|
|
|
1092 /* For an asm statement, every operand is eliminable. */
|
|
|
1093 if (icode < 0 || insn_data[icode].operand[i].eliminable)
|
|
|
1094 {
|
|
|
1095 /* Check for setting a hard register that we know about. */
|
|
|
1096 if (static_id->operand[i].type != OP_IN
|
|
|
1097 && REG_P (orig_operand[i]))
|
|
|
1098 {
|
|
|
1099 /* If we are assigning to a hard register that can be
|
|
|
1100 eliminated, it must be as part of a PARALLEL, since
|
|
|
1101 the code above handles single SETs. This reg can not
|
|
|
1102 be longer eliminated -- it is forced by
|
|
|
1103 mark_not_eliminable. */
|
|
|
1104 for (ep = reg_eliminate;
|
|
|
1105 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
|
|
|
1106 ep++)
|
|
|
1107 lra_assert (ep->from_rtx != orig_operand[i]
|
|
|
1108 || ! ep->can_eliminate);
|
|
|
1109 }
|
|
|
1110
|
|
|
1111 /* Companion to the above plus substitution, we can allow
|
|
|
1112 invariants as the source of a plain move. */
|
|
|
1113 substed_operand[i]
|
|
|
1114 = lra_eliminate_regs_1 (insn, *id->operand_loc[i], VOIDmode,
|
|
|
1115 replace_p, ! replace_p && ! first_p,
|
|
|
1116 update_sp_offset, first_p);
|
|
|
1117 if (substed_operand[i] != orig_operand[i])
|
|
|
1118 validate_p = true;
|
|
|
1119 }
|
|
|
1120 }
|
|
|
1121
|
|
|
1122 if (! validate_p)
|
|
|
1123 return;
|
|
|
1124
|
|
|
1125 /* Substitute the operands; the new values are in the substed_operand
|
|
|
1126 array. */
|
|
|
1127 for (i = 0; i < static_id->n_operands; i++)
|
|
|
1128 *id->operand_loc[i] = substed_operand[i];
|
|
|
1129 for (i = 0; i < static_id->n_dups; i++)
|
|
|
1130 *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]];
|
|
|
1131
|
|
|
1132 /* If we had a move insn but now we don't, re-recognize it.
|
|
|
1133 This will cause spurious re-recognition if the old move had a
|
|
|
1134 PARALLEL since the new one still will, but we can't call
|
|
|
1135 single_set without having put new body into the insn and the
|
|
|
1136 re-recognition won't hurt in this rare case. */
|
|
|
1137 id = lra_update_insn_recog_data (insn);
|
|
|
1138 static_id = id->insn_static_data;
|
|
|
1139 }
|
|
|
1140
|
|
|
1141 /* Spill pseudos which are assigned to hard registers in SET. Add
|
|
|
1142 affected insns for processing in the subsequent constraint
|
|
|
1143 pass. */
|
|
|
1144 static void
|
|
|
1145 spill_pseudos (HARD_REG_SET set)
|
|
|
1146 {
|
|
|
1147 int i;
|
|
|
1148 bitmap_head to_process;
|
|
|
1149 rtx_insn *insn;
|
|
|
1150
|
|
|
1151 if (hard_reg_set_empty_p (set))
|
|
|
1152 return;
|
|
|
1153 if (lra_dump_file != NULL)
|
|
|
1154 {
|
|
|
1155 fprintf (lra_dump_file, " Spilling non-eliminable hard regs:");
|
|
|
1156 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
|
|
1157 if (TEST_HARD_REG_BIT (set, i))
|
|
|
1158 fprintf (lra_dump_file, " %d", i);
|
|
|
1159 fprintf (lra_dump_file, "\n");
|
|
|
1160 }
|
|
|
1161 bitmap_initialize (&to_process, ®_obstack);
|
|
|
1162 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
|
|
|
1163 if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
|
|
|
1164 && overlaps_hard_reg_set_p (set,
|
|
|
1165 PSEUDO_REGNO_MODE (i), reg_renumber[i]))
|
|
|
1166 {
|
|
|
1167 if (lra_dump_file != NULL)
|
|
|
1168 fprintf (lra_dump_file, " Spilling r%d(%d)\n",
|
|
|
1169 i, reg_renumber[i]);
|
|
|
1170 reg_renumber[i] = -1;
|
|
|
1171 bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap);
|
|
|
1172 }
|
|
|
1173 IOR_HARD_REG_SET (lra_no_alloc_regs, set);
|
|
|
1174 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
|
|
|
1175 if (bitmap_bit_p (&to_process, INSN_UID (insn)))
|
|
|
1176 {
|
|
|
1177 lra_push_insn (insn);
|
|
|
1178 lra_set_used_insn_alternative (insn, -1);
|
|
|
1179 }
|
|
|
1180 bitmap_clear (&to_process);
|
|
|
1181 }
|
|
|
1182
|
|
|
1183 /* Update all offsets and possibility for elimination on eliminable
|
|
|
1184 registers. Spill pseudos assigned to registers which are
|
|
|
1185 uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add
|
|
|
1186 insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard
|
|
|
1187 registers whose offsets should be changed. Return true if any
|
|
|
1188 elimination offset changed. */
|
|
|
1189 static bool
|
|
|
1190 update_reg_eliminate (bitmap insns_with_changed_offsets)
|
|
|
1191 {
|
|
|
1192 bool prev, result;
|
|
|
1193 struct lra_elim_table *ep, *ep1;
|
|
|
1194 HARD_REG_SET temp_hard_reg_set;
|
|
|
1195
|
|
|
1196 targetm.compute_frame_layout ();
|
|
|
1197
|
|
|
1198 /* Clear self elimination offsets. */
|
|
|
1199 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
|
|
|
1200 self_elim_offsets[ep->from] = 0;
|
|
|
1201 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
|
|
|
1202 {
|
|
|
1203 /* If it is a currently used elimination: update the previous
|
|
|
1204 offset. */
|
|
|
1205 if (elimination_map[ep->from] == ep)
|
|
|
1206 ep->previous_offset = ep->offset;
|
|
|
1207
|
|
|
1208 prev = ep->prev_can_eliminate;
|
|
|
1209 setup_can_eliminate (ep, targetm.can_eliminate (ep->from, ep->to));
|
|
|
1210 if (ep->can_eliminate && ! prev)
|
|
|
1211 {
|
|
|
1212 /* It is possible that not eliminable register becomes
|
|
|
1213 eliminable because we took other reasons into account to
|
|
|
1214 set up eliminable regs in the initial set up. Just
|
|
|
1215 ignore new eliminable registers. */
|
|
|
1216 setup_can_eliminate (ep, false);
|
|
|
1217 continue;
|
|
|
1218 }
|
|
|
1219 if (ep->can_eliminate != prev && elimination_map[ep->from] == ep)
|
|
|
1220 {
|
|
|
1221 /* We cannot use this elimination anymore -- find another
|
|
|
1222 one. */
|
|
|
1223 if (lra_dump_file != NULL)
|
|
|
1224 fprintf (lra_dump_file,
|
|
|
1225 " Elimination %d to %d is not possible anymore\n",
|
|
|
1226 ep->from, ep->to);
|
|
|
1227 /* If after processing RTL we decides that SP can be used as
|
|
|
1228 a result of elimination, it can not be changed. */
|
|
|
1229 gcc_assert ((ep->to_rtx != stack_pointer_rtx)
|
|
|
1230 || (ep->from < FIRST_PSEUDO_REGISTER
|
|
|
1231 && fixed_regs [ep->from]));
|
|
|
1232 /* Mark that is not eliminable anymore. */
|
|
|
1233 elimination_map[ep->from] = NULL;
|
|
|
1234 for (ep1 = ep + 1; ep1 < ®_eliminate[NUM_ELIMINABLE_REGS]; ep1++)
|
|
|
1235 if (ep1->can_eliminate && ep1->from == ep->from)
|
|
|
1236 break;
|
|
|
1237 if (ep1 < ®_eliminate[NUM_ELIMINABLE_REGS])
|
|
|
1238 {
|
|
|
1239 if (lra_dump_file != NULL)
|
|
|
1240 fprintf (lra_dump_file, " Using elimination %d to %d now\n",
|
|
|
1241 ep1->from, ep1->to);
|
|
|
1242 lra_assert (ep1->previous_offset == 0);
|
|
|
1243 ep1->previous_offset = ep->offset;
|
|
|
1244 }
|
|
|
1245 else
|
|
|
1246 {
|
|
|
1247 /* There is no elimination anymore just use the hard
|
|
|
1248 register `from' itself. Setup self elimination
|
|
|
1249 offset to restore the original offset values. */
|
|
|
1250 if (lra_dump_file != NULL)
|
|
|
1251 fprintf (lra_dump_file, " %d is not eliminable at all\n",
|
|
|
1252 ep->from);
|
|
|
1253 self_elim_offsets[ep->from] = -ep->offset;
|
|
|
1254 if (ep->offset != 0)
|
|
|
1255 bitmap_ior_into (insns_with_changed_offsets,
|
|
|
1256 &lra_reg_info[ep->from].insn_bitmap);
|
|
|
1257 }
|
|
|
1258 }
|
|
|
1259
|
|
|
1260 INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset);
|
|
|
1261 }
|
|
|
1262 setup_elimination_map ();
|
|
|
1263 result = false;
|
|
|
1264 CLEAR_HARD_REG_SET (temp_hard_reg_set);
|
|
|
1265 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
|
|
|
1266 if (elimination_map[ep->from] == NULL)
|
|
|
1267 SET_HARD_REG_BIT (temp_hard_reg_set, ep->from);
|
|
|
1268 else if (elimination_map[ep->from] == ep)
|
|
|
1269 {
|
|
|
1270 /* Prevent the hard register into which we eliminate from
|
|
|
1271 the usage for pseudos. */
|
|
|
1272 if (ep->from != ep->to)
|
|
|
1273 SET_HARD_REG_BIT (temp_hard_reg_set, ep->to);
|
|
|
1274 if (ep->previous_offset != ep->offset)
|
|
|
1275 {
|
|
|
1276 bitmap_ior_into (insns_with_changed_offsets,
|
|
|
1277 &lra_reg_info[ep->from].insn_bitmap);
|
|
|
1278
|
|
|
1279 /* Update offset when the eliminate offset have been
|
|
|
1280 changed. */
|
|
|
1281 lra_update_reg_val_offset (lra_reg_info[ep->from].val,
|
|
|
1282 ep->offset - ep->previous_offset);
|
|
|
1283 result = true;
|
|
|
1284 }
|
|
|
1285 }
|
|
|
1286 IOR_HARD_REG_SET (lra_no_alloc_regs, temp_hard_reg_set);
|
|
|
1287 AND_COMPL_HARD_REG_SET (eliminable_regset, temp_hard_reg_set);
|
|
|
1288 spill_pseudos (temp_hard_reg_set);
|
|
|
1289 return result;
|
|
|
1290 }
|
|
|
1291
|
|
|
1292 /* Initialize the table of hard registers to eliminate.
|
|
|
1293 Pre-condition: global flag frame_pointer_needed has been set before
|
|
|
1294 calling this function. */
|
|
|
1295 static void
|
|
|
1296 init_elim_table (void)
|
|
|
1297 {
|
|
|
1298 struct lra_elim_table *ep;
|
|
|
1299 bool value_p;
|
|
|
1300 const struct elim_table_1 *ep1;
|
|
|
1301
|
|
|
1302 if (!reg_eliminate)
|
|
|
1303 reg_eliminate = XCNEWVEC (struct lra_elim_table, NUM_ELIMINABLE_REGS);
|
|
|
1304
|
|
|
1305 memset (self_elim_offsets, 0, sizeof (self_elim_offsets));
|
|
|
1306 /* Initiate member values which will be never changed. */
|
|
|
1307 self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true;
|
|
|
1308 self_elim_table.previous_offset = 0;
|
|
|
1309
|
|
|
1310 for (ep = reg_eliminate, ep1 = reg_eliminate_1;
|
|
|
1311 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++)
|
|
|
1312 {
|
|
|
1313 ep->offset = ep->previous_offset = 0;
|
|
|
1314 ep->from = ep1->from;
|
|
|
1315 ep->to = ep1->to;
|
|
|
1316 value_p = (targetm.can_eliminate (ep->from, ep->to)
|
|
|
1317 && ! (ep->to == STACK_POINTER_REGNUM
|
|
|
1318 && frame_pointer_needed
|
|
|
1319 && (! SUPPORTS_STACK_ALIGNMENT
|
|
|
1320 || ! stack_realign_fp)));
|
|
|
1321 setup_can_eliminate (ep, value_p);
|
|
|
1322 }
|
|
|
1323
|
|
|
1324 /* Build the FROM and TO REG rtx's. Note that code in gen_rtx_REG
|
|
|
1325 will cause, e.g., gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to
|
|
|
1326 equal stack_pointer_rtx. We depend on this. Threfore we switch
|
|
|
1327 off that we are in LRA temporarily. */
|
|
|
1328 lra_in_progress = 0;
|
|
|
1329 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
|
|
|
1330 {
|
|
|
1331 ep->from_rtx = gen_rtx_REG (Pmode, ep->from);
|
|
|
1332 ep->to_rtx = gen_rtx_REG (Pmode, ep->to);
|
|
|
1333 eliminable_reg_rtx[ep->from] = ep->from_rtx;
|
|
|
1334 }
|
|
|
1335 lra_in_progress = 1;
|
|
|
1336 }
|
|
|
1337
|
|
|
1338 /* Function for initialization of elimination once per function. It
|
|
|
1339 sets up sp offset for each insn. */
|
|
|
1340 static void
|
|
|
1341 init_elimination (void)
|
|
|
1342 {
|
|
|
1343 bool stop_to_sp_elimination_p;
|
|
|
1344 basic_block bb;
|
|
|
1345 rtx_insn *insn;
|
|
|
1346 struct lra_elim_table *ep;
|
|
|
1347
|
|
|
1348 init_elim_table ();
|
|
|
1349 FOR_EACH_BB_FN (bb, cfun)
|
|
|
1350 {
|
|
|
1351 curr_sp_change = 0;
|
|
|
1352 stop_to_sp_elimination_p = false;
|
|
|
1353 FOR_BB_INSNS (bb, insn)
|
|
|
1354 if (INSN_P (insn))
|
|
|
1355 {
|
|
|
1356 lra_get_insn_recog_data (insn)->sp_offset = curr_sp_change;
|
|
|
1357 if (NONDEBUG_INSN_P (insn))
|
|
|
1358 {
|
|
|
1359 mark_not_eliminable (PATTERN (insn), VOIDmode);
|
|
|
1360 if (curr_sp_change != 0
|
|
|
1361 && find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX))
|
|
|
1362 stop_to_sp_elimination_p = true;
|
|
|
1363 }
|
|
|
1364 }
|
|
|
1365 if (! frame_pointer_needed
|
|
|
1366 && (curr_sp_change != 0 || stop_to_sp_elimination_p)
|
|
|
1367 && bb->succs && bb->succs->length () != 0)
|
|
|
1368 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
|
|
|
1369 if (ep->to == STACK_POINTER_REGNUM)
|
|
|
1370 setup_can_eliminate (ep, false);
|
|
|
1371 }
|
|
|
1372 setup_elimination_map ();
|
|
|
1373 }
|
|
|
1374
|
|
|
1375 /* Eliminate hard reg given by its location LOC. */
|
|
|
1376 void
|
|
|
1377 lra_eliminate_reg_if_possible (rtx *loc)
|
|
|
1378 {
|
|
|
1379 int regno;
|
|
|
1380 struct lra_elim_table *ep;
|
|
|
1381
|
|
|
1382 lra_assert (REG_P (*loc));
|
|
|
1383 if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
|
|
|
1384 || ! TEST_HARD_REG_BIT (lra_no_alloc_regs, regno))
|
|
|
1385 return;
|
|
|
1386 if ((ep = get_elimination (*loc)) != NULL)
|
|
|
1387 *loc = ep->to_rtx;
|
|
|
1388 }
|
|
|
1389
|
|
|
1390 /* Do (final if FINAL_P or first if FIRST_P) elimination in INSN. Add
|
|
|
1391 the insn for subsequent processing in the constraint pass, update
|
|
|
1392 the insn info. */
|
|
|
1393 static void
|
|
|
1394 process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p)
|
|
|
1395 {
|
|
|
1396 eliminate_regs_in_insn (insn, final_p, first_p, 0);
|
|
|
1397 if (! final_p)
|
|
|
1398 {
|
|
|
1399 /* Check that insn changed its code. This is a case when a move
|
|
|
1400 insn becomes an add insn and we do not want to process the
|
|
|
1401 insn as a move anymore. */
|
|
|
1402 int icode = recog (PATTERN (insn), insn, 0);
|
|
|
1403
|
|
|
1404 if (icode >= 0 && icode != INSN_CODE (insn))
|
|
|
1405 {
|
|
|
1406 INSN_CODE (insn) = icode;
|
|
|
1407 lra_update_insn_recog_data (insn);
|
|
|
1408 }
|
|
|
1409 lra_update_insn_regno_info (insn);
|
|
|
1410 lra_push_insn (insn);
|
|
|
1411 lra_set_used_insn_alternative (insn, -1);
|
|
|
1412 }
|
|
|
1413 }
|
|
|
1414
|
|
|
1415 /* Entry function to do final elimination if FINAL_P or to update
|
|
|
1416 elimination register offsets (FIRST_P if we are doing it the first
|
|
|
1417 time). */
|
|
|
1418 void
|
|
|
1419 lra_eliminate (bool final_p, bool first_p)
|
|
|
1420 {
|
|
|
1421 unsigned int uid;
|
|
|
1422 bitmap_head insns_with_changed_offsets;
|
|
|
1423 bitmap_iterator bi;
|
|
|
1424 struct lra_elim_table *ep;
|
|
|
1425
|
|
|
1426 gcc_assert (! final_p || ! first_p);
|
|
|
1427
|
|
|
1428 timevar_push (TV_LRA_ELIMINATE);
|
|
|
1429
|
|
|
1430 if (first_p)
|
|
|
1431 init_elimination ();
|
|
|
1432
|
|
|
1433 bitmap_initialize (&insns_with_changed_offsets, ®_obstack);
|
|
|
1434 if (final_p)
|
|
|
1435 {
|
|
|
1436 if (flag_checking)
|
|
|
1437 {
|
|
|
1438 update_reg_eliminate (&insns_with_changed_offsets);
|
|
|
1439 gcc_assert (bitmap_empty_p (&insns_with_changed_offsets));
|
|
|
1440 }
|
|
|
1441 /* We change eliminable hard registers in insns so we should do
|
|
|
1442 this for all insns containing any eliminable hard
|
|
|
1443 register. */
|
|
|
1444 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
|
|
|
1445 if (elimination_map[ep->from] != NULL)
|
|
|
1446 bitmap_ior_into (&insns_with_changed_offsets,
|
|
|
1447 &lra_reg_info[ep->from].insn_bitmap);
|
|
|
1448 }
|
|
|
1449 else if (! update_reg_eliminate (&insns_with_changed_offsets))
|
|
|
1450 goto lra_eliminate_done;
|
|
|
1451 if (lra_dump_file != NULL)
|
|
|
1452 {
|
|
|
1453 fprintf (lra_dump_file, "New elimination table:\n");
|
|
|
1454 print_elim_table (lra_dump_file);
|
|
|
1455 }
|
|
|
1456 EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi)
|
|
|
1457 /* A dead insn can be deleted in process_insn_for_elimination. */
|
|
|
1458 if (lra_insn_recog_data[uid] != NULL)
|
|
|
1459 process_insn_for_elimination (lra_insn_recog_data[uid]->insn,
|
|
|
1460 final_p, first_p);
|
|
|
1461 bitmap_clear (&insns_with_changed_offsets);
|
|
|
1462
|
|
|
1463 lra_eliminate_done:
|
|
|
1464 timevar_pop (TV_LRA_ELIMINATE);
|
|
|
1465 }
|
