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111
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1 /* Test whether an AND mask or'ed with the know zero bits that equals a mode
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2 mask is a candidate for zero extendion. */
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3
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4 /* Note: This test requires that char, int and long have different sizes and the
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5 target has a way to do 32 -> 64 bit zero extension other than AND. */
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6
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7 /* { dg-do compile { target i?86-*-* x86_64-*-* s390*-*-* aarch64*-*-* } } */
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8 /* { dg-require-effective-target lp64 } */
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9 /* { dg-options "-O3 -dP" } */
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10
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11 unsigned long foo (unsigned char c)
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12 {
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13 unsigned long l;
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14 unsigned int i;
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15
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16 i = ((unsigned int)c) << 8;
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17 i |= ((unsigned int)c) << 20;
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18 asm volatile ("":::);
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19 i = i & 0x0ff0ff00;
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20 asm volatile ("":::);
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21 l = (unsigned long)i;
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22
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23 return l;
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24 }
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25
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26 unsigned long bar (unsigned char c)
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27 {
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28 unsigned long l;
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29 unsigned int i;
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30
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31 i = ((unsigned int)c) << 8;
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32 i |= ((unsigned int)c) << 20;
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33 asm volatile ("":::);
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34 i = i & 0x0ffffff0;
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35 asm volatile ("":::);
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36 l = (unsigned long)i;
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37
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38 return l;
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39 }
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40
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41 /* Check that no pattern containing an AND expression was used. */
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42 /* { dg-final { scan-assembler-not "\\(and:" } } */
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