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111
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1 /* -----------------------------------------------------------------------
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2 tile.S - Copyright (c) 2011 Tilera Corp.
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3
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4 Tilera TILEPro and TILE-Gx Foreign Function Interface
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5
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6 Permission is hereby granted, free of charge, to any person obtaining
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7 a copy of this software and associated documentation files (the
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8 ``Software''), to deal in the Software without restriction, including
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9 without limitation the rights to use, copy, modify, merge, publish,
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10 distribute, sublicense, and/or sell copies of the Software, and to
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11 permit persons to whom the Software is furnished to do so, subject to
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12 the following conditions:
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13
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14 The above copyright notice and this permission notice shall be included
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15 in all copies or substantial portions of the Software.
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16
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17 THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
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18 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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19 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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20 NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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21 HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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22 WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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23 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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24 DEALINGS IN THE SOFTWARE.
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25 ----------------------------------------------------------------------- */
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26
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27 #define LIBFFI_ASM
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28 #include <fficonfig.h>
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29 #include <ffi.h>
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30
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31 /* Number of bytes in a register. */
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32 #define REG_SIZE FFI_SIZEOF_ARG
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33
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34 /* Number of bytes in stack linkage area for backtracing.
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35
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36 A note about the ABI: on entry to a procedure, sp points to a stack
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37 slot where it must spill the return address if it's not a leaf.
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38 REG_SIZE bytes beyond that is a slot owned by the caller which
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39 contains the sp value that the caller had when it was originally
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40 entered (i.e. the caller's frame pointer). */
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41 #define LINKAGE_SIZE (2 * REG_SIZE)
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42
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43 /* The first 10 registers are used to pass arguments and return values. */
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44 #define NUM_ARG_REGS 10
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45
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46 #ifdef __tilegx__
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47 #define SW st
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48 #define LW ld
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49 #define BGZT bgtzt
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50 #else
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51 #define SW sw
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52 #define LW lw
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53 #define BGZT bgzt
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54 #endif
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55
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56
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57 /* void ffi_call_tile (int_reg_t reg_args[NUM_ARG_REGS],
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58 const int_reg_t *stack_args,
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59 unsigned long stack_args_bytes,
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60 void (*fnaddr)(void));
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61
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62 On entry, REG_ARGS contain the outgoing register values,
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63 and STACK_ARGS contains STACK_ARG_BYTES of additional values
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64 to be passed on the stack. If STACK_ARG_BYTES is zero, then
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65 STACK_ARGS is ignored.
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66
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67 When the invoked function returns, the values of r0-r9 are
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68 blindly stored back into REG_ARGS for the caller to examine. */
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69
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70 .section .text.ffi_call_tile, "ax", @progbits
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71 .align 8
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72 .globl ffi_call_tile
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73 FFI_HIDDEN(ffi_call_tile)
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74 ffi_call_tile:
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75
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76 /* Incoming arguments. */
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77 #define REG_ARGS r0
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78 #define INCOMING_STACK_ARGS r1
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79 #define STACK_ARG_BYTES r2
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80 #define ORIG_FNADDR r3
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81
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82 /* Temporary values. */
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83 #define FRAME_SIZE r10
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84 #define TMP r11
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85 #define TMP2 r12
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86 #define OUTGOING_STACK_ARGS r13
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87 #define REG_ADDR_PTR r14
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88 #define RETURN_REG_ADDR r15
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89 #define FNADDR r16
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90
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91 .cfi_startproc
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92 {
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93 /* Save return address. */
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94 SW sp, lr
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95 .cfi_offset lr, 0
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96 /* Prepare to spill incoming r52. */
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97 addi TMP, sp, -REG_SIZE
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98 /* Increase frame size to have room to spill r52 and REG_ARGS.
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99 The +7 is to round up mod 8. */
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100 addi FRAME_SIZE, STACK_ARG_BYTES, \
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101 REG_SIZE + REG_SIZE + LINKAGE_SIZE + 7
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102 }
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103 {
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104 /* Round stack frame size to a multiple of 8 to satisfy ABI. */
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105 andi FRAME_SIZE, FRAME_SIZE, -8
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106 /* Compute where to spill REG_ARGS value. */
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107 addi TMP2, sp, -(REG_SIZE * 2)
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108 }
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109 {
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110 /* Spill incoming r52. */
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111 SW TMP, r52
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112 .cfi_offset r52, -REG_SIZE
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113 /* Set up our frame pointer. */
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114 move r52, sp
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115 .cfi_def_cfa_register r52
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116 /* Push stack frame. */
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117 sub sp, sp, FRAME_SIZE
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118 }
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119 {
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120 /* Prepare to set up stack linkage. */
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121 addi TMP, sp, REG_SIZE
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122 /* Prepare to memcpy stack args. */
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123 addi OUTGOING_STACK_ARGS, sp, LINKAGE_SIZE
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124 /* Save REG_ARGS which we will need after we call the subroutine. */
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125 SW TMP2, REG_ARGS
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126 }
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127 {
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128 /* Set up linkage info to hold incoming stack pointer. */
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129 SW TMP, r52
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130 }
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131 {
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132 /* Skip stack args memcpy if we don't have any stack args (common). */
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133 blezt STACK_ARG_BYTES, .Ldone_stack_args_memcpy
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134 }
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135
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136 .Lmemcpy_stack_args:
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137 {
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138 /* Load incoming argument from stack_args. */
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139 LW TMP, INCOMING_STACK_ARGS
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140 addi INCOMING_STACK_ARGS, INCOMING_STACK_ARGS, REG_SIZE
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141 }
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142 {
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143 /* Store stack argument into outgoing stack argument area. */
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144 SW OUTGOING_STACK_ARGS, TMP
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145 addi OUTGOING_STACK_ARGS, OUTGOING_STACK_ARGS, REG_SIZE
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146 addi STACK_ARG_BYTES, STACK_ARG_BYTES, -REG_SIZE
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147 }
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148 {
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149 BGZT STACK_ARG_BYTES, .Lmemcpy_stack_args
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150 }
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151 .Ldone_stack_args_memcpy:
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152
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153 {
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154 /* Copy aside ORIG_FNADDR so we can overwrite its register. */
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155 move FNADDR, ORIG_FNADDR
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156 /* Prepare to load argument registers. */
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157 addi REG_ADDR_PTR, r0, REG_SIZE
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158 /* Load outgoing r0. */
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159 LW r0, r0
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160 }
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161
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162 /* Load up argument registers from the REG_ARGS array. */
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163 #define LOAD_REG(REG, PTR) \
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164 { \
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165 LW REG, PTR ; \
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166 addi PTR, PTR, REG_SIZE \
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167 }
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168
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169 LOAD_REG(r1, REG_ADDR_PTR)
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170 LOAD_REG(r2, REG_ADDR_PTR)
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171 LOAD_REG(r3, REG_ADDR_PTR)
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172 LOAD_REG(r4, REG_ADDR_PTR)
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173 LOAD_REG(r5, REG_ADDR_PTR)
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174 LOAD_REG(r6, REG_ADDR_PTR)
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175 LOAD_REG(r7, REG_ADDR_PTR)
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176 LOAD_REG(r8, REG_ADDR_PTR)
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177 LOAD_REG(r9, REG_ADDR_PTR)
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178
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179 {
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180 /* Call the subroutine. */
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181 jalr FNADDR
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182 }
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183
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184 {
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185 /* Restore original lr. */
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186 LW lr, r52
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187 /* Prepare to recover ARGS, which we spilled earlier. */
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188 addi TMP, r52, -(2 * REG_SIZE)
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189 }
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190 {
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191 /* Restore ARGS, so we can fill it in with the return regs r0-r9. */
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192 LW RETURN_REG_ADDR, TMP
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193 /* Prepare to restore original r52. */
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194 addi TMP, r52, -REG_SIZE
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195 }
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196
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197 {
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198 /* Pop stack frame. */
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199 move sp, r52
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200 /* Restore original r52. */
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201 LW r52, TMP
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202 }
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203
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204 #define STORE_REG(REG, PTR) \
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205 { \
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206 SW PTR, REG ; \
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207 addi PTR, PTR, REG_SIZE \
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208 }
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209
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210 /* Return all register values by reference. */
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211 STORE_REG(r0, RETURN_REG_ADDR)
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212 STORE_REG(r1, RETURN_REG_ADDR)
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213 STORE_REG(r2, RETURN_REG_ADDR)
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214 STORE_REG(r3, RETURN_REG_ADDR)
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215 STORE_REG(r4, RETURN_REG_ADDR)
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216 STORE_REG(r5, RETURN_REG_ADDR)
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217 STORE_REG(r6, RETURN_REG_ADDR)
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218 STORE_REG(r7, RETURN_REG_ADDR)
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219 STORE_REG(r8, RETURN_REG_ADDR)
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220 STORE_REG(r9, RETURN_REG_ADDR)
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221
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222 {
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223 jrp lr
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224 }
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225
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226 .cfi_endproc
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227 .size ffi_call_tile, .-ffi_call_tile
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228
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229 /* ffi_closure_tile(...)
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230
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231 On entry, lr points to the closure plus 8 bytes, and r10
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232 contains the actual return address.
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233
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234 This function simply dumps all register parameters into a stack array
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235 and passes the closure, the registers array, and the stack arguments
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236 to C code that does all of the actual closure processing. */
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237
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238 .section .text.ffi_closure_tile, "ax", @progbits
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239 .align 8
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240 .globl ffi_closure_tile
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241 FFI_HIDDEN(ffi_closure_tile)
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242
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243 .cfi_startproc
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244 /* Room to spill all NUM_ARG_REGS incoming registers, plus frame linkage. */
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245 #define CLOSURE_FRAME_SIZE (((NUM_ARG_REGS * REG_SIZE * 2 + LINKAGE_SIZE) + 7) & -8)
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246 ffi_closure_tile:
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247 {
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248 #ifdef __tilegx__
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249 st sp, lr
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250 .cfi_offset lr, 0
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251 #else
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252 /* Save return address (in r10 due to closure stub wrapper). */
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253 SW sp, r10
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254 .cfi_return_column r10
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255 .cfi_offset r10, 0
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256 #endif
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257 /* Compute address for stack frame linkage. */
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258 addli r10, sp, -(CLOSURE_FRAME_SIZE - REG_SIZE)
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259 }
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260 {
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261 /* Save incoming stack pointer in linkage area. */
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262 SW r10, sp
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263 .cfi_offset sp, -(CLOSURE_FRAME_SIZE - REG_SIZE)
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264 /* Push a new stack frame. */
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265 addli sp, sp, -CLOSURE_FRAME_SIZE
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266 .cfi_adjust_cfa_offset CLOSURE_FRAME_SIZE
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267 }
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268
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269 {
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270 /* Create pointer to where to start spilling registers. */
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271 addi r10, sp, LINKAGE_SIZE
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272 }
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273
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274 /* Spill all the incoming registers. */
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275 STORE_REG(r0, r10)
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276 STORE_REG(r1, r10)
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277 STORE_REG(r2, r10)
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278 STORE_REG(r3, r10)
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279 STORE_REG(r4, r10)
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280 STORE_REG(r5, r10)
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281 STORE_REG(r6, r10)
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282 STORE_REG(r7, r10)
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283 STORE_REG(r8, r10)
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284 {
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285 /* Save r9. */
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286 SW r10, r9
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287 #ifdef __tilegx__
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288 /* Pointer to closure is passed in r11. */
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289 move r0, r11
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290 #else
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291 /* Compute pointer to the closure object. Because the closure
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292 starts with a "jal ffi_closure_tile", we can just take the
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293 value of lr (a phony return address pointing into the closure)
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294 and subtract 8. */
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295 addi r0, lr, -8
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296 #endif
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297 /* Compute a pointer to the register arguments we just spilled. */
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298 addi r1, sp, LINKAGE_SIZE
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299 }
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300 {
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301 /* Compute a pointer to the extra stack arguments (if any). */
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302 addli r2, sp, CLOSURE_FRAME_SIZE + LINKAGE_SIZE
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303 /* Call C code to deal with all of the grotty details. */
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304 jal ffi_closure_tile_inner
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305 }
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306 {
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307 addli r10, sp, CLOSURE_FRAME_SIZE
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308 }
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309 {
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310 /* Restore the return address. */
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311 LW lr, r10
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312 /* Compute pointer to registers array. */
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313 addli r10, sp, LINKAGE_SIZE + (NUM_ARG_REGS * REG_SIZE)
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314 }
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315 /* Return all the register values, which C code may have set. */
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316 LOAD_REG(r0, r10)
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317 LOAD_REG(r1, r10)
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318 LOAD_REG(r2, r10)
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319 LOAD_REG(r3, r10)
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320 LOAD_REG(r4, r10)
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321 LOAD_REG(r5, r10)
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322 LOAD_REG(r6, r10)
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323 LOAD_REG(r7, r10)
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324 LOAD_REG(r8, r10)
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325 LOAD_REG(r9, r10)
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326 {
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327 /* Pop the frame. */
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328 addli sp, sp, CLOSURE_FRAME_SIZE
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329 jrp lr
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330 }
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331
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332 .cfi_endproc
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333 .size ffi_closure_tile, . - ffi_closure_tile
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334
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335
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336 /* What follows are code template instructions that get copied to the
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337 closure trampoline by ffi_prep_closure_loc. The zeroed operands
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338 get replaced by their proper values at runtime. */
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339
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340 .section .text.ffi_template_tramp_tile, "ax", @progbits
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341 .align 8
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342 .globl ffi_template_tramp_tile
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343 FFI_HIDDEN(ffi_template_tramp_tile)
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344 ffi_template_tramp_tile:
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345 #ifdef __tilegx__
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346 {
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347 moveli r11, 0 /* backpatched to address of containing closure. */
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348 moveli r10, 0 /* backpatched to ffi_closure_tile. */
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349 }
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350 /* Note: the following bundle gets generated multiple times
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351 depending on the pointer value (esp. useful for -m32 mode). */
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352 { shl16insli r11, r11, 0 ; shl16insli r10, r10, 0 }
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353 { info 2+8 /* for backtracer: -> pc in lr, frame size 0 */ ; jr r10 }
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354 #else
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355 /* 'jal .' yields a PC-relative offset of zero so we can OR in the
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356 right offset at runtime. */
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357 { move r10, lr ; jal . /* ffi_closure_tile */ }
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358 #endif
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359
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360 .size ffi_template_tramp_tile, . - ffi_template_tramp_tile
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