Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/h8300/h8300.h @ 145:1830386684a0
gcc-9.2.0
| author | anatofuz |
|---|---|
| date | Thu, 13 Feb 2020 11:34:05 +0900 |
| parents | 84e7813d76e9 |
| children |
| rev | line source |
|---|---|
| 0 | 1 /* Definitions of target machine for GNU compiler. |
| 2 Renesas H8/300 (generic) | |
| 145 | 3 Copyright (C) 1992-2020 Free Software Foundation, Inc. |
| 0 | 4 Contributed by Steve Chamberlain (sac@cygnus.com), |
| 5 Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com). | |
| 6 | |
| 7 This file is part of GCC. | |
| 8 | |
| 9 GCC is free software; you can redistribute it and/or modify | |
| 10 it under the terms of the GNU General Public License as published by | |
| 11 the Free Software Foundation; either version 3, or (at your option) | |
| 12 any later version. | |
| 13 | |
| 14 GCC is distributed in the hope that it will be useful, | |
| 15 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 GNU General Public License for more details. | |
| 18 | |
| 19 You should have received a copy of the GNU General Public License | |
| 20 along with GCC; see the file COPYING3. If not see | |
| 21 <http://www.gnu.org/licenses/>. */ | |
| 22 | |
| 23 #ifndef GCC_H8300_H | |
| 24 #define GCC_H8300_H | |
| 25 | |
| 26 /* Which CPU to compile for. | |
| 27 We use int for CPU_TYPE to avoid lots of casts. */ | |
| 28 #if 0 /* defined in insn-attr.h, here for documentation */ | |
| 29 enum attr_cpu { CPU_H8300, CPU_H8300H }; | |
| 30 #endif | |
| 31 extern int cpu_type; | |
| 32 | |
| 33 /* Various globals defined in h8300.c. */ | |
| 34 | |
| 35 extern const char *h8_push_op, *h8_pop_op, *h8_mov_op; | |
| 36 extern const char * const *h8_reg_names; | |
| 37 | |
| 38 /* Target CPU builtins. */ | |
| 39 #define TARGET_CPU_CPP_BUILTINS() \ | |
| 40 do \ | |
| 41 { \ | |
| 111 | 42 if (TARGET_H8300SX) \ |
| 0 | 43 { \ |
| 44 builtin_define ("__H8300SX__"); \ | |
| 45 if (TARGET_NORMAL_MODE) \ | |
| 46 { \ | |
| 47 builtin_define ("__NORMAL_MODE__"); \ | |
| 48 } \ | |
| 49 } \ | |
| 50 else if (TARGET_H8300S) \ | |
| 51 { \ | |
| 52 builtin_define ("__H8300S__"); \ | |
| 53 builtin_assert ("cpu=h8300s"); \ | |
| 54 builtin_assert ("machine=h8300s"); \ | |
| 55 if (TARGET_NORMAL_MODE) \ | |
| 56 { \ | |
| 57 builtin_define ("__NORMAL_MODE__"); \ | |
| 58 } \ | |
| 59 } \ | |
| 111 | 60 else if (TARGET_H8300H) \ |
| 61 { \ | |
| 62 builtin_define ("__H8300H__"); \ | |
| 63 builtin_assert ("cpu=h8300h"); \ | |
| 64 builtin_assert ("machine=h8300h"); \ | |
| 65 if (TARGET_NORMAL_MODE) \ | |
| 66 { \ | |
| 67 builtin_define ("__NORMAL_MODE__"); \ | |
| 68 } \ | |
| 69 } \ | |
| 0 | 70 else \ |
| 71 { \ | |
| 72 builtin_define ("__H8300__"); \ | |
| 73 builtin_assert ("cpu=h8300"); \ | |
| 74 builtin_assert ("machine=h8300"); \ | |
| 75 } \ | |
| 76 } \ | |
| 77 while (0) | |
| 78 | |
| 79 #define LINK_SPEC "%{mh:%{mn:-m h8300hn}} %{mh:%{!mn:-m h8300h}} %{ms:%{mn:-m h8300sn}} %{ms:%{!mn:-m h8300s}}" | |
| 80 | |
| 81 #define LIB_SPEC "%{mrelax:-relax} %{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}" | |
| 82 | |
| 83 /* Macros used in the machine description to test the flags. */ | |
| 84 | |
| 85 /* Select between the H8/300 and H8/300H CPUs. */ | |
| 86 #define TARGET_H8300 (! TARGET_H8300H && ! TARGET_H8300S) | |
| 87 #define TARGET_H8300S (TARGET_H8300S_1 || TARGET_H8300SX) | |
| 88 /* Some multiply instructions are not available in all H8SX variants. | |
| 89 Use this macro instead of TARGET_H8300SX to indicate this, even | |
| 90 though we don't actually generate different code for now. */ | |
| 91 #define TARGET_H8300SXMUL TARGET_H8300SX | |
| 92 | |
| 93 #ifdef IN_LIBGCC2 | |
| 94 #undef TARGET_H8300H | |
| 95 #undef TARGET_H8300S | |
| 96 #undef TARGET_NORMAL_MODE | |
| 97 /* If compiling libgcc2, make these compile time constants based on what | |
| 98 flags are we actually compiling with. */ | |
| 99 #ifdef __H8300H__ | |
| 100 #define TARGET_H8300H 1 | |
| 101 #else | |
| 102 #define TARGET_H8300H 0 | |
| 103 #endif | |
| 104 #ifdef __H8300S__ | |
| 105 #define TARGET_H8300S 1 | |
| 106 #else | |
| 107 #define TARGET_H8300S 0 | |
| 108 #endif | |
| 109 #ifdef __NORMAL_MODE__ | |
| 110 #define TARGET_NORMAL_MODE 1 | |
| 111 #else | |
| 112 #define TARGET_NORMAL_MODE 0 | |
| 113 #endif | |
| 114 #endif /* !IN_LIBGCC2 */ | |
| 115 | |
| 116 /* Default target_flags if no switches specified. */ | |
| 117 | |
| 118 #ifndef TARGET_DEFAULT | |
| 119 #define TARGET_DEFAULT (MASK_QUICKCALL) | |
| 120 #endif | |
| 121 | |
|
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122 /* We want dwarf2 info available to gdb. */ |
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123 #define DWARF2_DEBUGGING_INFO 1 |
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124 |
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125 /* The return address is pushed on the stack. */ |
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126 #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, STACK_POINTER_REGNUM)) |
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127 #define INCOMING_FRAME_SP_OFFSET (POINTER_SIZE / 8) |
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128 |
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129 #define DWARF_CIE_DATA_ALIGNMENT 2 |
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130 |
| 0 | 131 /* Define this if addresses of constant functions |
| 132 shouldn't be put through pseudo regs where they can be cse'd. | |
| 133 Desirable on machines where ordinary constants are expensive | |
| 134 but a CALL with constant address is cheap. | |
| 135 | |
| 136 Calls through a register are cheaper than calls to named | |
| 137 functions; however, the register pressure this causes makes | |
| 138 CSEing of function addresses generally a lose. */ | |
| 111 | 139 #define NO_FUNCTION_CSE 1 |
| 0 | 140 |
| 141 /* Target machine storage layout */ | |
| 142 | |
| 143 /* Define this if most significant bit is lowest numbered | |
| 144 in instructions that operate on numbered bit-fields. | |
| 145 This is not true on the H8/300. */ | |
| 146 #define BITS_BIG_ENDIAN 0 | |
| 147 | |
| 148 /* Define this if most significant byte of a word is the lowest numbered. */ | |
| 149 /* That is true on the H8/300. */ | |
| 150 #define BYTES_BIG_ENDIAN 1 | |
| 151 | |
| 152 /* Define this if most significant word of a multiword number is lowest | |
| 153 numbered. */ | |
| 154 #define WORDS_BIG_ENDIAN 1 | |
| 155 | |
| 156 #define MAX_BITS_PER_WORD 32 | |
| 157 | |
| 158 /* Width of a word, in units (bytes). */ | |
| 159 #define UNITS_PER_WORD (TARGET_H8300H || TARGET_H8300S ? 4 : 2) | |
| 160 #define MIN_UNITS_PER_WORD 2 | |
| 161 | |
| 162 #define SHORT_TYPE_SIZE 16 | |
| 163 #define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16) | |
| 164 #define LONG_TYPE_SIZE 32 | |
| 165 #define LONG_LONG_TYPE_SIZE 64 | |
| 166 #define FLOAT_TYPE_SIZE 32 | |
| 167 #define DOUBLE_TYPE_SIZE 32 | |
| 168 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE | |
| 169 | |
| 170 #define MAX_FIXED_MODE_SIZE 32 | |
| 171 | |
| 172 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
| 173 #define PARM_BOUNDARY (TARGET_H8300H || TARGET_H8300S ? 32 : 16) | |
| 174 | |
| 175 /* Allocation boundary (in *bits*) for the code of a function. */ | |
| 176 #define FUNCTION_BOUNDARY 16 | |
| 177 | |
| 178 /* Alignment of field after `int : 0' in a structure. */ | |
| 179 /* One can argue this should be 32 for -mint32, but since 32-bit ints only | |
| 180 need 16-bit alignment, this is left as is so that -mint32 doesn't change | |
| 181 structure layouts. */ | |
| 182 #define EMPTY_FIELD_BOUNDARY 16 | |
| 183 | |
| 184 /* No data type wants to be aligned rounder than this. | |
| 185 32-bit values are aligned as such on the H8/300H and H8S for speed. */ | |
| 186 #define BIGGEST_ALIGNMENT \ | |
| 187 (((TARGET_H8300H || TARGET_H8300S) && ! TARGET_ALIGN_300) ? 32 : 16) | |
| 188 | |
| 189 /* The stack goes in 16/32 bit lumps. */ | |
| 190 #define STACK_BOUNDARY (TARGET_H8300 ? 16 : 32) | |
| 191 | |
| 192 /* Define this if move instructions will actually fail to work | |
| 193 when given unaligned data. */ | |
| 194 /* On the H8/300, longs can be aligned on halfword boundaries, but not | |
| 195 byte boundaries. */ | |
| 196 #define STRICT_ALIGNMENT 1 | |
| 197 | |
| 198 /* Standard register usage. */ | |
| 199 | |
| 200 /* Number of actual hardware registers. | |
| 201 The hardware registers are assigned numbers for the compiler | |
| 202 from 0 to just below FIRST_PSEUDO_REGISTER. | |
| 203 | |
| 204 All registers that the compiler knows about must be given numbers, | |
| 205 even those that are not normally considered general registers. | |
| 206 | |
| 207 Reg 9 does not correspond to any hardware register, but instead | |
| 208 appears in the RTL as an argument pointer prior to reload, and is | |
| 209 eliminated during reloading in favor of either the stack or frame | |
| 210 pointer. */ | |
| 211 | |
| 212 #define FIRST_PSEUDO_REGISTER 12 | |
| 213 | |
| 214 /* 1 for registers that have pervasive standard uses | |
| 215 and are not available for the register allocator. */ | |
| 216 | |
| 217 #define FIXED_REGISTERS \ | |
| 218 /* r0 r1 r2 r3 r4 r5 r6 r7 mac ap rap fp */ \ | |
| 219 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1 } | |
| 220 | |
| 221 /* 1 for registers not available across function calls. | |
| 222 These must include the FIXED_REGISTERS and also any | |
| 223 registers that can be used without being saved. | |
| 224 The latter must include the registers where values are returned | |
| 225 and the register where structure-value addresses are passed. | |
| 226 Aside from that, you can include as many other registers as you | |
| 227 like. | |
| 228 | |
| 229 H8 destroys r0,r1,r2,r3. */ | |
| 230 | |
| 231 #define CALL_USED_REGISTERS \ | |
| 232 /* r0 r1 r2 r3 r4 r5 r6 r7 mac ap rap fp */ \ | |
| 233 { 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1 } | |
| 234 | |
| 235 #define REG_ALLOC_ORDER \ | |
| 236 /* r0 r1 r2 r3 r4 r5 r6 r7 mac ap rap fp */ \ | |
| 237 { 2, 3, 0, 1, 4, 5, 6, 8, 7, 9, 10, 11 } | |
| 238 | |
| 239 /* A C expression that is nonzero if hard register NEW_REG can be | |
| 240 considered for use as a rename register for OLD_REG register */ | |
| 241 | |
| 242 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ | |
| 243 h8300_hard_regno_rename_ok (OLD_REG, NEW_REG) | |
| 244 | |
| 245 /* Specify the registers used for certain standard purposes. | |
| 246 The values of these macros are register numbers. */ | |
| 247 | |
| 248 /* H8/300 pc is not overloaded on a register. */ | |
| 249 | |
| 250 /*#define PC_REGNUM 15*/ | |
| 251 | |
| 252 /* Register to use for pushing function arguments. */ | |
| 253 #define STACK_POINTER_REGNUM SP_REG | |
| 254 | |
| 255 /* Base register for access to local variables of the function. */ | |
| 256 #define HARD_FRAME_POINTER_REGNUM HFP_REG | |
| 257 | |
| 258 /* Base register for access to local variables of the function. */ | |
| 259 #define FRAME_POINTER_REGNUM FP_REG | |
| 260 | |
| 261 /* Base register for access to arguments of the function. */ | |
| 262 #define ARG_POINTER_REGNUM AP_REG | |
| 263 | |
| 264 /* Register in which static-chain is passed to a function. */ | |
| 265 #define STATIC_CHAIN_REGNUM SC_REG | |
| 266 | |
| 267 /* Fake register that holds the address on the stack of the | |
| 268 current function's return address. */ | |
| 269 #define RETURN_ADDRESS_POINTER_REGNUM RAP_REG | |
| 270 | |
| 271 /* A C expression whose value is RTL representing the value of the return | |
| 272 address for the frame COUNT steps up from the current frame. | |
| 273 FRAMEADDR is already the frame pointer of the COUNT frame, assuming | |
| 274 a stack layout with the frame pointer as the first saved register. */ | |
| 275 #define RETURN_ADDR_RTX(COUNT, FRAME) h8300_return_addr_rtx ((COUNT), (FRAME)) | |
| 276 | |
| 277 /* Define the classes of registers for register constraints in the | |
| 278 machine description. Also define ranges of constants. | |
| 279 | |
| 280 One of the classes must always be named ALL_REGS and include all hard regs. | |
| 281 If there is more than one class, another class must be named NO_REGS | |
| 282 and contain no registers. | |
| 283 | |
| 284 The name GENERAL_REGS must be the name of a class (or an alias for | |
| 285 another name such as ALL_REGS). This is the class of registers | |
| 286 that is allowed by "g" or "r" in a register constraint. | |
| 287 Also, registers outside this class are allocated only when | |
| 288 instructions express preferences for them. | |
| 289 | |
| 290 The classes must be numbered in nondecreasing order; that is, | |
| 291 a larger-numbered class must never be contained completely | |
| 292 in a smaller-numbered class. | |
| 293 | |
| 294 For any two classes, it is very desirable that there be another | |
| 295 class that represents their union. */ | |
| 296 | |
| 297 enum reg_class { | |
| 298 NO_REGS, COUNTER_REGS, SOURCE_REGS, DESTINATION_REGS, | |
| 299 GENERAL_REGS, MAC_REGS, ALL_REGS, LIM_REG_CLASSES | |
| 300 }; | |
| 301 | |
| 302 #define N_REG_CLASSES ((int) LIM_REG_CLASSES) | |
| 303 | |
| 304 /* Give names of register classes as strings for dump file. */ | |
| 305 | |
| 306 #define REG_CLASS_NAMES \ | |
| 307 { "NO_REGS", "COUNTER_REGS", "SOURCE_REGS", "DESTINATION_REGS", \ | |
| 308 "GENERAL_REGS", "MAC_REGS", "ALL_REGS", "LIM_REGS" } | |
| 309 | |
| 310 /* Define which registers fit in which classes. | |
| 311 This is an initializer for a vector of HARD_REG_SET | |
| 312 of length N_REG_CLASSES. */ | |
| 313 | |
| 314 #define REG_CLASS_CONTENTS \ | |
| 315 { {0}, /* No regs */ \ | |
| 316 {0x010}, /* COUNTER_REGS */ \ | |
| 317 {0x020}, /* SOURCE_REGS */ \ | |
| 318 {0x040}, /* DESTINATION_REGS */ \ | |
| 319 {0xeff}, /* GENERAL_REGS */ \ | |
| 320 {0x100}, /* MAC_REGS */ \ | |
| 321 {0xfff}, /* ALL_REGS */ \ | |
| 322 } | |
| 323 | |
| 324 /* The same information, inverted: | |
| 325 Return the class number of the smallest class containing | |
| 326 reg number REGNO. This could be a conditional expression | |
| 327 or could index an array. */ | |
| 328 | |
| 329 #define REGNO_REG_CLASS(REGNO) \ | |
| 330 ((REGNO) == MAC_REG ? MAC_REGS \ | |
| 331 : (REGNO) == COUNTER_REG ? COUNTER_REGS \ | |
| 332 : (REGNO) == SOURCE_REG ? SOURCE_REGS \ | |
| 333 : (REGNO) == DESTINATION_REG ? DESTINATION_REGS \ | |
| 334 : GENERAL_REGS) | |
| 335 | |
| 336 /* The class value for index registers, and the one for base regs. */ | |
| 337 | |
| 338 #define INDEX_REG_CLASS (TARGET_H8300SX ? GENERAL_REGS : NO_REGS) | |
| 339 #define BASE_REG_CLASS GENERAL_REGS | |
| 340 | |
| 341 /* Stack layout; function entry, exit and calling. */ | |
| 342 | |
| 343 /* Define this if pushing a word on the stack | |
| 344 makes the stack pointer a smaller address. */ | |
| 345 | |
| 111 | 346 #define STACK_GROWS_DOWNWARD 1 |
| 0 | 347 |
| 348 /* Define this to nonzero if the nominal address of the stack frame | |
| 349 is at the high-address end of the local variables; | |
| 350 that is, each additional local variable allocated | |
| 351 goes at a more negative offset in the frame. */ | |
| 352 | |
| 353 #define FRAME_GROWS_DOWNWARD 1 | |
| 354 | |
| 131 | 355 #define PUSH_ROUNDING(BYTES) h8300_push_rounding (BYTES) |
| 0 | 356 |
| 357 /* Offset of first parameter from the argument pointer register value. */ | |
| 358 /* Is equal to the size of the saved fp + pc, even if an fp isn't | |
| 359 saved since the value is used before we know. */ | |
| 360 | |
| 361 #define FIRST_PARM_OFFSET(FNDECL) 0 | |
| 362 | |
| 363 /* Definitions for register eliminations. | |
| 364 | |
| 365 This is an array of structures. Each structure initializes one pair | |
| 366 of eliminable registers. The "from" register number is given first, | |
| 367 followed by "to". Eliminations of the same "from" register are listed | |
| 368 in order of preference. | |
| 369 | |
| 370 We have three registers that can be eliminated on the h8300. | |
| 371 First, the frame pointer register can often be eliminated in favor | |
| 372 of the stack pointer register. Secondly, the argument pointer | |
| 373 register and the return address pointer register are always | |
| 374 eliminated; they are replaced with either the stack or frame | |
| 375 pointer. */ | |
| 376 | |
| 377 #define ELIMINABLE_REGS \ | |
| 378 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
| 379 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
| 380 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
| 381 { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
| 382 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
| 383 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} | |
| 384 | |
| 385 /* Define the offset between two registers, one to be eliminated, and the other | |
| 386 its replacement, at the start of a routine. */ | |
| 387 | |
| 388 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
| 389 ((OFFSET) = h8300_initial_elimination_offset ((FROM), (TO))) | |
| 390 | |
| 391 /* Define this if PCC uses the nonreentrant convention for returning | |
| 392 structure and union values. */ | |
| 393 | |
| 394 /*#define PCC_STATIC_STRUCT_RETURN*/ | |
| 395 | |
| 396 /* 1 if N is a possible register number for function argument passing. | |
| 397 On the H8, no registers are used in this way. */ | |
| 398 | |
| 399 #define FUNCTION_ARG_REGNO_P(N) (TARGET_QUICKCALL ? N < 3 : 0) | |
| 400 | |
|
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401 /* When this hook returns true for MODE, the compiler allows |
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402 registers explicitly used in the rtl to be used as spill registers |
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403 but prevents the compiler from extending the lifetime of these |
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404 registers. */ |
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405 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
| 0 | 406 |
| 407 /* Define a data type for recording info about an argument list | |
| 408 during the scan of that argument list. This data type should | |
| 409 hold all necessary information about the function itself | |
| 410 and about the args processed so far, enough to enable macros | |
| 411 such as FUNCTION_ARG to determine where the next arg should go. | |
| 412 | |
| 413 On the H8/300, this is a two item struct, the first is the number | |
| 414 of bytes scanned so far and the second is the rtx of the called | |
| 415 library function if any. */ | |
| 416 | |
| 417 #define CUMULATIVE_ARGS struct cum_arg | |
| 418 struct cum_arg | |
| 419 { | |
| 420 int nbytes; | |
| 111 | 421 rtx libcall; |
| 0 | 422 }; |
| 423 | |
| 424 /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
| 425 for a call to a function whose data type is FNTYPE. | |
| 426 For a library call, FNTYPE is 0. | |
| 427 | |
| 428 On the H8/300, the offset starts at 0. */ | |
| 429 | |
| 430 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ | |
| 431 ((CUM).nbytes = 0, (CUM).libcall = LIBNAME) | |
| 432 | |
| 433 /* Output assembler code to FILE to increment profiler label # LABELNO | |
| 434 for profiling a function entry. */ | |
| 435 | |
| 436 #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
| 145 | 437 fprintf (FILE, "\t%s\t#.LP%d,%s\n\tjsr @mcount\n", \ |
| 0 | 438 h8_mov_op, (LABELNO), h8_reg_names[0]); |
| 439 | |
| 440 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
| 441 the stack pointer does not matter. The value is tested only in | |
| 442 functions that have frame pointers. | |
| 443 No definition is equivalent to always zero. */ | |
| 444 | |
| 445 #define EXIT_IGNORE_STACK 0 | |
| 446 | |
| 447 /* Length in units of the trampoline for entering a nested function. */ | |
| 448 | |
| 449 #define TRAMPOLINE_SIZE ((Pmode == HImode) ? 8 : 12) | |
| 450 | |
| 451 /* Addressing modes, and classification of registers for them. */ | |
| 452 | |
| 453 #define HAVE_POST_INCREMENT 1 | |
| 454 #define HAVE_PRE_DECREMENT 1 | |
| 455 #define HAVE_POST_DECREMENT TARGET_H8300SX | |
| 456 #define HAVE_PRE_INCREMENT TARGET_H8300SX | |
| 457 | |
| 458 /* Macros to check register numbers against specific register classes. */ | |
| 459 | |
| 460 /* These assume that REGNO is a hard or pseudo reg number. | |
| 461 They give nonzero only if REGNO is a hard reg of the suitable class | |
| 462 or a pseudo reg currently allocated to a suitable hard reg. | |
| 463 Since they use reg_renumber, they are safe only once reg_renumber | |
| 111 | 464 has been allocated, which happens in reginfo.c during register |
| 465 allocation. */ | |
| 0 | 466 |
| 467 #define REGNO_OK_FOR_INDEX_P(regno) 0 | |
| 468 | |
| 469 #define REGNO_OK_FOR_BASE_P(regno) \ | |
| 470 (((regno) < FIRST_PSEUDO_REGISTER && regno != MAC_REG) \ | |
| 471 || reg_renumber[regno] >= 0) | |
| 472 | |
| 473 /* Maximum number of registers that can appear in a valid memory address. */ | |
| 474 | |
| 475 #define MAX_REGS_PER_ADDRESS 1 | |
| 476 | |
| 477 /* 1 if X is an rtx for a constant that is a valid address. */ | |
| 478 | |
| 479 #define CONSTANT_ADDRESS_P(X) \ | |
| 480 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
| 481 || (GET_CODE (X) == CONST_INT \ | |
| 482 /* We handle signed and unsigned offsets here. */ \ | |
| 483 && INTVAL (X) > (TARGET_H8300 ? -0x10000 : -0x1000000) \ | |
| 484 && INTVAL (X) < (TARGET_H8300 ? 0x10000 : 0x1000000)) \ | |
| 485 || (GET_CODE (X) == HIGH || GET_CODE (X) == CONST)) | |
| 486 | |
| 487 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
| 488 and check its validity for a certain class. | |
| 489 We have two alternate definitions for each of them. | |
| 490 The usual definition accepts all pseudo regs; the other rejects | |
| 491 them unless they have been allocated suitable hard regs. | |
| 492 The symbol REG_OK_STRICT causes the latter definition to be used. | |
| 493 | |
| 494 Most source files want to accept pseudo regs in the hope that | |
| 495 they will get allocated to the class that the insn wants them to be in. | |
| 496 Source files for reload pass need to be strict. | |
| 497 After reload, it makes no difference, since pseudo regs have | |
| 498 been eliminated by then. */ | |
| 499 | |
| 500 /* Non-strict versions. */ | |
| 501 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) 0 | |
| 502 /* Don't use REGNO_OK_FOR_BASE_P here because it uses reg_renumber. */ | |
| 503 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \ | |
| 504 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REGNO (X) != MAC_REG) | |
| 505 | |
| 506 /* Strict versions. */ | |
| 507 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
| 508 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
| 509 | |
| 510 #ifndef REG_OK_STRICT | |
| 511 | |
| 512 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X) | |
| 513 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P (X) | |
| 514 | |
| 515 #else | |
| 516 | |
| 517 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P (X) | |
| 518 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X) | |
| 519 | |
| 520 #endif | |
| 521 | |
| 522 | |
| 523 /* Specify the machine mode that this machine uses | |
| 524 for the index in the tablejump instruction. */ | |
| 525 #define CASE_VECTOR_MODE Pmode | |
| 526 | |
| 527 /* Define this as 1 if `char' should by default be signed; else as 0. | |
| 528 | |
| 529 On the H8/300, sign extension is expensive, so we'll say that chars | |
| 530 are unsigned. */ | |
| 531 #define DEFAULT_SIGNED_CHAR 0 | |
| 532 | |
| 533 /* Max number of bytes we can move from memory to memory | |
| 534 in one reasonably fast instruction. */ | |
| 535 #define MOVE_MAX (TARGET_H8300H || TARGET_H8300S ? 4 : 2) | |
| 536 #define MAX_MOVE_MAX 4 | |
| 537 | |
| 538 /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
| 539 #define SLOW_BYTE_ACCESS TARGET_SLOWBYTE | |
| 540 | |
| 541 /* Define if shifts truncate the shift count | |
| 542 which implies one can omit a sign-extension or zero-extension | |
| 543 of a shift count. */ | |
| 544 /* #define SHIFT_COUNT_TRUNCATED */ | |
| 545 | |
| 546 /* Specify the machine mode that pointers have. | |
| 547 After generation of rtl, the compiler makes no further distinction | |
| 548 between pointers and any other objects of this machine mode. */ | |
| 549 #define Pmode \ | |
| 550 ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? SImode : HImode) | |
| 551 | |
| 552 /* ANSI C types. | |
| 553 We use longs for the H8/300H and the H8S because ints can be 16 or 32. | |
| 554 GCC requires SIZE_TYPE to be the same size as pointers. */ | |
| 555 #define SIZE_TYPE \ | |
| 556 (TARGET_H8300 || TARGET_NORMAL_MODE ? TARGET_INT32 ? "short unsigned int" : "unsigned int" : "long unsigned int") | |
| 557 #define PTRDIFF_TYPE \ | |
| 558 (TARGET_H8300 || TARGET_NORMAL_MODE ? TARGET_INT32 ? "short int" : "int" : "long int") | |
| 559 | |
| 560 #define POINTER_SIZE \ | |
| 561 ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? 32 : 16) | |
| 562 | |
| 563 #define WCHAR_TYPE "short unsigned int" | |
| 564 #define WCHAR_TYPE_SIZE 16 | |
| 565 | |
| 566 /* A function address in a call instruction | |
| 567 is a byte address (for indexing purposes) | |
| 568 so give the MEM rtx a byte's mode. */ | |
| 569 #define FUNCTION_MODE QImode | |
| 570 | |
| 571 /* Return the length of JUMP's delay slot insn (0 if it has none). | |
| 572 If JUMP is a delayed branch, NEXT_INSN (PREV_INSN (JUMP)) will | |
| 573 be the containing SEQUENCE, not JUMP itself. */ | |
| 574 #define DELAY_SLOT_LENGTH(JUMP) \ | |
| 575 (NEXT_INSN (PREV_INSN (JUMP)) == JUMP ? 0 : 2) | |
| 576 | |
| 577 #define BRANCH_COST(speed_p, predictable_p) 0 | |
| 578 | |
| 579 /* Tell final.c how to eliminate redundant test instructions. */ | |
| 580 | |
| 581 /* Here we define machine-dependent flags and fields in cc_status | |
| 582 (see `conditions.h'). No extra ones are needed for the h8300. */ | |
| 583 | |
| 584 /* Store in cc_status the expressions | |
| 585 that the condition codes will describe | |
| 586 after execution of an instruction whose pattern is EXP. | |
| 587 Do not alter them if the instruction would not alter the cc's. */ | |
| 588 | |
| 589 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc (EXP, INSN) | |
| 590 | |
| 591 /* The add insns don't set overflow in a usable way. */ | |
| 592 #define CC_OVERFLOW_UNUSABLE 01000 | |
| 593 /* The mov,and,or,xor insns don't set carry. That's OK though as the | |
| 594 Z bit is all we need when doing unsigned comparisons on the result of | |
| 595 these insns (since they're always with 0). However, conditions.h has | |
| 596 CC_NO_OVERFLOW defined for this purpose. Rename it to something more | |
| 597 understandable. */ | |
| 598 #define CC_NO_CARRY CC_NO_OVERFLOW | |
| 599 | |
| 600 /* Control the assembler format that we output. */ | |
| 601 | |
| 602 /* Output to assembler file text saying following lines | |
| 603 may contain character constants, extra white space, comments, etc. */ | |
| 604 | |
| 605 #define ASM_APP_ON "; #APP\n" | |
| 606 | |
| 607 /* Output to assembler file text saying following lines | |
| 608 no longer contain unusual constructs. */ | |
| 609 | |
| 610 #define ASM_APP_OFF "; #NO_APP\n" | |
| 611 | |
| 612 #define FILE_ASM_OP "\t.file\n" | |
| 613 | |
| 614 /* The assembler op to get a word, 2 bytes for the H8/300, 4 for H8/300H. */ | |
| 615 #define ASM_WORD_OP \ | |
| 616 (TARGET_H8300 || TARGET_NORMAL_MODE ? "\t.word\t" : "\t.long\t") | |
| 617 | |
| 618 #define TEXT_SECTION_ASM_OP "\t.section .text" | |
| 619 #define DATA_SECTION_ASM_OP "\t.section .data" | |
| 620 #define BSS_SECTION_ASM_OP "\t.section .bss" | |
| 621 | |
| 622 #undef DO_GLOBAL_CTORS_BODY | |
| 623 #define DO_GLOBAL_CTORS_BODY \ | |
| 624 { \ | |
| 625 extern func_ptr __ctors[]; \ | |
| 626 extern func_ptr __ctors_end[]; \ | |
| 627 func_ptr *p; \ | |
| 628 for (p = __ctors_end; p > __ctors; ) \ | |
| 629 { \ | |
| 630 (*--p)(); \ | |
| 631 } \ | |
| 632 } | |
| 633 | |
| 634 #undef DO_GLOBAL_DTORS_BODY | |
| 635 #define DO_GLOBAL_DTORS_BODY \ | |
| 636 { \ | |
| 637 extern func_ptr __dtors[]; \ | |
| 638 extern func_ptr __dtors_end[]; \ | |
| 639 func_ptr *p; \ | |
| 640 for (p = __dtors; p < __dtors_end; p++) \ | |
| 641 { \ | |
| 642 (*p)(); \ | |
| 643 } \ | |
| 644 } | |
| 645 | |
| 646 /* How to refer to registers in assembler output. | |
| 647 This sequence is indexed by compiler's hard-register-number (see above). */ | |
| 648 | |
| 649 #define REGISTER_NAMES \ | |
| 650 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "sp", "mac", "ap", "rap", "fp" } | |
| 651 | |
| 652 #define ADDITIONAL_REGISTER_NAMES \ | |
| 653 { {"er0", 0}, {"er1", 1}, {"er2", 2}, {"er3", 3}, {"er4", 4}, \ | |
| 654 {"er5", 5}, {"er6", 6}, {"er7", 7}, {"r7", 7} } | |
| 655 | |
| 656 /* Globalizing directive for a label. */ | |
| 657 #define GLOBAL_ASM_OP "\t.global " | |
| 658 | |
| 659 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ | |
| 660 ASM_OUTPUT_LABEL (FILE, NAME) | |
| 661 | |
| 662 /* The prefix to add to user-visible assembler symbols. */ | |
| 663 | |
| 664 #define USER_LABEL_PREFIX "_" | |
| 665 | |
| 666 /* This is how to store into the string LABEL | |
| 667 the symbol_ref name of an internal numbered label where | |
| 668 PREFIX is the class of label and NUM is the number within the class. | |
| 669 This is suitable for output with `assemble_name'. | |
| 670 | |
| 671 N.B.: The h8300.md branch_true and branch_false patterns also know | |
| 672 how to generate internal labels. */ | |
| 673 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ | |
| 674 sprintf (LABEL, "*.%s%lu", PREFIX, (unsigned long)(NUM)) | |
| 675 | |
| 676 /* This is how to output an insn to push a register on the stack. | |
| 677 It need not be very fast code. */ | |
| 678 | |
| 679 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \ | |
| 680 fprintf (FILE, "\t%s\t%s\n", h8_push_op, h8_reg_names[REGNO]) | |
| 681 | |
| 682 /* This is how to output an insn to pop a register from the stack. | |
| 683 It need not be very fast code. */ | |
| 684 | |
| 685 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \ | |
| 686 fprintf (FILE, "\t%s\t%s\n", h8_pop_op, h8_reg_names[REGNO]) | |
| 687 | |
| 688 /* This is how to output an element of a case-vector that is absolute. */ | |
| 689 | |
| 690 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
| 691 fprintf (FILE, "%s.L%d\n", ASM_WORD_OP, VALUE) | |
| 692 | |
| 693 /* This is how to output an element of a case-vector that is relative. */ | |
| 694 | |
| 695 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ | |
| 696 fprintf (FILE, "%s.L%d-.L%d\n", ASM_WORD_OP, VALUE, REL) | |
| 697 | |
| 698 /* This is how to output an assembler line | |
| 699 that says to advance the location counter | |
| 700 to a multiple of 2**LOG bytes. */ | |
| 701 | |
| 702 #define ASM_OUTPUT_ALIGN(FILE, LOG) \ | |
| 703 if ((LOG) != 0) \ | |
| 704 fprintf (FILE, "\t.align %d\n", (LOG)) | |
| 705 | |
| 706 #define ASM_OUTPUT_SKIP(FILE, SIZE) \ | |
| 707 fprintf (FILE, "\t.space %d\n", (int)(SIZE)) | |
| 708 | |
| 709 /* This says how to output an assembler line | |
| 710 to define a global common symbol. */ | |
| 711 | |
| 712 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
| 713 ( fputs ("\t.comm ", (FILE)), \ | |
| 714 assemble_name ((FILE), (NAME)), \ | |
| 715 fprintf ((FILE), ",%lu\n", (unsigned long)(SIZE))) | |
| 716 | |
| 717 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ | |
| 718 asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN) | |
| 719 | |
| 720 /* This says how to output an assembler line | |
| 721 to define a local common symbol. */ | |
| 722 | |
| 723 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ | |
| 724 ( fputs ("\t.lcomm ", (FILE)), \ | |
| 725 assemble_name ((FILE), (NAME)), \ | |
| 726 fprintf ((FILE), ",%d\n", (int)(SIZE))) | |
| 727 | |
| 728 #define ASM_PN_FORMAT "%s___%lu" | |
| 729 | |
| 730 /* H8300 specific pragmas. */ | |
| 731 #define REGISTER_TARGET_PRAGMAS() \ | |
| 732 do \ | |
| 733 { \ | |
| 734 c_register_pragma (0, "saveall", h8300_pr_saveall); \ | |
| 735 c_register_pragma (0, "interrupt", h8300_pr_interrupt); \ | |
| 736 } \ | |
| 737 while (0) | |
| 738 | |
| 739 #define FINAL_PRESCAN_INSN(insn, operand, nop) \ | |
| 740 final_prescan_insn (insn, operand, nop) | |
| 741 | |
| 742 extern int h8300_move_ratio; | |
| 743 #define MOVE_RATIO(speed) h8300_move_ratio | |
| 744 | |
| 745 /* Machine-specific symbol_ref flags. */ | |
| 746 #define SYMBOL_FLAG_FUNCVEC_FUNCTION (SYMBOL_FLAG_MACH_DEP << 0) | |
| 747 #define SYMBOL_FLAG_EIGHTBIT_DATA (SYMBOL_FLAG_MACH_DEP << 1) | |
| 748 #define SYMBOL_FLAG_TINY_DATA (SYMBOL_FLAG_MACH_DEP << 2) | |
| 749 | |
| 750 #endif /* ! GCC_H8300_H */ |