Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/m32c/m32c.md @ 145:1830386684a0
gcc-9.2.0
author | anatofuz |
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date | Thu, 13 Feb 2020 11:34:05 +0900 |
parents | 84e7813d76e9 |
children |
rev | line source |
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0 | 1 ;; Machine Descriptions for R8C/M16C/M32C |
145 | 2 ;; Copyright (C) 2005-2020 Free Software Foundation, Inc. |
0 | 3 ;; Contributed by Red Hat. |
4 ;; | |
5 ;; This file is part of GCC. | |
6 ;; | |
7 ;; GCC is free software; you can redistribute it and/or modify it | |
8 ;; under the terms of the GNU General Public License as published | |
9 ;; by the Free Software Foundation; either version 3, or (at your | |
10 ;; option) any later version. | |
11 ;; | |
12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT | |
13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 ;; License for more details. | |
16 ;; | |
17 ;; You should have received a copy of the GNU General Public License | |
18 ;; along with GCC; see the file COPYING3. If not see | |
19 ;; <http://www.gnu.org/licenses/>. | |
20 | |
21 (define_constants | |
22 [(R0_REGNO 0) | |
23 (R2_REGNO 1) | |
24 (R1_REGNO 2) | |
25 (R3_REGNO 3) | |
26 | |
27 (A0_REGNO 4) | |
28 (A1_REGNO 5) | |
29 (SB_REGNO 6) | |
30 (FB_REGNO 7) | |
31 | |
32 (SP_REGNO 8) | |
33 (PC_REGNO 9) | |
34 (FLG_REGNO 10) | |
35 (MEM0_REGNO 12) | |
36 (MEM7_REGNO 19) | |
37 ]) | |
38 | |
39 (define_constants | |
40 [(UNS_PROLOGUE_END 1) | |
41 (UNS_EPILOGUE_START 2) | |
42 (UNS_EH_EPILOGUE 3) | |
43 (UNS_PUSHM 4) | |
44 (UNS_POPM 5) | |
45 (UNS_SMOVF 6) | |
46 (UNS_SSTR 7) | |
47 (UNS_SCMPU 8) | |
48 (UNS_SMOVU 9) | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
49 (UNS_FSETB 10) |
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
50 (UNS_FREIT 11) |
0 | 51 ]) |
52 | |
53 ;; n = no change, x = clobbered. The first 16 values are chosen such | |
54 ;; that the enum has one bit set for each flag. | |
55 (define_attr "flags" "x,c,z,zc,s,sc,sz,szc,o,oc,oz,ozc,os,osc,osz,oszc,n" (const_string "n")) | |
56 (define_asm_attributes [(set_attr "flags" "x")]) | |
57 | |
58 (define_mode_iterator QHI [QI HI]) | |
59 (define_mode_iterator HPSI [(HI "TARGET_A16") (PSI "TARGET_A24")]) | |
60 (define_mode_iterator QHPSI [QI HI (PSI "TARGET_A24")]) | |
61 (define_mode_iterator QHSI [QI HI (SI "TARGET_A24")]) | |
62 (define_mode_attr bwl [(QI "b") (HI "w") (PSI "l") (SI "l")]) | |
63 | |
64 (define_code_iterator eqne_cond [eq ne]) | |
65 | |
66 | |
67 (define_insn "nop" | |
68 [(const_int 0)] | |
69 "" | |
70 "nop" | |
71 [(set_attr "flags" "n")] | |
72 ) | |
73 | |
74 (define_insn "no_insn" | |
75 [(const_int 1)] | |
76 "" | |
77 "" | |
78 [(set_attr "flags" "n")] | |
79 ) |