Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/mips/sde.h @ 145:1830386684a0
gcc-9.2.0
| author | anatofuz |
|---|---|
| date | Thu, 13 Feb 2020 11:34:05 +0900 |
| parents | 84e7813d76e9 |
| children |
| rev | line source |
|---|---|
| 0 | 1 /* Definitions of target machine for GNU compiler. |
| 2 MIPS SDE version. | |
| 145 | 3 Copyright (C) 2003-2020 Free Software Foundation, Inc. |
| 0 | 4 |
| 5 This file is part of GCC. | |
| 6 | |
| 7 GCC is free software; you can redistribute it and/or modify | |
| 8 it under the terms of the GNU General Public License as published by | |
| 9 the Free Software Foundation; either version 3, or (at your option) | |
| 10 any later version. | |
| 11 | |
| 12 GCC is distributed in the hope that it will be useful, | |
| 13 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 GNU General Public License for more details. | |
| 16 | |
| 17 You should have received a copy of the GNU General Public License | |
| 18 along with GCC; see the file COPYING3. If not see | |
| 19 <http://www.gnu.org/licenses/>. */ | |
| 20 | |
| 21 #undef DRIVER_SELF_SPECS | |
| 22 #define DRIVER_SELF_SPECS \ | |
| 111 | 23 /* Set the ISA for the default multilib. */ \ |
| 24 MIPS_DEFAULT_ISA_LEVEL_SPEC, \ | |
| 25 \ | |
| 0 | 26 /* Make sure a -mips option is present. This helps us to pick \ |
| 27 the right multilib, and also makes the later specs easier \ | |
| 28 to write. */ \ | |
| 29 MIPS_ISA_LEVEL_SPEC, \ | |
| 30 \ | |
| 31 /* Infer the default float setting from -march. */ \ | |
| 32 MIPS_ARCH_FLOAT_SPEC, \ | |
| 33 \ | |
| 34 /* If no ABI option is specified, infer one from the ISA level \ | |
| 35 or -mgp setting. */ \ | |
| 36 "%{!mabi=*: %{" MIPS_32BIT_OPTION_SPEC ": -mabi=32;: -mabi=n32}}", \ | |
| 37 \ | |
| 38 /* Remove a redundant -mfp64 for -mabi=n32; we want the !mfp64 \ | |
| 39 multilibs. There's no need to check whether the architecture \ | |
| 40 is 64-bit; cc1 will complain if it isn't. */ \ | |
| 41 "%{mabi=n32: %<mfp64}", \ | |
| 42 \ | |
| 43 /* Make sure that an endian option is always present. This makes \ | |
| 44 things like LINK_SPEC easier to write. */ \ | |
| 45 "%{!EB:%{!EL:%(endian_spec)}}", \ | |
| 46 \ | |
| 47 /* Configuration-independent MIPS rules. */ \ | |
| 48 BASE_DRIVER_SELF_SPECS | |
| 49 | |
| 50 /* Use trap rather than break for all but MIPS I ISA. Force -no-mips16, | |
| 51 so that MIPS16 assembler code requires an explicit ".set mips16". | |
| 52 Very little hand-written MIPS16 assembler exists, and some build | |
| 53 systems expect code to be assembled as non-MIPS16 even if the | |
| 54 prevailing compiler flags select -mips16. */ | |
| 55 #undef SUBTARGET_ASM_SPEC | |
| 56 #define SUBTARGET_ASM_SPEC "\ | |
| 57 %{!mips1:--trap} \ | |
| 58 %{mips16:-no-mips16}" | |
| 59 | |
| 60 #undef LINK_SPEC | |
| 61 #define LINK_SPEC "\ | |
| 62 %(endian_spec) \ | |
| 63 %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32*} %{mips64*} \ | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
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64 %{shared} \ |
| 0 | 65 %{mabi=n32:-melf32%{EB:b}%{EL:l}tsmipn32} \ |
| 66 %{mabi=64:-melf64%{EB:b}%{EL:l}tsmip} \ | |
| 67 %{mabi=32:-melf32%{EB:b}%{EL:l}tsmip}" | |
| 68 | |
| 69 #undef DEFAULT_SIGNED_CHAR | |
| 70 #define DEFAULT_SIGNED_CHAR 0 | |
| 71 | |
| 72 /* Describe how we implement __builtin_eh_return. */ | |
| 73 | |
| 74 /* At the moment, nothing appears to use more than 2 EH data registers. | |
| 75 The chosen registers must not clash with the return register ($2), | |
| 76 EH_RETURN_STACKADJ ($3), or MIPS_EPILOGUE_TEMP ($5), and they must | |
| 77 be general MIPS16 registers. Pick $6 and $7. */ | |
| 78 #undef EH_RETURN_DATA_REGNO | |
| 79 #define EH_RETURN_DATA_REGNO(N) \ | |
| 80 ((N) < 2 ? 7 - (N) : INVALID_REGNUM) | |
| 81 | |
| 82 /* Use $5 as a temporary for both MIPS16 and non-MIPS16. */ | |
| 83 #undef MIPS_EPILOGUE_TEMP_REGNUM | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
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changeset
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84 #define MIPS_EPILOGUE_TEMP_REGNUM \ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
85 (cfun->machine->interrupt_handler_p ? K0_REG_NUM : GP_REG_FIRST + 5) |
| 0 | 86 |
| 87 /* Using long will always be right for size_t and ptrdiff_t, since | |
| 88 sizeof(long) must equal sizeof(void *), following from the setting | |
| 89 of the -mlong64 option. */ | |
| 90 #undef SIZE_TYPE | |
| 91 #define SIZE_TYPE "long unsigned int" | |
| 92 #undef PTRDIFF_TYPE | |
| 93 #define PTRDIFF_TYPE "long int" | |
| 94 | |
| 95 /* Force all .init and .fini entries to be 32-bit, not mips16, so that | |
| 96 in a mixed environment they are all the same mode. The crti.asm and | |
| 97 crtn.asm files will also be compiled as 32-bit due to the | |
| 98 -no-mips16 flag in SUBTARGET_ASM_SPEC above. */ | |
| 99 #undef CRT_CALL_STATIC_FUNCTION | |
| 100 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \ | |
| 101 asm (SECTION_OP "\n\ | |
| 102 .set push\n\ | |
| 103 .set nomips16\n\ | |
| 104 jal " USER_LABEL_PREFIX #FUNC "\n\ | |
| 105 .set pop\n\ | |
| 106 " TEXT_SECTION_ASM_OP); |