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152
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1 ;; -----------------------------------------------------------------
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2 ;; PEEPHOLE PATTERNS
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3 ;; -----------------------------------------------------------------
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4
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5 ;; Convert (A >> B) & C to (A & 255) >> B if C == 255 >> B.
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6
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7 (define_peephole2
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8 [(parallel [(set (match_operand:HI 0 "register_operand" "")
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9 (lshiftrt:HI (match_dup 0)
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10 (match_operand:HI 1 "const_int_operand" "")))
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11 (clobber (match_operand:HI 2 "" ""))])
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12 (set (match_dup 0)
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13 (and:HI (match_dup 0)
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14 (match_operand:HI 3 "const_int_operand" "")))]
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15 "INTVAL (operands[3]) == (255 >> INTVAL (operands[1]))"
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16 [(set (match_dup 0)
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17 (and:HI (match_dup 0)
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18 (const_int 255)))
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19 (parallel [(set (match_dup 0)
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20 (lshiftrt:HI (match_dup 0) (match_dup 1)))
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21 (clobber (match_dup 2))])]
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22 "")
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23
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24 ;; Convert (A << B) & C to (A & 255) << B if C == 255 << B.
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25
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26 (define_peephole2
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27 [(parallel [(set (match_operand:HI 0 "register_operand" "")
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28 (ashift:HI (match_dup 0)
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29 (match_operand:HI 1 "const_int_operand" "")))
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30 (clobber (match_operand:HI 2 "" ""))])
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31 (set (match_dup 0)
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32 (and:HI (match_dup 0)
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33 (match_operand:HI 3 "const_int_operand" "")))]
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34 "INTVAL (operands[3]) == (255 << INTVAL (operands[1]))"
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35 [(set (match_dup 0)
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36 (and:HI (match_dup 0)
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37 (const_int 255)))
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38 (parallel [(set (match_dup 0)
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39 (ashift:HI (match_dup 0) (match_dup 1)))
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40 (clobber (match_dup 2))])]
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41 "")
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42
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43 ;; Convert (A >> B) & C to (A & 255) >> B if C == 255 >> B.
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44
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45 (define_peephole2
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46 [(parallel [(set (match_operand:SI 0 "register_operand" "")
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47 (lshiftrt:SI (match_dup 0)
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48 (match_operand:SI 1 "const_int_operand" "")))
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49 (clobber (match_operand:SI 2 "" ""))])
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50 (set (match_dup 0)
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51 (and:SI (match_dup 0)
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52 (match_operand:SI 3 "const_int_operand" "")))]
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53 "INTVAL (operands[3]) == (255 >> INTVAL (operands[1]))"
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54 [(set (match_dup 0)
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55 (and:SI (match_dup 0)
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56 (const_int 255)))
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57 (parallel [(set (match_dup 0)
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58 (lshiftrt:SI (match_dup 0) (match_dup 1)))
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59 (clobber (match_dup 2))])]
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60 "")
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61
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62 ;; Convert (A << B) & C to (A & 255) << B if C == 255 << B.
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63
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64 (define_peephole2
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65 [(parallel [(set (match_operand:SI 0 "register_operand" "")
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66 (ashift:SI (match_dup 0)
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67 (match_operand:SI 1 "const_int_operand" "")))
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68 (clobber (match_operand:SI 2 "" ""))])
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69 (set (match_dup 0)
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70 (and:SI (match_dup 0)
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71 (match_operand:SI 3 "const_int_operand" "")))]
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72 "INTVAL (operands[3]) == (255 << INTVAL (operands[1]))"
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73 [(set (match_dup 0)
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74 (and:SI (match_dup 0)
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75 (const_int 255)))
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76 (parallel [(set (match_dup 0)
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77 (ashift:SI (match_dup 0) (match_dup 1)))
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78 (clobber (match_dup 2))])]
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79 "")
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80
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81 ;; Convert (A >> B) & C to (A & 65535) >> B if C == 65535 >> B.
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82
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83 (define_peephole2
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84 [(parallel [(set (match_operand:SI 0 "register_operand" "")
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85 (lshiftrt:SI (match_dup 0)
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86 (match_operand:SI 1 "const_int_operand" "")))
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87 (clobber (match_operand:SI 2 "" ""))])
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88 (set (match_dup 0)
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89 (and:SI (match_dup 0)
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90 (match_operand:SI 3 "const_int_operand" "")))]
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91 "INTVAL (operands[3]) == (65535 >> INTVAL (operands[1]))"
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92 [(set (match_dup 0)
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93 (and:SI (match_dup 0)
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94 (const_int 65535)))
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95 (parallel [(set (match_dup 0)
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96 (lshiftrt:SI (match_dup 0) (match_dup 1)))
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97 (clobber (match_dup 2))])]
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98 "")
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99
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100 ;; Convert (A << B) & C to (A & 65535) << B if C == 65535 << B.
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101
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102 (define_peephole2
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103 [(parallel [(set (match_operand:SI 0 "register_operand" "")
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104 (ashift:SI (match_dup 0)
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105 (match_operand:SI 1 "const_int_operand" "")))
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106 (clobber (match_operand:SI 2 "" ""))])
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107 (set (match_dup 0)
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108 (and:SI (match_dup 0)
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109 (match_operand:SI 3 "const_int_operand" "")))]
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110 "INTVAL (operands[3]) == (65535 << INTVAL (operands[1]))"
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111 [(set (match_dup 0)
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112 (and:SI (match_dup 0)
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113 (const_int 65535)))
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114 (parallel [(set (match_dup 0)
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115 (ashift:SI (match_dup 0) (match_dup 1)))
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116 (clobber (match_dup 2))])]
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117 "")
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118
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119 ;; Cram four pushes into stm.l.
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120
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121 (define_peephole2
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122 [(set (mem:SI (pre_dec:SI (reg:SI SP_REG)))
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123 (match_operand:SI 0 "register_operand" ""))
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124 (set (mem:SI (pre_dec:SI (reg:SI SP_REG)))
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125 (match_operand:SI 1 "register_operand" ""))
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126 (set (mem:SI (pre_dec:SI (reg:SI SP_REG)))
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127 (match_operand:SI 2 "register_operand" ""))
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128 (set (mem:SI (pre_dec:SI (reg:SI SP_REG)))
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129 (match_operand:SI 3 "register_operand" ""))]
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130 "TARGET_H8300S && !TARGET_NORMAL_MODE
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131 && (REGNO_REG_CLASS (REGNO (operands[3])) == GENERAL_REGS
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132 && REGNO (operands[1]) == REGNO (operands[0]) + 1
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133 && REGNO (operands[2]) == REGNO (operands[0]) + 2
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134 && REGNO (operands[3]) == REGNO (operands[0]) + 3
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135 && (TARGET_H8300SX || REGNO (operands[0]) == 0))"
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136 [(parallel [(set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -4)))
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137 (match_dup 0))
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138 (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -8)))
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139 (match_dup 1))
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140 (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -12)))
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141 (match_dup 2))
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142 (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -16)))
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143 (match_dup 3))
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144 (set (reg:SI SP_REG)
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145 (plus:SI (reg:SI SP_REG)
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146 (const_int -16)))])]
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147 "")
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148
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149 (define_peephole2
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150 [(set (mem:SI (pre_dec:HI (reg:HI SP_REG)))
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151 (match_operand:SI 0 "register_operand" ""))
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152 (set (mem:SI (pre_dec:HI (reg:HI SP_REG)))
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153 (match_operand:SI 1 "register_operand" ""))
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154 (set (mem:SI (pre_dec:HI (reg:HI SP_REG)))
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155 (match_operand:SI 2 "register_operand" ""))
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156 (set (mem:SI (pre_dec:HI (reg:HI SP_REG)))
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157 (match_operand:SI 3 "register_operand" ""))]
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158 "TARGET_H8300S && TARGET_NORMAL_MODE
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159 && (REGNO_REG_CLASS (REGNO (operands[3])) == GENERAL_REGS
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160 && REGNO (operands[1]) == REGNO (operands[0]) + 1
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161 && REGNO (operands[2]) == REGNO (operands[0]) + 2
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162 && REGNO (operands[3]) == REGNO (operands[0]) + 3
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163 && (TARGET_H8300SX || REGNO (operands[0]) == 0))"
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164 [(parallel [(set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -4)))
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165 (match_dup 0))
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166 (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -8)))
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167 (match_dup 1))
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168 (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -12)))
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169 (match_dup 2))
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170 (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -16)))
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171 (match_dup 3))
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172 (set (reg:HI SP_REG)
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173 (plus:HI (reg:HI SP_REG)
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174 (const_int -16)))])]
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175 "")
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176
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177 ;; Cram three pushes into stm.l.
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178
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179 (define_peephole2
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180 [(set (mem:SI (pre_dec:SI (reg:SI SP_REG)))
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181 (match_operand:SI 0 "register_operand" ""))
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182 (set (mem:SI (pre_dec:SI (reg:SI SP_REG)))
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183 (match_operand:SI 1 "register_operand" ""))
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184 (set (mem:SI (pre_dec:SI (reg:SI SP_REG)))
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185 (match_operand:SI 2 "register_operand" ""))]
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186 "TARGET_H8300S && !TARGET_NORMAL_MODE
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187 && (REGNO_REG_CLASS (REGNO (operands[2])) == GENERAL_REGS
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188 && REGNO (operands[1]) == REGNO (operands[0]) + 1
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189 && REGNO (operands[2]) == REGNO (operands[0]) + 2
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190 && (TARGET_H8300SX || (REGNO (operands[0]) & 3) == 0))"
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191 [(parallel [(set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -4)))
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192 (match_dup 0))
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193 (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -8)))
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194 (match_dup 1))
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195 (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -12)))
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196 (match_dup 2))
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197 (set (reg:SI SP_REG)
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198 (plus:SI (reg:SI SP_REG)
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199 (const_int -12)))])]
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200 "")
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201
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202 (define_peephole2
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203 [(set (mem:SI (pre_dec:HI (reg:HI SP_REG)))
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204 (match_operand:SI 0 "register_operand" ""))
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205 (set (mem:SI (pre_dec:HI (reg:HI SP_REG)))
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206 (match_operand:SI 1 "register_operand" ""))
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207 (set (mem:SI (pre_dec:HI (reg:HI SP_REG)))
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208 (match_operand:SI 2 "register_operand" ""))]
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209 "TARGET_H8300S && TARGET_NORMAL_MODE
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210 && (REGNO_REG_CLASS (REGNO (operands[2])) == GENERAL_REGS
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211 && REGNO (operands[1]) == REGNO (operands[0]) + 1
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212 && REGNO (operands[2]) == REGNO (operands[0]) + 2
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213 && (TARGET_H8300SX || (REGNO (operands[0]) & 3) == 0))"
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214 [(parallel [(set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -4)))
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215 (match_dup 0))
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216 (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -8)))
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217 (match_dup 1))
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218 (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -12)))
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219 (match_dup 2))
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220 (set (reg:HI SP_REG)
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221 (plus:HI (reg:HI SP_REG)
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222 (const_int -12)))])]
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223 "")
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224
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225 ;; Cram two pushes into stm.l.
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226
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227 (define_peephole2
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228 [(set (mem:SI (pre_dec:SI (reg:SI SP_REG)))
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229 (match_operand:SI 0 "register_operand" ""))
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230 (set (mem:SI (pre_dec:SI (reg:SI SP_REG)))
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231 (match_operand:SI 1 "register_operand" ""))]
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232 "TARGET_H8300S && !TARGET_NORMAL_MODE
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233 && (REGNO_REG_CLASS (REGNO (operands[1])) == GENERAL_REGS
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234 && REGNO (operands[1]) == REGNO (operands[0]) + 1
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235 && (TARGET_H8300SX || (REGNO (operands[0]) & 1) == 0))"
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236 [(parallel [(set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -4)))
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237 (match_dup 0))
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238 (set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -8)))
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239 (match_dup 1))
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240 (set (reg:SI SP_REG)
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241 (plus:SI (reg:SI SP_REG)
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242 (const_int -8)))])]
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243 "")
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244
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245 (define_peephole2
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246 [(set (mem:SI (pre_dec:HI (reg:HI SP_REG)))
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247 (match_operand:SI 0 "register_operand" ""))
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248 (set (mem:SI (pre_dec:HI (reg:HI SP_REG)))
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249 (match_operand:SI 1 "register_operand" ""))]
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250 "TARGET_H8300S && TARGET_NORMAL_MODE
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251 && (REGNO_REG_CLASS (REGNO (operands[1])) == GENERAL_REGS
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252 && REGNO (operands[1]) == REGNO (operands[0]) + 1
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253 && (TARGET_H8300SX || (REGNO (operands[0]) & 1) == 0))"
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254 [(parallel [(set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -4)))
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255 (match_dup 0))
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256 (set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -8)))
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257 (match_dup 1))
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258 (set (reg:HI SP_REG)
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259 (plus:HI (reg:HI SP_REG)
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260 (const_int -8)))])]
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261 "")
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262
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263 ;; Turn
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264 ;;
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265 ;; mov.w #2,r0
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266 ;; add.w r7,r0 (6 bytes)
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267 ;;
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268 ;; into
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269 ;;
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270 ;; mov.w r7,r0
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271 ;; adds #2,r0 (4 bytes)
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272
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273 (define_peephole2
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274 [(set (match_operand:HI 0 "register_operand" "")
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275 (match_operand:HI 1 "const_int_operand" ""))
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276 (set (match_dup 0)
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277 (plus:HI (match_dup 0)
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278 (match_operand:HI 2 "register_operand" "")))]
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279 "REG_P (operands[0]) && REG_P (operands[2])
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280 && REGNO (operands[0]) != REGNO (operands[2])
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281 && (satisfies_constraint_J (operands[1])
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282 || satisfies_constraint_L (operands[1])
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283 || satisfies_constraint_N (operands[1]))"
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284 [(set (match_dup 0)
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285 (match_dup 2))
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286 (set (match_dup 0)
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287 (plus:HI (match_dup 0)
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288 (match_dup 1)))]
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289 "")
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290
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291 ;; Turn
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292 ;;
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293 ;; sub.l er0,er0
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294 ;; add.b #4,r0l
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295 ;; add.l er7,er0 (6 bytes)
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296 ;;
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297 ;; into
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298 ;;
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299 ;; mov.l er7,er0
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300 ;; adds #4,er0 (4 bytes)
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301
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302 (define_peephole2
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303 [(set (match_operand:SI 0 "register_operand" "")
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304 (match_operand:SI 1 "const_int_operand" ""))
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305 (set (match_dup 0)
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306 (plus:SI (match_dup 0)
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307 (match_operand:SI 2 "register_operand" "")))]
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308 "REG_P (operands[0]) && REG_P (operands[2])
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309 && REGNO (operands[0]) != REGNO (operands[2])
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310 && (satisfies_constraint_L (operands[1])
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311 || satisfies_constraint_N (operands[1]))"
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312 [(set (match_dup 0)
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313 (match_dup 2))
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314 (set (match_dup 0)
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315 (plus:SI (match_dup 0)
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316 (match_dup 1)))]
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317 "")
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318
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319 ;; Turn
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320 ;;
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321 ;; mov.l er7,er0
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322 ;; add.l #10,er0 (takes 8 bytes)
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323 ;;
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324 ;; into
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325 ;;
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326 ;; sub.l er0,er0
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327 ;; add.b #10,r0l
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328 ;; add.l er7,er0 (takes 6 bytes)
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329
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330 (define_peephole2
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331 [(set (match_operand:SI 0 "register_operand" "")
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332 (match_operand:SI 1 "register_operand" ""))
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333 (set (match_dup 0)
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334 (plus:SI (match_dup 0)
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335 (match_operand:SI 2 "const_int_operand" "")))]
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336 "operands[0] != stack_pointer_rtx
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337 && REG_P (operands[0]) && REG_P (operands[1])
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338 && REGNO (operands[0]) != REGNO (operands[1])
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339 && !satisfies_constraint_L (operands[2])
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340 && !satisfies_constraint_N (operands[2])
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341 && ((INTVAL (operands[2]) & 0xff) == INTVAL (operands[2])
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342 || (INTVAL (operands[2]) & 0xff00) == INTVAL (operands[2])
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343 || INTVAL (operands[2]) == 0xffff
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344 || INTVAL (operands[2]) == 0xfffe)"
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345 [(set (match_dup 0)
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346 (match_dup 2))
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347 (set (match_dup 0)
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348 (plus:SI (match_dup 0)
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349 (match_dup 1)))]
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350 "")
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351
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352 ;; Turn
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353 ;;
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354 ;; subs #1,er4
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355 ;; mov.w r4,r4
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356 ;; bne .L2028
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357 ;;
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358 ;; into
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359 ;;
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360 ;; dec.w #1,r4
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361 ;; bne .L2028
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362
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363 (define_peephole2
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364 [(set (match_operand:HI 0 "register_operand" "")
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365 (plus:HI (match_dup 0)
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366 (match_operand 1 "incdec_operand" "")))
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367 (set (cc0) (compare (match_dup 0)
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368 (const_int 0)))
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369 (set (pc)
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370 (if_then_else (match_operator 4 "eqne_operator"
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371 [(cc0) (const_int 0)])
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372 (match_operand 2 "pc_or_label_operand" "")
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373 (match_operand 3 "pc_or_label_operand" "")))]
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374 ""
|
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375 [(set (match_operand:HI 0 "register_operand" "")
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376 (unspec:HI [(match_dup 0)
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377 (match_dup 1)]
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378 UNSPEC_INCDEC))
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379 (set (cc0) (compare (match_dup 0)
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380 (const_int 0)))
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381 (set (pc)
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382 (if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
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383 (match_dup 2)
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384 (match_dup 3)))])
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385
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386 ;; The SImode version of the previous pattern.
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387
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388 (define_peephole2
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389 [(set (match_operand:SI 0 "register_operand" "")
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390 (plus:SI (match_dup 0)
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391 (match_operand 1 "incdec_operand" "")))
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392 (set (cc0) (compare (match_dup 0)
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393 (const_int 0)))
|
|
|
394 (set (pc)
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395 (if_then_else (match_operator 4 "eqne_operator"
|
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|
396 [(cc0) (const_int 0)])
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397 (match_operand 2 "pc_or_label_operand" "")
|
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398 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
399 ""
|
|
|
400 [(set (match_operand:SI 0 "register_operand" "")
|
|
|
401 (unspec:SI [(match_dup 0)
|
|
|
402 (match_dup 1)]
|
|
|
403 UNSPEC_INCDEC))
|
|
|
404 (set (cc0) (compare (match_dup 0)
|
|
|
405 (const_int 0)))
|
|
|
406 (set (pc)
|
|
|
407 (if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
|
|
|
408 (match_dup 2)
|
|
|
409 (match_dup 3)))])
|
|
|
410
|
|
|
411 (define_peephole2
|
|
|
412 [(parallel [(set (cc0)
|
|
|
413 (compare (zero_extract:SI (match_operand:QI 0 "register_operand" "")
|
|
|
414 (const_int 1)
|
|
|
415 (const_int 7))
|
|
|
416 (const_int 0)))
|
|
|
417 (clobber (scratch:QI))])
|
|
|
418 (set (pc)
|
|
|
419 (if_then_else (match_operator 4 "eqne_operator"
|
|
|
420 [(cc0) (const_int 0)])
|
|
|
421 (match_operand 2 "pc_or_label_operand" "")
|
|
|
422 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
423 ""
|
|
|
424 [(set (cc0) (compare (match_dup 0)
|
|
|
425 (const_int 0)))
|
|
|
426 (set (pc)
|
|
|
427 (if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
|
|
|
428 (match_dup 2)
|
|
|
429 (match_dup 3)))]
|
|
|
430 {
|
|
|
431 operands[4] = ((GET_CODE (operands[4]) == EQ)
|
|
|
432 ? gen_rtx_GE (VOIDmode, cc0_rtx, const0_rtx)
|
|
|
433 : gen_rtx_LT (VOIDmode, cc0_rtx, const0_rtx));
|
|
|
434 })
|
|
|
435
|
|
|
436 ;; The next three peephole2's will try to transform
|
|
|
437 ;;
|
|
|
438 ;; mov.b A,r0l (or mov.l A,er0)
|
|
|
439 ;; and.l #CST,er0
|
|
|
440 ;;
|
|
|
441 ;; into
|
|
|
442 ;;
|
|
|
443 ;; sub.l er0
|
|
|
444 ;; mov.b A,r0l
|
|
|
445 ;; and.b #CST,r0l (if CST is not 255)
|
|
|
446
|
|
|
447 (define_peephole2
|
|
|
448 [(set (match_operand:QI 0 "register_operand" "")
|
|
|
449 (match_operand:QI 1 "general_operand" ""))
|
|
|
450 (set (match_operand:SI 2 "register_operand" "")
|
|
|
451 (and:SI (match_dup 2)
|
|
|
452 (const_int 255)))]
|
|
|
453 "!reg_overlap_mentioned_p (operands[2], operands[1])
|
|
|
454 && REGNO (operands[0]) == REGNO (operands[2])"
|
|
|
455 [(set (match_dup 2)
|
|
|
456 (const_int 0))
|
|
|
457 (set (strict_low_part (match_dup 0))
|
|
|
458 (match_dup 1))]
|
|
|
459 "")
|
|
|
460
|
|
|
461 (define_peephole2
|
|
|
462 [(set (match_operand:SI 0 "register_operand" "")
|
|
|
463 (match_operand:SI 1 "nonimmediate_operand" ""))
|
|
|
464 (set (match_dup 0)
|
|
|
465 (and:SI (match_dup 0)
|
|
|
466 (const_int 255)))]
|
|
|
467 "!reg_overlap_mentioned_p (operands[0], operands[1])
|
|
|
468 && !(GET_CODE (operands[1]) == MEM && !offsettable_memref_p (operands[1]))
|
|
|
469 && !(GET_CODE (operands[1]) == MEM && MEM_VOLATILE_P (operands[1]))"
|
|
|
470 [(set (match_dup 0)
|
|
|
471 (const_int 0))
|
|
|
472 (set (strict_low_part (match_dup 2))
|
|
|
473 (match_dup 3))]
|
|
|
474 {
|
|
|
475 operands[2] = gen_lowpart (QImode, operands[0]);
|
|
|
476 operands[3] = gen_lowpart (QImode, operands[1]);
|
|
|
477 })
|
|
|
478
|
|
|
479 (define_peephole2
|
|
|
480 [(set (match_operand 0 "register_operand" "")
|
|
|
481 (match_operand 1 "nonimmediate_operand" ""))
|
|
|
482 (set (match_operand:SI 2 "register_operand" "")
|
|
|
483 (and:SI (match_dup 2)
|
|
|
484 (match_operand:SI 3 "const_int_qi_operand" "")))]
|
|
|
485 "(GET_MODE (operands[0]) == QImode
|
|
|
486 || GET_MODE (operands[0]) == HImode
|
|
|
487 || GET_MODE (operands[0]) == SImode)
|
|
|
488 && GET_MODE (operands[0]) == GET_MODE (operands[1])
|
|
|
489 && REGNO (operands[0]) == REGNO (operands[2])
|
|
|
490 && !reg_overlap_mentioned_p (operands[2], operands[1])
|
|
|
491 && !(GET_MODE (operands[1]) != QImode
|
|
|
492 && GET_CODE (operands[1]) == MEM
|
|
|
493 && !offsettable_memref_p (operands[1]))
|
|
|
494 && !(GET_MODE (operands[1]) != QImode
|
|
|
495 && GET_CODE (operands[1]) == MEM
|
|
|
496 && MEM_VOLATILE_P (operands[1]))"
|
|
|
497 [(set (match_dup 2)
|
|
|
498 (const_int 0))
|
|
|
499 (set (strict_low_part (match_dup 4))
|
|
|
500 (match_dup 5))
|
|
|
501 (set (match_dup 2)
|
|
|
502 (and:SI (match_dup 2)
|
|
|
503 (match_dup 6)))]
|
|
|
504 {
|
|
|
505 operands[4] = gen_lowpart (QImode, operands[0]);
|
|
|
506 operands[5] = gen_lowpart (QImode, operands[1]);
|
|
|
507 operands[6] = GEN_INT (~0xff | INTVAL (operands[3]));
|
|
|
508 })
|
|
|
509
|
|
|
510 (define_peephole2
|
|
|
511 [(set (match_operand:SI 0 "register_operand" "")
|
|
|
512 (match_operand:SI 1 "register_operand" ""))
|
|
|
513 (set (match_dup 0)
|
|
|
514 (and:SI (match_dup 0)
|
|
|
515 (const_int 65280)))]
|
|
|
516 "!reg_overlap_mentioned_p (operands[0], operands[1])"
|
|
|
517 [(set (match_dup 0)
|
|
|
518 (const_int 0))
|
|
|
519 (set (zero_extract:SI (match_dup 0)
|
|
|
520 (const_int 8)
|
|
|
521 (const_int 8))
|
|
|
522 (lshiftrt:SI (match_dup 1)
|
|
|
523 (const_int 8)))]
|
|
|
524 "")
|
|
|
525
|
|
|
526 ;; If a load of mem:SI is followed by an AND that turns off the upper
|
|
|
527 ;; half, then we can load mem:HI instead.
|
|
|
528
|
|
|
529 (define_peephole2
|
|
|
530 [(set (match_operand:SI 0 "register_operand" "")
|
|
|
531 (match_operand:SI 1 "memory_operand" ""))
|
|
|
532 (set (match_dup 0)
|
|
|
533 (and:SI (match_dup 0)
|
|
|
534 (match_operand:SI 2 "const_int_operand" "")))]
|
|
|
535 "!MEM_VOLATILE_P (operands[1])
|
|
|
536 && offsettable_memref_p (operands[1])
|
|
|
537 && (INTVAL (operands[2]) & ~0xffff) == 0
|
|
|
538 && INTVAL (operands[2]) != 255"
|
|
|
539 [(set (match_dup 3)
|
|
|
540 (match_dup 4))
|
|
|
541 (set (match_dup 0)
|
|
|
542 (and:SI (match_dup 0)
|
|
|
543 (match_dup 2)))]
|
|
|
544 {
|
|
|
545 operands[3] = gen_lowpart (HImode, operands[0]);
|
|
|
546 operands[4] = gen_lowpart (HImode, operands[1]);
|
|
|
547 })
|
|
|
548
|
|
|
549 ;; Convert a memory comparison to a move if there is a scratch register.
|
|
|
550
|
|
|
551 (define_peephole2
|
|
|
552 [(match_scratch:QHSI 1 "r")
|
|
|
553 (set (cc0)
|
|
|
554 (compare (match_operand:QHSI 0 "memory_operand" "")
|
|
|
555 (const_int 0)))]
|
|
|
556 ""
|
|
|
557 [(set (match_dup 1)
|
|
|
558 (match_dup 0))
|
|
|
559 (set (cc0) (compare (match_dup 1)
|
|
|
560 (const_int 0)))]
|
|
|
561 "")
|
|
|
562
|
|
|
563 ;; (compare (reg:HI) (const_int)) takes 4 bytes, so we try to achieve
|
|
|
564 ;; the equivalent with shorter sequences. Here is the summary. Cases
|
|
|
565 ;; are grouped for each define_peephole2.
|
|
|
566 ;;
|
|
|
567 ;; reg const_int use insn
|
|
|
568 ;; --------------------------------------------------------
|
|
|
569 ;; dead -2 eq/ne inc.l
|
|
|
570 ;; dead -1 eq/ne inc.l
|
|
|
571 ;; dead 1 eq/ne dec.l
|
|
|
572 ;; dead 2 eq/ne dec.l
|
|
|
573 ;;
|
|
|
574 ;; dead 1 ge/lt shar.l
|
|
|
575 ;; dead 3 (H8S) ge/lt shar.l
|
|
|
576 ;;
|
|
|
577 ;; dead 1 geu/ltu shar.l
|
|
|
578 ;; dead 3 (H8S) geu/ltu shar.l
|
|
|
579 ;;
|
|
|
580 ;; ---- 255 ge/lt mov.b
|
|
|
581 ;;
|
|
|
582 ;; ---- 255 geu/ltu mov.b
|
|
|
583
|
|
|
584 ;; Transform
|
|
|
585 ;;
|
|
|
586 ;; cmp.w #1,r0
|
|
|
587 ;; bne .L1
|
|
|
588 ;;
|
|
|
589 ;; into
|
|
|
590 ;;
|
|
|
591 ;; dec.w #1,r0
|
|
|
592 ;; bne .L1
|
|
|
593
|
|
|
594 (define_peephole2
|
|
|
595 [(set (cc0)
|
|
|
596 (compare (match_operand:HI 0 "register_operand" "")
|
|
|
597 (match_operand:HI 1 "incdec_operand" "")))
|
|
|
598 (set (pc)
|
|
|
599 (if_then_else (match_operator 4 "eqne_operator"
|
|
|
600 [(cc0) (const_int 0)])
|
|
|
601 (match_operand 2 "pc_or_label_operand" "")
|
|
|
602 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
603 "INTVAL (operands[1]) != 0 && peep2_reg_dead_p (1, operands[0])"
|
|
|
604 [(set (match_dup 0)
|
|
|
605 (unspec:HI [(match_dup 0)
|
|
|
606 (match_dup 5)]
|
|
|
607 UNSPEC_INCDEC))
|
|
|
608 (set (cc0) (compare (match_dup 0)
|
|
|
609 (const_int 0)))
|
|
|
610 (set (pc)
|
|
|
611 (if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
|
|
|
612 (match_dup 2)
|
|
|
613 (match_dup 3)))]
|
|
|
614 {
|
|
|
615 operands[5] = GEN_INT (- INTVAL (operands[1]));
|
|
|
616 })
|
|
|
617
|
|
|
618 ;; Transform
|
|
|
619 ;;
|
|
|
620 ;; cmp.w #1,r0
|
|
|
621 ;; bgt .L1
|
|
|
622 ;;
|
|
|
623 ;; into
|
|
|
624 ;;
|
|
|
625 ;; shar.w r0
|
|
|
626 ;; bgt .L1
|
|
|
627
|
|
|
628 (define_peephole2
|
|
|
629 [(set (cc0)
|
|
|
630 (compare (match_operand:HI 0 "register_operand" "")
|
|
|
631 (match_operand:HI 1 "const_int_operand" "")))
|
|
|
632 (set (pc)
|
|
|
633 (if_then_else (match_operator 4 "gtle_operator"
|
|
|
634 [(cc0) (const_int 0)])
|
|
|
635 (match_operand 2 "pc_or_label_operand" "")
|
|
|
636 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
637 "peep2_reg_dead_p (1, operands[0])
|
|
|
638 && (INTVAL (operands[1]) == 1
|
|
|
639 || (TARGET_H8300S && INTVAL (operands[1]) == 3))"
|
|
|
640 [(parallel [(set (match_dup 0)
|
|
|
641 (ashiftrt:HI (match_dup 0)
|
|
|
642 (match_dup 5)))
|
|
|
643 (clobber (scratch:QI))])
|
|
|
644 (set (cc0) (compare (match_dup 0)
|
|
|
645 (const_int 0)))
|
|
|
646 (set (pc)
|
|
|
647 (if_then_else (match_dup 4)
|
|
|
648 (match_dup 2)
|
|
|
649 (match_dup 3)))]
|
|
|
650 {
|
|
|
651 operands[5] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));
|
|
|
652 })
|
|
|
653
|
|
|
654 ;; Transform
|
|
|
655 ;;
|
|
|
656 ;; cmp.w #1,r0
|
|
|
657 ;; bhi .L1
|
|
|
658 ;;
|
|
|
659 ;; into
|
|
|
660 ;;
|
|
|
661 ;; shar.w r0
|
|
|
662 ;; bne .L1
|
|
|
663
|
|
|
664 (define_peephole2
|
|
|
665 [(set (cc0)
|
|
|
666 (compare (match_operand:HI 0 "register_operand" "")
|
|
|
667 (match_operand:HI 1 "const_int_operand" "")))
|
|
|
668 (set (pc)
|
|
|
669 (if_then_else (match_operator 4 "gtuleu_operator"
|
|
|
670 [(cc0) (const_int 0)])
|
|
|
671 (match_operand 2 "pc_or_label_operand" "")
|
|
|
672 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
673 "peep2_reg_dead_p (1, operands[0])
|
|
|
674 && (INTVAL (operands[1]) == 1
|
|
|
675 || (TARGET_H8300S && INTVAL (operands[1]) == 3))"
|
|
|
676 [(parallel [(set (match_dup 0)
|
|
|
677 (ashiftrt:HI (match_dup 0)
|
|
|
678 (match_dup 5)))
|
|
|
679 (clobber (scratch:QI))])
|
|
|
680 (set (cc0) (compare (match_dup 0)
|
|
|
681 (const_int 0)))
|
|
|
682 (set (pc)
|
|
|
683 (if_then_else (match_dup 6)
|
|
|
684 (match_dup 2)
|
|
|
685 (match_dup 3)))]
|
|
|
686 {
|
|
|
687 operands[5] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));
|
|
|
688 operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[4]) == GTU ? NE : EQ,
|
|
|
689 VOIDmode, cc0_rtx, const0_rtx);
|
|
|
690 })
|
|
|
691
|
|
|
692 ;; Transform
|
|
|
693 ;;
|
|
|
694 ;; cmp.w #255,r0
|
|
|
695 ;; bgt .L1
|
|
|
696 ;;
|
|
|
697 ;; into
|
|
|
698 ;;
|
|
|
699 ;; mov.b r0h,r0h
|
|
|
700 ;; bgt .L1
|
|
|
701
|
|
|
702 (define_peephole2
|
|
|
703 [(set (cc0)
|
|
|
704 (compare (match_operand:HI 0 "register_operand" "")
|
|
|
705 (const_int 255)))
|
|
|
706 (set (pc)
|
|
|
707 (if_then_else (match_operator 1 "gtle_operator"
|
|
|
708 [(cc0) (const_int 0)])
|
|
|
709 (match_operand 2 "pc_or_label_operand" "")
|
|
|
710 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
711 ""
|
|
|
712 [(set (cc0) (compare (and:HI (match_dup 0)
|
|
|
713 (const_int -256))
|
|
|
714 (const_int 0)))
|
|
|
715 (set (pc)
|
|
|
716 (if_then_else (match_dup 1)
|
|
|
717 (match_dup 2)
|
|
|
718 (match_dup 3)))])
|
|
|
719
|
|
|
720 ;; Transform
|
|
|
721 ;;
|
|
|
722 ;; cmp.w #255,r0
|
|
|
723 ;; bhi .L1
|
|
|
724 ;;
|
|
|
725 ;; into
|
|
|
726 ;;
|
|
|
727 ;; mov.b r0h,r0h
|
|
|
728 ;; bne .L1
|
|
|
729
|
|
|
730 (define_peephole2
|
|
|
731 [(set (cc0)
|
|
|
732 (compare (match_operand:HI 0 "register_operand" "")
|
|
|
733 (const_int 255)))
|
|
|
734 (set (pc)
|
|
|
735 (if_then_else (match_operator 1 "gtuleu_operator"
|
|
|
736 [(cc0) (const_int 0)])
|
|
|
737 (match_operand 2 "pc_or_label_operand" "")
|
|
|
738 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
739 ""
|
|
|
740 [(set (cc0) (compare (and:HI (match_dup 0)
|
|
|
741 (const_int -256))
|
|
|
742 (const_int 0)))
|
|
|
743 (set (pc)
|
|
|
744 (if_then_else (match_dup 4)
|
|
|
745 (match_dup 2)
|
|
|
746 (match_dup 3)))]
|
|
|
747 {
|
|
|
748 operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[1]) == GTU ? NE : EQ,
|
|
|
749 VOIDmode, cc0_rtx, const0_rtx);
|
|
|
750 })
|
|
|
751
|
|
|
752 ;; (compare (reg:SI) (const_int)) takes 6 bytes, so we try to achieve
|
|
|
753 ;; the equivalent with shorter sequences. Here is the summary. Cases
|
|
|
754 ;; are grouped for each define_peephole2.
|
|
|
755 ;;
|
|
|
756 ;; reg const_int use insn
|
|
|
757 ;; --------------------------------------------------------
|
|
|
758 ;; live -2 eq/ne copy and inc.l
|
|
|
759 ;; live -1 eq/ne copy and inc.l
|
|
|
760 ;; live 1 eq/ne copy and dec.l
|
|
|
761 ;; live 2 eq/ne copy and dec.l
|
|
|
762 ;;
|
|
|
763 ;; dead -2 eq/ne inc.l
|
|
|
764 ;; dead -1 eq/ne inc.l
|
|
|
765 ;; dead 1 eq/ne dec.l
|
|
|
766 ;; dead 2 eq/ne dec.l
|
|
|
767 ;;
|
|
|
768 ;; dead -131072 eq/ne inc.w and test
|
|
|
769 ;; dead -65536 eq/ne inc.w and test
|
|
|
770 ;; dead 65536 eq/ne dec.w and test
|
|
|
771 ;; dead 131072 eq/ne dec.w and test
|
|
|
772 ;;
|
|
|
773 ;; dead 0x000000?? except 1 and 2 eq/ne xor.b and test
|
|
|
774 ;; dead 0x0000??00 eq/ne xor.b and test
|
|
|
775 ;; dead 0x0000ffff eq/ne not.w and test
|
|
|
776 ;;
|
|
|
777 ;; dead 0xffffff?? except -1 and -2 eq/ne xor.b and not.l
|
|
|
778 ;; dead 0xffff??ff eq/ne xor.b and not.l
|
|
|
779 ;; dead 0x40000000 (H8S) eq/ne rotl.l and dec.l
|
|
|
780 ;; dead 0x80000000 eq/ne rotl.l and dec.l
|
|
|
781 ;;
|
|
|
782 ;; live 1 ge/lt copy and shar.l
|
|
|
783 ;; live 3 (H8S) ge/lt copy and shar.l
|
|
|
784 ;;
|
|
|
785 ;; live 1 geu/ltu copy and shar.l
|
|
|
786 ;; live 3 (H8S) geu/ltu copy and shar.l
|
|
|
787 ;;
|
|
|
788 ;; dead 1 ge/lt shar.l
|
|
|
789 ;; dead 3 (H8S) ge/lt shar.l
|
|
|
790 ;;
|
|
|
791 ;; dead 1 geu/ltu shar.l
|
|
|
792 ;; dead 3 (H8S) geu/ltu shar.l
|
|
|
793 ;;
|
|
|
794 ;; dead 3 (H8/300H) ge/lt and.b and test
|
|
|
795 ;; dead 7 ge/lt and.b and test
|
|
|
796 ;; dead 15 ge/lt and.b and test
|
|
|
797 ;; dead 31 ge/lt and.b and test
|
|
|
798 ;; dead 63 ge/lt and.b and test
|
|
|
799 ;; dead 127 ge/lt and.b and test
|
|
|
800 ;; dead 255 ge/lt and.b and test
|
|
|
801 ;;
|
|
|
802 ;; dead 3 (H8/300H) geu/ltu and.b and test
|
|
|
803 ;; dead 7 geu/ltu and.b and test
|
|
|
804 ;; dead 15 geu/ltu and.b and test
|
|
|
805 ;; dead 31 geu/ltu and.b and test
|
|
|
806 ;; dead 63 geu/ltu and.b and test
|
|
|
807 ;; dead 127 geu/ltu and.b and test
|
|
|
808 ;; dead 255 geu/ltu and.b and test
|
|
|
809 ;;
|
|
|
810 ;; ---- 65535 ge/lt mov.w
|
|
|
811 ;;
|
|
|
812 ;; ---- 65535 geu/ltu mov.w
|
|
|
813
|
|
|
814 ;; Transform
|
|
|
815 ;;
|
|
|
816 ;; cmp.l #1,er0
|
|
|
817 ;; beq .L1
|
|
|
818 ;;
|
|
|
819 ;; into
|
|
|
820 ;;
|
|
|
821 ;; dec.l #1,er0
|
|
|
822 ;; beq .L1
|
|
|
823
|
|
|
824 (define_peephole2
|
|
|
825 [(set (cc0)
|
|
|
826 (compare (match_operand:SI 0 "register_operand" "")
|
|
|
827 (match_operand:SI 1 "incdec_operand" "")))
|
|
|
828 (set (pc)
|
|
|
829 (if_then_else (match_operator 4 "eqne_operator"
|
|
|
830 [(cc0) (const_int 0)])
|
|
|
831 (match_operand 2 "pc_or_label_operand" "")
|
|
|
832 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
833 "INTVAL (operands[1]) != 0 && peep2_reg_dead_p (1, operands[0])"
|
|
|
834 [(set (match_dup 0)
|
|
|
835 (unspec:SI [(match_dup 0)
|
|
|
836 (match_dup 5)]
|
|
|
837 UNSPEC_INCDEC))
|
|
|
838 (set (cc0) (compare (match_dup 0)
|
|
|
839 (const_int 0)))
|
|
|
840 (set (pc)
|
|
|
841 (if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
|
|
|
842 (match_dup 2)
|
|
|
843 (match_dup 3)))]
|
|
|
844 {
|
|
|
845 operands[5] = GEN_INT (- INTVAL (operands[1]));
|
|
|
846 })
|
|
|
847
|
|
|
848 ;; Transform
|
|
|
849 ;;
|
|
|
850 ;; cmp.l #65536,er0
|
|
|
851 ;; beq .L1
|
|
|
852 ;;
|
|
|
853 ;; into
|
|
|
854 ;;
|
|
|
855 ;; dec.l #1,e0
|
|
|
856 ;; beq .L1
|
|
|
857
|
|
|
858 (define_peephole2
|
|
|
859 [(set (cc0)
|
|
|
860 (compare (match_operand:SI 0 "register_operand" "")
|
|
|
861 (match_operand:SI 1 "const_int_operand" "")))
|
|
|
862 (set (pc)
|
|
|
863 (if_then_else (match_operator 4 "eqne_operator"
|
|
|
864 [(cc0) (const_int 0)])
|
|
|
865 (match_operand 2 "pc_or_label_operand" "")
|
|
|
866 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
867 "peep2_reg_dead_p (1, operands[0])
|
|
|
868 && (INTVAL (operands[1]) == -131072
|
|
|
869 || INTVAL (operands[1]) == -65536
|
|
|
870 || INTVAL (operands[1]) == 65536
|
|
|
871 || INTVAL (operands[1]) == 131072)"
|
|
|
872 [(set (match_dup 0)
|
|
|
873 (plus:SI (match_dup 0)
|
|
|
874 (match_dup 5)))
|
|
|
875 (set (cc0) (compare (match_dup 0)
|
|
|
876 (const_int 0)))
|
|
|
877 (set (pc)
|
|
|
878 (if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
|
|
|
879 (match_dup 2)
|
|
|
880 (match_dup 3)))]
|
|
|
881 {
|
|
|
882 operands[5] = GEN_INT (- INTVAL (operands[1]));
|
|
|
883 })
|
|
|
884
|
|
|
885 ;; Transform
|
|
|
886 ;;
|
|
|
887 ;; cmp.l #100,er0
|
|
|
888 ;; beq .L1
|
|
|
889 ;;
|
|
|
890 ;; into
|
|
|
891 ;;
|
|
|
892 ;; xor.b #100,er0
|
|
|
893 ;; mov.l er0,er0
|
|
|
894 ;; beq .L1
|
|
|
895
|
|
|
896 (define_peephole2
|
|
|
897 [(set (cc0)
|
|
|
898 (compare (match_operand:SI 0 "register_operand" "")
|
|
|
899 (match_operand:SI 1 "const_int_operand" "")))
|
|
|
900 (set (pc)
|
|
|
901 (if_then_else (match_operator 4 "eqne_operator"
|
|
|
902 [(cc0) (const_int 0)])
|
|
|
903 (match_operand 2 "pc_or_label_operand" "")
|
|
|
904 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
905 "peep2_reg_dead_p (1, operands[0])
|
|
|
906 && ((INTVAL (operands[1]) & 0x00ff) == INTVAL (operands[1])
|
|
|
907 || (INTVAL (operands[1]) & 0xff00) == INTVAL (operands[1])
|
|
|
908 || INTVAL (operands[1]) == 0x0000ffff)
|
|
|
909 && INTVAL (operands[1]) != 0
|
|
|
910 && INTVAL (operands[1]) != 1
|
|
|
911 && INTVAL (operands[1]) != 2"
|
|
|
912 [(set (match_dup 0)
|
|
|
913 (xor:SI (match_dup 0)
|
|
|
914 (match_dup 1)))
|
|
|
915 (set (cc0) (compare (match_dup 0)
|
|
|
916 (const_int 0)))
|
|
|
917 (set (pc)
|
|
|
918 (if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
|
|
|
919 (match_dup 2)
|
|
|
920 (match_dup 3)))])
|
|
|
921
|
|
|
922 ;; Transform
|
|
|
923 ;;
|
|
|
924 ;; cmp.l #-100,er0
|
|
|
925 ;; beq .L1
|
|
|
926 ;;
|
|
|
927 ;; into
|
|
|
928 ;;
|
|
|
929 ;; xor.b #99,er0
|
|
|
930 ;; not.l er0
|
|
|
931 ;; beq .L1
|
|
|
932
|
|
|
933 (define_peephole2
|
|
|
934 [(set (cc0)
|
|
|
935 (compare (match_operand:SI 0 "register_operand" "")
|
|
|
936 (match_operand:SI 1 "const_int_operand" "")))
|
|
|
937 (set (pc)
|
|
|
938 (if_then_else (match_operator 4 "eqne_operator"
|
|
|
939 [(cc0) (const_int 0)])
|
|
|
940 (match_operand 2 "pc_or_label_operand" "")
|
|
|
941 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
942 "peep2_reg_dead_p (1, operands[0])
|
|
|
943 && ((INTVAL (operands[1]) | 0x00ff) == -1
|
|
|
944 || (INTVAL (operands[1]) | 0xff00) == -1)
|
|
|
945 && INTVAL (operands[1]) != -1
|
|
|
946 && INTVAL (operands[1]) != -2"
|
|
|
947 [(set (match_dup 0)
|
|
|
948 (xor:SI (match_dup 0)
|
|
|
949 (match_dup 5)))
|
|
|
950 (set (match_dup 0)
|
|
|
951 (not:SI (match_dup 0)))
|
|
|
952 (set (cc0) (compare (match_dup 0)
|
|
|
953 (const_int 0)))
|
|
|
954 (set (pc)
|
|
|
955 (if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
|
|
|
956 (match_dup 2)
|
|
|
957 (match_dup 3)))]
|
|
|
958 {
|
|
|
959 operands[5] = GEN_INT (INTVAL (operands[1]) ^ -1);
|
|
|
960 })
|
|
|
961
|
|
|
962 ;; Transform
|
|
|
963 ;;
|
|
|
964 ;; cmp.l #-2147483648,er0
|
|
|
965 ;; beq .L1
|
|
|
966 ;;
|
|
|
967 ;; into
|
|
|
968 ;;
|
|
|
969 ;; rotl.l er0
|
|
|
970 ;; dec.l #1,er0
|
|
|
971 ;; beq .L1
|
|
|
972
|
|
|
973 (define_peephole2
|
|
|
974 [(set (cc0)
|
|
|
975 (compare (match_operand:SI 0 "register_operand" "")
|
|
|
976 (match_operand:SI 1 "const_int_operand" "")))
|
|
|
977 (set (pc)
|
|
|
978 (if_then_else (match_operator 4 "eqne_operator"
|
|
|
979 [(cc0) (const_int 0)])
|
|
|
980 (match_operand 2 "pc_or_label_operand" "")
|
|
|
981 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
982 "peep2_reg_dead_p (1, operands[0])
|
|
|
983 && (INTVAL (operands[1]) == -2147483647 - 1
|
|
|
984 || (TARGET_H8300S && INTVAL (operands[1]) == 1073741824))"
|
|
|
985 [(set (match_dup 0)
|
|
|
986 (rotate:SI (match_dup 0)
|
|
|
987 (match_dup 5)))
|
|
|
988 (set (match_dup 0)
|
|
|
989 (unspec:SI [(match_dup 0)
|
|
|
990 (const_int -1)]
|
|
|
991 UNSPEC_INCDEC))
|
|
|
992 (set (cc0) (compare (match_dup 0)
|
|
|
993 (const_int 0)))
|
|
|
994 (set (pc)
|
|
|
995 (if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
|
|
|
996 (match_dup 2)
|
|
|
997 (match_dup 3)))]
|
|
|
998 {
|
|
|
999 operands[5] = GEN_INT (INTVAL (operands[1]) == -2147483647 - 1 ? 1 : 2);
|
|
|
1000 })
|
|
|
1001
|
|
|
1002 ;; Transform
|
|
|
1003 ;;
|
|
|
1004 ;; cmp.l #1,er0
|
|
|
1005 ;; bgt .L1
|
|
|
1006 ;;
|
|
|
1007 ;; into
|
|
|
1008 ;;
|
|
|
1009 ;; mov.l er0,er1
|
|
|
1010 ;; shar.l er1
|
|
|
1011 ;; bgt .L1
|
|
|
1012
|
|
|
1013 ;; We avoid this transformation if we see more than one copy of the
|
|
|
1014 ;; same compare insn immediately before this one.
|
|
|
1015
|
|
|
1016 (define_peephole2
|
|
|
1017 [(match_scratch:SI 5 "r")
|
|
|
1018 (set (cc0)
|
|
|
1019 (compare (match_operand:SI 0 "register_operand" "")
|
|
|
1020 (match_operand:SI 1 "const_int_operand" "")))
|
|
|
1021 (set (pc)
|
|
|
1022 (if_then_else (match_operator 4 "gtle_operator"
|
|
|
1023 [(cc0) (const_int 0)])
|
|
|
1024 (match_operand 2 "pc_or_label_operand" "")
|
|
|
1025 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
1026 "!peep2_reg_dead_p (1, operands[0])
|
|
|
1027 && (INTVAL (operands[1]) == 1
|
|
|
1028 || (TARGET_H8300S && INTVAL (operands[1]) == 3))
|
|
|
1029 && !same_cmp_preceding_p (insn)"
|
|
|
1030 [(set (match_dup 5)
|
|
|
1031 (match_dup 0))
|
|
|
1032 (parallel [(set (match_dup 5)
|
|
|
1033 (ashiftrt:SI (match_dup 5)
|
|
|
1034 (match_dup 6)))
|
|
|
1035 (clobber (scratch:QI))])
|
|
|
1036 (set (cc0) (compare (match_dup 5)
|
|
|
1037 (const_int 0)))
|
|
|
1038 (set (pc)
|
|
|
1039 (if_then_else (match_dup 4)
|
|
|
1040 (match_dup 2)
|
|
|
1041 (match_dup 3)))]
|
|
|
1042 {
|
|
|
1043 operands[6] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));
|
|
|
1044 })
|
|
|
1045
|
|
|
1046 ;; Transform
|
|
|
1047 ;;
|
|
|
1048 ;; cmp.l #1,er0
|
|
|
1049 ;; bhi .L1
|
|
|
1050 ;;
|
|
|
1051 ;; into
|
|
|
1052 ;;
|
|
|
1053 ;; mov.l er0,er1
|
|
|
1054 ;; shar.l er1
|
|
|
1055 ;; bne .L1
|
|
|
1056
|
|
|
1057 ;; We avoid this transformation if we see more than one copy of the
|
|
|
1058 ;; same compare insn immediately before this one.
|
|
|
1059
|
|
|
1060 (define_peephole2
|
|
|
1061 [(match_scratch:SI 5 "r")
|
|
|
1062 (set (cc0)
|
|
|
1063 (compare (match_operand:SI 0 "register_operand" "")
|
|
|
1064 (match_operand:SI 1 "const_int_operand" "")))
|
|
|
1065 (set (pc)
|
|
|
1066 (if_then_else (match_operator 4 "gtuleu_operator"
|
|
|
1067 [(cc0) (const_int 0)])
|
|
|
1068 (match_operand 2 "pc_or_label_operand" "")
|
|
|
1069 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
1070 "!peep2_reg_dead_p (1, operands[0])
|
|
|
1071 && (INTVAL (operands[1]) == 1
|
|
|
1072 || (TARGET_H8300S && INTVAL (operands[1]) == 3))
|
|
|
1073 && !same_cmp_preceding_p (insn)"
|
|
|
1074 [(set (match_dup 5)
|
|
|
1075 (match_dup 0))
|
|
|
1076 (parallel [(set (match_dup 5)
|
|
|
1077 (ashiftrt:SI (match_dup 5)
|
|
|
1078 (match_dup 6)))
|
|
|
1079 (clobber (scratch:QI))])
|
|
|
1080 (set (cc0) (compare (match_dup 5)
|
|
|
1081 (const_int 0)))
|
|
|
1082 (set (pc)
|
|
|
1083 (if_then_else (match_dup 7)
|
|
|
1084 (match_dup 2)
|
|
|
1085 (match_dup 3)))]
|
|
|
1086 {
|
|
|
1087 operands[6] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));
|
|
|
1088 operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[4]) == GTU ? NE : EQ,
|
|
|
1089 VOIDmode, cc0_rtx, const0_rtx);
|
|
|
1090 })
|
|
|
1091
|
|
|
1092 ;; Transform
|
|
|
1093 ;;
|
|
|
1094 ;; cmp.l #1,er0
|
|
|
1095 ;; bgt .L1
|
|
|
1096 ;;
|
|
|
1097 ;; into
|
|
|
1098 ;;
|
|
|
1099 ;; shar.l er0
|
|
|
1100 ;; bgt .L1
|
|
|
1101
|
|
|
1102 (define_peephole2
|
|
|
1103 [(set (cc0)
|
|
|
1104 (compare (match_operand:SI 0 "register_operand" "")
|
|
|
1105 (match_operand:SI 1 "const_int_operand" "")))
|
|
|
1106 (set (pc)
|
|
|
1107 (if_then_else (match_operator 4 "gtle_operator"
|
|
|
1108 [(cc0) (const_int 0)])
|
|
|
1109 (match_operand 2 "pc_or_label_operand" "")
|
|
|
1110 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
1111 "peep2_reg_dead_p (1, operands[0])
|
|
|
1112 && (INTVAL (operands[1]) == 1
|
|
|
1113 || (TARGET_H8300S && INTVAL (operands[1]) == 3))"
|
|
|
1114 [(parallel [(set (match_dup 0)
|
|
|
1115 (ashiftrt:SI (match_dup 0)
|
|
|
1116 (match_dup 5)))
|
|
|
1117 (clobber (scratch:QI))])
|
|
|
1118 (set (cc0) (compare (match_dup 0)
|
|
|
1119 (const_int 0)))
|
|
|
1120 (set (pc)
|
|
|
1121 (if_then_else (match_dup 4)
|
|
|
1122 (match_dup 2)
|
|
|
1123 (match_dup 3)))]
|
|
|
1124 {
|
|
|
1125 operands[5] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));
|
|
|
1126 })
|
|
|
1127
|
|
|
1128 ;; Transform
|
|
|
1129 ;;
|
|
|
1130 ;; cmp.l #1,er0
|
|
|
1131 ;; bhi .L1
|
|
|
1132 ;;
|
|
|
1133 ;; into
|
|
|
1134 ;;
|
|
|
1135 ;; shar.l er0
|
|
|
1136 ;; bne .L1
|
|
|
1137
|
|
|
1138 (define_peephole2
|
|
|
1139 [(set (cc0)
|
|
|
1140 (compare (match_operand:SI 0 "register_operand" "")
|
|
|
1141 (match_operand:SI 1 "const_int_operand" "")))
|
|
|
1142 (set (pc)
|
|
|
1143 (if_then_else (match_operator 4 "gtuleu_operator"
|
|
|
1144 [(cc0) (const_int 0)])
|
|
|
1145 (match_operand 2 "pc_or_label_operand" "")
|
|
|
1146 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
1147 "peep2_reg_dead_p (1, operands[0])
|
|
|
1148 && (INTVAL (operands[1]) == 1
|
|
|
1149 || (TARGET_H8300S && INTVAL (operands[1]) == 3))"
|
|
|
1150 [(parallel [(set (match_dup 0)
|
|
|
1151 (ashiftrt:SI (match_dup 0)
|
|
|
1152 (match_dup 5)))
|
|
|
1153 (clobber (scratch:QI))])
|
|
|
1154 (set (cc0) (compare (match_dup 0)
|
|
|
1155 (const_int 0)))
|
|
|
1156 (set (pc)
|
|
|
1157 (if_then_else (match_dup 6)
|
|
|
1158 (match_dup 2)
|
|
|
1159 (match_dup 3)))]
|
|
|
1160 {
|
|
|
1161 operands[5] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));
|
|
|
1162 operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[4]) == GTU ? NE : EQ,
|
|
|
1163 VOIDmode, cc0_rtx, const0_rtx);
|
|
|
1164 })
|
|
|
1165
|
|
|
1166 ;; Transform
|
|
|
1167 ;;
|
|
|
1168 ;; cmp.l #15,er0
|
|
|
1169 ;; bgt .L1
|
|
|
1170 ;;
|
|
|
1171 ;; into
|
|
|
1172 ;;
|
|
|
1173 ;; and #240,r0l
|
|
|
1174 ;; mov.l er0,er0
|
|
|
1175 ;; bgt .L1
|
|
|
1176
|
|
|
1177 (define_peephole2
|
|
|
1178 [(set (cc0)
|
|
|
1179 (compare (match_operand:SI 0 "register_operand" "")
|
|
|
1180 (match_operand:SI 1 "const_int_operand" "")))
|
|
|
1181 (set (pc)
|
|
|
1182 (if_then_else (match_operator 4 "gtle_operator"
|
|
|
1183 [(cc0) (const_int 0)])
|
|
|
1184 (match_operand 2 "pc_or_label_operand" "")
|
|
|
1185 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
1186 "peep2_reg_dead_p (1, operands[0])
|
|
|
1187 && (INTVAL (operands[1]) == 3
|
|
|
1188 || INTVAL (operands[1]) == 7
|
|
|
1189 || INTVAL (operands[1]) == 15
|
|
|
1190 || INTVAL (operands[1]) == 31
|
|
|
1191 || INTVAL (operands[1]) == 63
|
|
|
1192 || INTVAL (operands[1]) == 127
|
|
|
1193 || INTVAL (operands[1]) == 255)"
|
|
|
1194 [(set (match_dup 0)
|
|
|
1195 (and:SI (match_dup 0)
|
|
|
1196 (match_dup 5)))
|
|
|
1197 (set (cc0) (compare (match_dup 0)
|
|
|
1198 (const_int 0)))
|
|
|
1199 (set (pc)
|
|
|
1200 (if_then_else (match_dup 4)
|
|
|
1201 (match_dup 2)
|
|
|
1202 (match_dup 3)))]
|
|
|
1203 {
|
|
|
1204 operands[5] = GEN_INT (~INTVAL (operands[1]));
|
|
|
1205 })
|
|
|
1206
|
|
|
1207 ;; Transform
|
|
|
1208 ;;
|
|
|
1209 ;; cmp.l #15,er0
|
|
|
1210 ;; bhi .L1
|
|
|
1211 ;;
|
|
|
1212 ;; into
|
|
|
1213 ;;
|
|
|
1214 ;; and #240,r0l
|
|
|
1215 ;; mov.l er0,er0
|
|
|
1216 ;; bne .L1
|
|
|
1217
|
|
|
1218 (define_peephole2
|
|
|
1219 [(set (cc0)
|
|
|
1220 (compare (match_operand:SI 0 "register_operand" "")
|
|
|
1221 (match_operand:SI 1 "const_int_operand" "")))
|
|
|
1222 (set (pc)
|
|
|
1223 (if_then_else (match_operator 4 "gtuleu_operator"
|
|
|
1224 [(cc0) (const_int 0)])
|
|
|
1225 (match_operand 2 "pc_or_label_operand" "")
|
|
|
1226 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
1227 "peep2_reg_dead_p (1, operands[0])
|
|
|
1228 && ((TARGET_H8300H && INTVAL (operands[1]) == 3)
|
|
|
1229 || INTVAL (operands[1]) == 7
|
|
|
1230 || INTVAL (operands[1]) == 15
|
|
|
1231 || INTVAL (operands[1]) == 31
|
|
|
1232 || INTVAL (operands[1]) == 63
|
|
|
1233 || INTVAL (operands[1]) == 127
|
|
|
1234 || INTVAL (operands[1]) == 255)"
|
|
|
1235 [(set (match_dup 0)
|
|
|
1236 (and:SI (match_dup 0)
|
|
|
1237 (match_dup 5)))
|
|
|
1238 (set (cc0) (compare (match_dup 0)
|
|
|
1239 (const_int 0)))
|
|
|
1240 (set (pc)
|
|
|
1241 (if_then_else (match_dup 6)
|
|
|
1242 (match_dup 2)
|
|
|
1243 (match_dup 3)))]
|
|
|
1244 {
|
|
|
1245 operands[5] = GEN_INT (~INTVAL (operands[1]));
|
|
|
1246 operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[4]) == GTU ? NE : EQ,
|
|
|
1247 VOIDmode, cc0_rtx, const0_rtx);
|
|
|
1248 })
|
|
|
1249
|
|
|
1250 ;; Transform
|
|
|
1251 ;;
|
|
|
1252 ;; cmp.l #65535,er0
|
|
|
1253 ;; bgt .L1
|
|
|
1254 ;;
|
|
|
1255 ;; into
|
|
|
1256 ;;
|
|
|
1257 ;; mov.l e0,e0
|
|
|
1258 ;; bgt .L1
|
|
|
1259
|
|
|
1260 (define_peephole2
|
|
|
1261 [(set (cc0)
|
|
|
1262 (compare (match_operand:SI 0 "register_operand" "")
|
|
|
1263 (const_int 65535)))
|
|
|
1264 (set (pc)
|
|
|
1265 (if_then_else (match_operator 1 "gtle_operator"
|
|
|
1266 [(cc0) (const_int 0)])
|
|
|
1267 (match_operand 2 "pc_or_label_operand" "")
|
|
|
1268 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
1269 ""
|
|
|
1270 [(set (cc0) (compare (and:SI (match_dup 0)
|
|
|
1271 (const_int -65536))
|
|
|
1272 (const_int 0)))
|
|
|
1273 (set (pc)
|
|
|
1274 (if_then_else (match_dup 1)
|
|
|
1275 (match_dup 2)
|
|
|
1276 (match_dup 3)))])
|
|
|
1277
|
|
|
1278 ;; Transform
|
|
|
1279 ;;
|
|
|
1280 ;; cmp.l #65535,er0
|
|
|
1281 ;; bhi .L1
|
|
|
1282 ;;
|
|
|
1283 ;; into
|
|
|
1284 ;;
|
|
|
1285 ;; mov.l e0,e0
|
|
|
1286 ;; bne .L1
|
|
|
1287
|
|
|
1288 (define_peephole2
|
|
|
1289 [(set (cc0)
|
|
|
1290 (compare (match_operand:SI 0 "register_operand" "")
|
|
|
1291 (const_int 65535)))
|
|
|
1292 (set (pc)
|
|
|
1293 (if_then_else (match_operator 1 "gtuleu_operator"
|
|
|
1294 [(cc0) (const_int 0)])
|
|
|
1295 (match_operand 2 "pc_or_label_operand" "")
|
|
|
1296 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
1297 ""
|
|
|
1298 [(set (cc0) (compare (and:SI (match_dup 0)
|
|
|
1299 (const_int -65536))
|
|
|
1300 (const_int 0)))
|
|
|
1301 (set (pc)
|
|
|
1302 (if_then_else (match_dup 4)
|
|
|
1303 (match_dup 2)
|
|
|
1304 (match_dup 3)))]
|
|
|
1305 {
|
|
|
1306 operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[1]) == GTU ? NE : EQ,
|
|
|
1307 VOIDmode, cc0_rtx, const0_rtx);
|
|
|
1308 })
|
|
|
1309
|
|
|
1310 ;; Transform
|
|
|
1311 ;;
|
|
|
1312 ;; cmp.l #1,er0
|
|
|
1313 ;; beq .L1
|
|
|
1314 ;;
|
|
|
1315 ;; into
|
|
|
1316 ;;
|
|
|
1317 ;; mov.l er0,er1
|
|
|
1318 ;; dec.l #1,er1
|
|
|
1319 ;; beq .L1
|
|
|
1320
|
|
|
1321 ;; We avoid this transformation if we see more than one copy of the
|
|
|
1322 ;; same compare insn.
|
|
|
1323
|
|
|
1324 (define_peephole2
|
|
|
1325 [(match_scratch:SI 5 "r")
|
|
|
1326 (set (cc0)
|
|
|
1327 (compare (match_operand:SI 0 "register_operand" "")
|
|
|
1328 (match_operand:SI 1 "incdec_operand" "")))
|
|
|
1329 (set (pc)
|
|
|
1330 (if_then_else (match_operator 4 "eqne_operator"
|
|
|
1331 [(cc0) (const_int 0)])
|
|
|
1332 (match_operand 2 "pc_or_label_operand" "")
|
|
|
1333 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
1334 "INTVAL (operands[1]) != 0
|
|
|
1335 && !peep2_reg_dead_p (1, operands[0])
|
|
|
1336 && !same_cmp_following_p (insn)"
|
|
|
1337 [(set (match_dup 5)
|
|
|
1338 (match_dup 0))
|
|
|
1339 (set (match_dup 5)
|
|
|
1340 (unspec:SI [(match_dup 5)
|
|
|
1341 (match_dup 6)]
|
|
|
1342 UNSPEC_INCDEC))
|
|
|
1343 (set (cc0) (compare (match_dup 5)
|
|
|
1344 (const_int 0)))
|
|
|
1345 (set (pc)
|
|
|
1346 (if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
|
|
|
1347 (match_dup 2)
|
|
|
1348 (match_dup 3)))]
|
|
|
1349 {
|
|
|
1350 operands[6] = GEN_INT (- INTVAL (operands[1]));
|
|
|
1351 })
|
|
|
1352
|
|
|
1353 ;; Narrow the mode of testing if possible.
|
|
|
1354
|
|
|
1355 (define_peephole2
|
|
|
1356 [(set (match_operand:HSI 0 "register_operand" "")
|
|
|
1357 (and:HSI (match_dup 0)
|
|
|
1358 (match_operand:HSI 1 "const_int_operand" "")))
|
|
|
1359 (set (cc0) (compare (match_dup 0)
|
|
|
1360 (const_int 0)))
|
|
|
1361 (set (pc)
|
|
|
1362 (if_then_else (match_operator 4 "eqne_operator"
|
|
|
1363 [(cc0) (const_int 0)])
|
|
|
1364 (match_operand 2 "pc_or_label_operand" "")
|
|
|
1365 (match_operand 3 "pc_or_label_operand" "")))]
|
|
|
1366 "((const_int_qi_operand (operands[1], QImode)
|
|
|
1367 || (GET_MODE (operands[0]) == SImode
|
|
|
1368 && const_int_hi_operand (operands[1], HImode)))
|
|
|
1369 && peep2_reg_dead_p (2, operands[0]))"
|
|
|
1370 [(set (match_dup 5) (match_dup 7))
|
|
|
1371 (set (cc0) (compare (match_dup 5)
|
|
|
1372 (const_int 0)))
|
|
|
1373 (set (pc)
|
|
|
1374 (if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
|
|
|
1375 (match_dup 2)
|
|
|
1376 (match_dup 3)))]
|
|
|
1377 {
|
|
|
1378 enum machine_mode mode;
|
|
|
1379
|
|
|
1380 mode = const_int_qi_operand (operands[1], QImode) ? QImode : HImode;
|
|
|
1381 operands[5] = gen_rtx_REG (mode, REGNO (operands[0]));
|
|
|
1382 operands[6] = gen_int_mode (INTVAL (operands[1]), mode);
|
|
|
1383 operands[7] = gen_rtx_AND (mode, operands[5], operands[6]);
|
|
|
1384 })
|
|
|
1385
|
|
|
1386 ;; These triggers right at the end of allocation of locals in the
|
|
|
1387 ;; prologue (and possibly at other places).
|
|
|
1388
|
|
|
1389 ;; stack adjustment of -4, generate one push
|
|
|
1390 ;;
|
|
|
1391 ;; before : 6 bytes
|
|
|
1392 ;; after : 4 bytes
|
|
|
1393
|
|
|
1394 (define_peephole2
|
|
|
1395 [(set (reg:SI SP_REG)
|
|
|
1396 (plus:SI (reg:SI SP_REG)
|
|
|
1397 (const_int -4)))
|
|
|
1398 (set (mem:SFI (reg:SI SP_REG))
|
|
|
1399 (match_operand:SFI 0 "register_operand" ""))]
|
|
|
1400 "!TARGET_NORMAL_MODE && REGNO (operands[0]) != SP_REG"
|
|
|
1401 [(set (mem:SFI (pre_dec:SI (reg:SI SP_REG)))
|
|
|
1402 (match_dup 0))])
|
|
|
1403
|
|
|
1404 ;; stack adjustment of -8, generate one push
|
|
|
1405 ;;
|
|
|
1406 ;; before : 8 bytes
|
|
|
1407 ;; after : 6 bytes
|
|
|
1408
|
|
|
1409 (define_peephole2
|
|
|
1410 [(set (reg:SI SP_REG)
|
|
|
1411 (plus:SI (reg:SI SP_REG)
|
|
|
1412 (const_int -8)))
|
|
|
1413 (set (mem:SFI (reg:SI SP_REG))
|
|
|
1414 (match_operand:SFI 0 "register_operand" ""))]
|
|
|
1415 "!TARGET_NORMAL_MODE && REGNO (operands[0]) != SP_REG"
|
|
|
1416 [(set (reg:SI SP_REG)
|
|
|
1417 (plus:SI (reg:SI SP_REG)
|
|
|
1418 (const_int -4)))
|
|
|
1419 (set (mem:SFI (pre_dec:SI (reg:SI SP_REG)))
|
|
|
1420 (match_dup 0))])
|
|
|
1421
|
|
|
1422 ;; stack adjustment of -12, generate one push
|
|
|
1423 ;;
|
|
|
1424 ;; before : 10 bytes
|
|
|
1425 ;; after : 8 bytes
|
|
|
1426
|
|
|
1427 (define_peephole2
|
|
|
1428 [(set (reg:SI SP_REG)
|
|
|
1429 (plus:SI (reg:SI SP_REG)
|
|
|
1430 (const_int -12)))
|
|
|
1431 (set (mem:SFI (reg:SI SP_REG))
|
|
|
1432 (match_operand:SFI 0 "register_operand" ""))]
|
|
|
1433 "!TARGET_NORMAL_MODE && REGNO (operands[0]) != SP_REG"
|
|
|
1434 [(set (reg:SI SP_REG)
|
|
|
1435 (plus:SI (reg:SI SP_REG)
|
|
|
1436 (const_int -4)))
|
|
|
1437 (set (reg:SI SP_REG)
|
|
|
1438 (plus:SI (reg:SI SP_REG)
|
|
|
1439 (const_int -4)))
|
|
|
1440 (set (mem:SFI (pre_dec:SI (reg:SI SP_REG)))
|
|
|
1441 (match_dup 0))])
|
|
|
1442
|
|
|
1443 ;; Transform
|
|
|
1444 ;;
|
|
|
1445 ;; mov dst,reg
|
|
|
1446 ;; op reg
|
|
|
1447 ;; mov reg,dst
|
|
|
1448 ;;
|
|
|
1449 ;; into
|
|
|
1450 ;;
|
|
|
1451 ;; op dst
|
|
|
1452 ;;
|
|
|
1453 ;; if "reg" dies at the end of the sequence.
|
|
|
1454
|
|
|
1455 (define_peephole2
|
|
|
1456 [(set (match_operand 0 "register_operand" "")
|
|
|
1457 (match_operand 1 "memory_operand" ""))
|
|
|
1458 (set (match_dup 0)
|
|
|
1459 (match_operator 2 "h8sx_unary_memory_operator"
|
|
|
1460 [(match_dup 0)]))
|
|
|
1461 (set (match_operand 3 "memory_operand" "")
|
|
|
1462 (match_dup 0))]
|
|
|
1463 "TARGET_H8300SX
|
|
|
1464 && peep2_reg_dead_p (3, operands[0])
|
|
|
1465 && !reg_overlap_mentioned_p (operands[0], operands[3])
|
|
|
1466 && h8sx_mergeable_memrefs_p (operands[3], operands[1])"
|
|
|
1467 [(set (match_dup 3)
|
|
|
1468 (match_dup 4))]
|
|
|
1469 {
|
|
|
1470 operands[4] = shallow_copy_rtx (operands[2]);
|
|
|
1471 XEXP (operands[4], 0) = operands[1];
|
|
|
1472 })
|
|
|
1473
|
|
|
1474 ;; Transform
|
|
|
1475 ;;
|
|
|
1476 ;; mov src1,reg
|
|
|
1477 ;; cmp reg,src2
|
|
|
1478 ;;
|
|
|
1479 ;; into
|
|
|
1480 ;;
|
|
|
1481 ;; cmp src1,src2
|
|
|
1482 ;;
|
|
|
1483 ;; if "reg" dies in the comparison.
|
|
|
1484
|
|
|
1485 (define_peephole2
|
|
|
1486 [(set (match_operand 0 "register_operand" "")
|
|
|
1487 (match_operand 1 "h8300_dst_operand" ""))
|
|
|
1488 (set (cc0)
|
|
|
1489 (compare (match_dup 0)
|
|
|
1490 (match_operand 2 "h8300_src_operand" "")))]
|
|
|
1491 "TARGET_H8300SX
|
|
|
1492 && peep2_reg_dead_p (2, operands[0])
|
|
|
1493 && !reg_overlap_mentioned_p (operands[0], operands[2])
|
|
|
1494 && operands[2] != const0_rtx"
|
|
|
1495 [(set (cc0)
|
|
|
1496 (compare (match_dup 1)
|
|
|
1497 (match_dup 2)))])
|
|
|
1498
|
|
|
1499 ;; Likewise for the second operand.
|
|
|
1500
|
|
|
1501 (define_peephole2
|
|
|
1502 [(set (match_operand 0 "register_operand" "")
|
|
|
1503 (match_operand 1 "h8300_src_operand" ""))
|
|
|
1504 (set (cc0)
|
|
|
1505 (compare (match_operand 2 "h8300_dst_operand" "")
|
|
|
1506 (match_dup 0)))]
|
|
|
1507 "TARGET_H8300SX
|
|
|
1508 && peep2_reg_dead_p (2, operands[0])
|
|
|
1509 && !reg_overlap_mentioned_p (operands[0], operands[2])"
|
|
|
1510 [(set (cc0)
|
|
|
1511 (compare (match_dup 2)
|
|
|
1512 (match_dup 1)))])
|
|
|
1513
|
|
|
1514 ;; Combine two moves.
|
|
|
1515
|
|
|
1516 (define_peephole2
|
|
|
1517 [(set (match_operand 0 "register_operand" "")
|
|
|
1518 (match_operand 1 "h8300_src_operand" ""))
|
|
|
1519 (set (match_operand 2 "h8300_dst_operand" "")
|
|
|
1520 (match_dup 0))]
|
|
|
1521 "TARGET_H8300SX
|
|
|
1522 && peep2_reg_dead_p (2, operands[0])
|
|
|
1523 && !reg_overlap_mentioned_p (operands[0], operands[2])"
|
|
|
1524 [(set (match_dup 2)
|
|
|
1525 (match_dup 1))])
|
|
|
1526
|
|
|
1527
|
