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1 /* { dg-do compile } */
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2 /* { dg-options "-mdejagnu-cpu=future" } */
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3
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4 #include <altivec.h>
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5
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6 extern void abort (void);
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7
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8 int main (int argc, short *argv [])
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9 {
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10 vector unsigned short input1 =
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11 { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
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12 vector unsigned short expected1 =
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13 { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
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14 vector unsigned short input2 =
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15 { 0x1, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
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16 vector unsigned short expected2 =
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17 { 0x0, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
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18 vector unsigned short input3 =
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19 { 0x1, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0x0 };
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20 vector unsigned short expected3 =
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21 { 0x0, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0x0 };
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22 vector unsigned short input4 =
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23 { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0x0 };
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24 vector unsigned short expected4 =
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25 { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
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26
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27 if (vec_strir_p (input1))
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28 abort ();
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29 if (!vec_strir_p (input2))
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30 abort ();
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31 if (!vec_strir_p (input3))
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32 abort ();
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33 if (!vec_strir_p (input4))
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34 abort ();
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35
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36 }
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37
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38 /* Enforce that exactly four dot-form instructions which are properly biased
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39 for the target's endianness implement this built-in. */
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40
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41 /* { dg-final { scan-assembler-times {\mvstrihr\.} 4 { target { be } } } } */
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42 /* { dg-final { scan-assembler-times {\mvstrihr\M[^.]} 0 { target { be } } } } */
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43 /* { dg-final { scan-assembler-times {\mvstrihl} 0 { target { be } } } } */
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44 /* { dg-final { scan-assembler-times {\mvstrihl\.} 4 { target { le } } } } */
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45 /* { dg-final { scan-assembler-times {\mvstrihl\M[^.]} 0 { target { le } } } } */
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46 /* { dg-final { scan-assembler-times {\mvstrihr} 0 { target { le } } } } */
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