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annotate libgcc/config/microblaze/udivsi3.asm @ 68:561a7518be6b

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update gcc-4.6
author Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
date Sun, 21 Aug 2011 07:07:55 +0900
parents
children
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68
561a7518be6b update gcc-4.6
Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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1 ###################################-
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2 #
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3 # Copyright 2009, 2010 Free Software Foundation, Inc.
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4 #
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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5 # Contributed by Michael Eager <eager@eagercon.com>.
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6 #
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7 # This file is free software; you can redistribute it and/or modify it
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8 # under the terms of the GNU General Public License as published by the
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9 # Free Software Foundation; either version 3, or (at your option) any
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10 # later version.
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11 #
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12 # GCC is distributed in the hope that it will be useful, but WITHOUT
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13 # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 # or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 # License for more details.
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16 #
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17 # Under Section 7 of GPL version 3, you are granted additional
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18 # permissions described in the GCC Runtime Library Exception, version
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19 # 3.1, as published by the Free Software Foundation.
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20 #
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21 # You should have received a copy of the GNU General Public License and
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22 # a copy of the GCC Runtime Library Exception along with this program;
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23 # see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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24 # <http://www.gnu.org/licenses/>.
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25 #
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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26 # udivsi3.asm
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27 #
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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28 # Unsigned divide operation.
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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29 # Input : Divisor in Reg r5
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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30 # Dividend in Reg r6
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31 # Output: Result in Reg r3
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32 #
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33 #######################################
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34
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35 .globl __udivsi3
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36 .ent __udivsi3
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37 .type __udivsi3,@function
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38 __udivsi3:
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39 .frame r1,0,r15
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40
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41 ADDIK r1,r1,-12
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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42 SWI r29,r1,0
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43 SWI r30,r1,4
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44 SWI r31,r1,8
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45
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46 BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
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47 BEQID r5,$LaResult_Is_Zero # Result is Zero
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48 ADDIK r30,r0,0 # Clear mod
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49 ADDIK r29,r0,32 # Initialize the loop count
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50
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51 # Check if r6 and r5 are equal # if yes, return 1
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52 RSUB r18,r5,r6
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53 BEQID r18,$LaRETURN_HERE
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54 ADDIK r3,r0,1
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55
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56 # Check if (uns)r6 is greater than (uns)r5. In that case, just return 0
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57 XOR r18,r5,r6
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58 BGEID r18,16
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59 ADD r3,r0,r0 # We would anyways clear r3
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60 BLTI r6,$LaRETURN_HERE # r6[bit 31 = 1] hence is greater
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61 BRI $LCheckr6
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62 RSUB r18,r6,r5 # MICROBLAZEcmp
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63 BLTI r18,$LaRETURN_HERE
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64
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65 # If r6 [bit 31] is set, then return result as 1
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66 $LCheckr6:
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67 BGTI r6,$LaDIV0
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68 BRID $LaRETURN_HERE
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69 ADDIK r3,r0,1
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70
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71 # First part try to find the first '1' in the r5
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72 $LaDIV0:
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73 BLTI r5,$LaDIV2
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74 $LaDIV1:
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75 ADD r5,r5,r5 # left shift logical r5
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76 BGTID r5,$LaDIV1
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77 ADDIK r29,r29,-1
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78 $LaDIV2:
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79 ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry
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80 ADDC r30,r30,r30 # Move that bit into the Mod register
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81 RSUB r31,r6,r30 # Try to subtract (r30 a r6)
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82 BLTI r31,$LaMOD_TOO_SMALL
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83 OR r30,r0,r31 # Move the r31 to mod since the result was positive
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84 ADDIK r3,r3,1
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85 $LaMOD_TOO_SMALL:
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86 ADDIK r29,r29,-1
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87 BEQi r29,$LaLOOP_END
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88 ADD r3,r3,r3 # Shift in the '1' into div
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89 BRI $LaDIV2 # Div2
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90 $LaLOOP_END:
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91 BRI $LaRETURN_HERE
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92 $LaDiv_By_Zero:
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93 $LaResult_Is_Zero:
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94 OR r3,r0,r0 # set result to 0
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95 $LaRETURN_HERE:
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96 # Restore values of CSRs and that of r3 and the divisor and the dividend
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97 LWI r29,r1,0
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98 LWI r30,r1,4
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99 LWI r31,r1,8
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100 RTSD r15,8
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101 ADDIK r1,r1,12
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102 .end __udivsi3
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103 .size __udivsi3, . - __udivsi3