Mercurial > hg > CbC > CbC_gcc

annotate gcc/config/s390/2097.md @ 55:77e2b8dfacca gcc-4.4.5

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents 3bfb6c00c1e0
children f6334be47118
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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1 ;; Scheduling description for z10 (cpu 2097).
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2 ;; Copyright (C) 2008 Free Software Foundation, Inc.
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3 ;; Contributed by Wolfgang Gellerich (gellerich@de.ibm.com).
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4
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5
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6 ; General naming conventions used in this file:
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7 ; - The two pipelines are called S and T, respectively.
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8 ; - A name ending "_S" or "_T" indicates that something happens in
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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9 ; (or belongs to) this pipeline.
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10 ; - A name ending "_ANY" indicates that something happens in (or belongs
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11 ; to) either of the two pipelines.
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12 ; - A name ending "_BOTH" indicates that something happens in (or belongs
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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13 ; to) both pipelines.
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14
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15
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16 ;; Automaton and components.
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17
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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18 (define_automaton "z10_cpu")
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19
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20 (define_cpu_unit "z10_e1_S, z10_e1_T" "z10_cpu")
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21 (define_reservation "z10_e1_ANY" "(z10_e1_S | z10_e1_T)")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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22 (define_reservation "z10_e1_BOTH" "(z10_e1_S + z10_e1_T)")
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23
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24
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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25 ; Both pipelines can execute a branch instruction, and branch
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26 ; instructions can be grouped with all other groupable instructions
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27 ; but not with a second branch instruction.
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28
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29 (define_cpu_unit "z10_branch_ANY" "z10_cpu")
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30
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31 (define_insn_reservation "z10_branch" 4
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32 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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33 (eq_attr "type" "branch"))
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34 "z10_branch_ANY + z10_e1_ANY, z10_Gate_ANY")
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35
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36
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37 ; Z10 operand and result forwarding.
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38
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39 ; Instructions marked with the attributes as z10_fwd or z10_fr can
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40 ; forward a value they load from one of their operants into a register
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41 ; if the instruction in the second pipeline reads the same register.
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42 ; The second operation must be superscalar. Instructions marked as
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43 ; z10_rec or z10_fr can receive a value they read from a register is
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44 ; this register gets updated by an instruction in the first pipeline.
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45 ; The first instruction must be superscalar.
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46
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47
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48 ; Forwarding from z10_fwd and z10_fr to z10_super.
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49
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50 (define_bypass 0 "z10_la_fwd, z10_la_fwd_A1, z10_larl_fwd, z10_larl_fwd_A3, \
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51 z10_load_fwd, z10_load_fwd_A3, \
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52 z10_other_fwd, z10_other_fwd_A1, z10_other_fwd_A3, \
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53 z10_other_fr, z10_other_fr_A3, z10_other_fr_E1, \
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54 z10_other_fwd_E1, z10_lr_fr, z10_lr_fr_E1, \
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55 z10_int_fwd, z10_int_fwd_A1, z10_int_fwd_A3, \
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56 z10_int_fwd_E1, z10_int_fr, z10_int_fr_E1, \
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57 z10_int_fr_A3"
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58 "z10_other_super, z10_other_super_c_E1, z10_other_super_E1, \
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59 z10_int_super, z10_int_super_E1, \
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60 z10_lr, z10_store_super"
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61 " ! s390_agen_dep_p")
0
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62
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63
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64 ; Forwarding from z10_super to frz10_ and z10_rec.
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65
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66 (define_bypass 0 "z10_other_super, z10_other_super_E1, z10_other_super_c_E1, \
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67 z10_int_super, z10_int_super_E1, \
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68 z10_larl_super_E1, z10_larl_super, \
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69 z10_store_super"
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70 "z10_int_fr, z10_int_fr_E1, z10_int_fr_A3, \
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71 z10_other_fr, z10_other_fr_A3, z10_lr_fr, z10_lr_fr_E1, \
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72 z10_other_fr_E1, z10_store_rec"
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73 " ! s390_agen_dep_p")
0
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74
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75
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76 ; Forwarding from z10_fwd and z10_fr to z10_rec and z10_fr.
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77
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78 (define_bypass 0 "z10_la_fwd, z10_la_fwd_A1, z10_larl_fwd, z10_larl_fwd_A3, \
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79 z10_load_fwd, z10_load_fwd_A3, \
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80 z10_other_fwd, z10_other_fwd_A1, z10_other_fwd_A3, \
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81 z10_other_fr, z10_other_fr_A3, z10_other_fr_E1, \
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82 z10_other_fwd_E1, \
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83 z10_lr_fr, z10_lr_fr_E1, \
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84 z10_int_fwd, z10_int_fwd_A1, z10_int_fwd_A3, \
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85 z10_int_fwd_E1, z10_int_fr, z10_int_fr_E1, \
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86 z10_int_fr_A3"
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87 "z10_int_fr, z10_int_fr_E1, z10_int_fr_A3, \
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88 z10_other_fr, z10_other_fr_A3, z10_lr_fr, z10_lr_fr_E1, \
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89 z10_other_fr_E1, z10_store_rec"
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90 " ! s390_agen_dep_p")
0
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91
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92
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93 ;
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94 ; Simple insns
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95 ;
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96
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97 ; Here is the cycle diagram for FXU-executed instructions:
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98 ; ... A1 A2 A3 E1 P1 P2 P3 R0 ...
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99 ; ^ ^ ^
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100 ; | | updated GPR is available
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101 ; | write to GPR
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102 ; instruction reads GPR during this cycle
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103
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104
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105 ; Variants of z10_int follow.
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106
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107 (define_insn_reservation "z10_int" 6
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108 (and (and (eq_attr "cpu" "z10")
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109 (eq_attr "type" "integer"))
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110 (and (eq_attr "atype" "reg")
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111 (and (and (eq_attr "z10prop" "!z10_super")
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112 (eq_attr "z10prop" "!z10_super_c"))
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113 (and (and (and (and (eq_attr "z10prop" "!z10_super_E1")
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114 (eq_attr "z10prop" "!z10_super_c_E1"))
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115 (eq_attr "z10prop" "!z10_fwd"))
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116 (and (eq_attr "z10prop" "!z10_fwd_A1")
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117 (eq_attr "z10prop" "!z10_fwd_A3")))
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118 (and (and (eq_attr "z10prop" "!z10_fwd_E1")
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119 (eq_attr "z10prop" "!z10_fr"))
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120 (and (eq_attr "z10prop" "!z10_fr_E1")
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121 (eq_attr "z10prop" "!z10_fr_A3")))))))
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122 "z10_e1_ANY, z10_Gate_ANY")
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123
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124 (define_insn_reservation "z10_int_super" 6
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125 (and (eq_attr "cpu" "z10")
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126 (and (eq_attr "type" "integer")
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127 (and (eq_attr "atype" "reg")
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128 (ior (eq_attr "z10prop" "z10_super")
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129 (eq_attr "z10prop" "z10_super_c")))))
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130 "z10_e1_ANY, z10_Gate_ANY")
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131
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132 (define_insn_reservation "z10_int_super_E1" 6
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133 (and (eq_attr "cpu" "z10")
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134 (and (eq_attr "type" "integer")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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135 (and (eq_attr "atype" "reg")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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136 (ior (eq_attr "z10prop" "z10_super_E1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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137 (eq_attr "z10prop" "z10_super_c_E1")))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
138 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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139
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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140 (define_insn_reservation "z10_int_fwd" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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141 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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142 (and (eq_attr "type" "integer")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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143 (and (eq_attr "atype" "reg")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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144 (eq_attr "z10prop" "z10_fwd"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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145 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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146
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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147 (define_insn_reservation "z10_int_fwd_A1" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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148 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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149 (and (eq_attr "type" "integer")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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150 (and (eq_attr "atype" "reg")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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151 (eq_attr "z10prop" "z10_fwd_A1"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
152 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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153
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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154 (define_insn_reservation "z10_int_fwd_A3" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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155 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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156 (and (eq_attr "type" "integer")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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157 (and (eq_attr "atype" "reg")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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158 (eq_attr "z10prop" "z10_fwd_A3"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
159 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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160
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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161 (define_insn_reservation "z10_int_fwd_E1" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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162 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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163 (and (eq_attr "type" "integer")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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164 (and (eq_attr "atype" "reg")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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165 (eq_attr "z10prop" "z10_fwd_E1"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
166 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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167
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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168 (define_insn_reservation "z10_int_fr" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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169 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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170 (and (eq_attr "type" "integer")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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171 (and (eq_attr "atype" "reg")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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172 (eq_attr "z10prop" "z10_fr"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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173 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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174
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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175 (define_insn_reservation "z10_int_fr_E1" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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176 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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177 (and (eq_attr "type" "integer")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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178 (and (eq_attr "atype" "reg")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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179 (eq_attr "z10prop" "z10_fr_E1"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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180 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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181
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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182 (define_insn_reservation "z10_int_fr_A3" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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183 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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184 (and (eq_attr "type" "integer")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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185 (and (eq_attr "atype" "reg")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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186 (eq_attr "z10prop" "z10_fr_A3"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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187 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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188
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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189 ; END of z10_int variants
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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190
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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191
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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192 (define_insn_reservation "z10_agen" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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193 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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194 (and (eq_attr "type" "integer")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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195 (eq_attr "atype" "agen")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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196 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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197
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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198
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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199 (define_insn_reservation "z10_lr" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
200 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
201 (and (eq_attr "type" "lr")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
202 (and (eq_attr "z10prop" "!z10_fr")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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203 (eq_attr "z10prop" "!z10_fr_E1"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
204 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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205
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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206 (define_insn_reservation "z10_lr_fr" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
207 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
208 (and (eq_attr "type" "lr")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
209 (eq_attr "z10prop" "z10_fr")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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210 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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211
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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212 (define_insn_reservation "z10_lr_fr_E1" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
213 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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214 (and (eq_attr "type" "lr")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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215 (eq_attr "z10prop" "z10_fr_E1")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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216 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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217
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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218 (define_insn_reservation "z10_la" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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219 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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220 (and (eq_attr "type" "la")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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221 (and (eq_attr "z10prop" "!z10_fwd")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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222 (eq_attr "z10prop" "!z10_fwd_A1"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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223 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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224
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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225 (define_insn_reservation "z10_la_fwd" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
226 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
227 (and (eq_attr "type" "la")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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228 (eq_attr "z10prop" "z10_fwd")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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229 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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230
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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231 (define_insn_reservation "z10_la_fwd_A1" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
232 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
233 (and (eq_attr "type" "la")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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234 (eq_attr "z10prop" "z10_fwd_A1")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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235 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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236
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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237
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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238 ; larl-type instructions
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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239
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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240 (define_insn_reservation "z10_larl" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
241 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
242 (and (eq_attr "type" "larl")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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243 (and (eq_attr "z10prop" "!z10_super_A1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
244 (and (eq_attr "z10prop" "!z10_fwd")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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245 (and (eq_attr "z10prop" "!z10_fwd_A3")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
246 (and (eq_attr "z10prop" "!z10_super")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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247 (eq_attr "z10prop" "!z10_super_c"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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248 (and (eq_attr "z10prop" "!z10_super_E1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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249 (eq_attr "z10prop" "!z10_super_c_E1")))))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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250 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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251
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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252 (define_insn_reservation "z10_larl_super" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
253 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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254 (and (eq_attr "type" "larl")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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255 (and (eq_attr "z10prop" "z10_super")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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256 (eq_attr "z10prop" "z10_super_c"))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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257 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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258
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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259 (define_insn_reservation "z10_larl_fwd" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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260 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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261 (and (eq_attr "type" "larl")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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262 (eq_attr "z10prop" "z10_fwd")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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263 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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264
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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265 (define_insn_reservation "z10_larl_fwd_A3" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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266 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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267 (and (eq_attr "type" "larl")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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268 (eq_attr "z10prop" "z10_fwd_A3")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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269 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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270
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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271
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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272 (define_insn_reservation "z10_larl_A1" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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273 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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274 (and (eq_attr "type" "larl")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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275 (eq_attr "z10prop" "z10_super_A1")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
276 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
277 ; "z10_e1_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
278
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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279 (define_insn_reservation "z10_larl_super_E1" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
280 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
281 (and (eq_attr "type" "larl")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
282 (ior (eq_attr "z10prop" "z10_super_E1")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
283 (eq_attr "z10prop" "z10_super_c_E1"))))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
284 "z10_e1_ANY, z10_Gate_ANY")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
285 ; "z10_e1_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
286
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
287
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
288 (define_insn_reservation "z10_load" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
289 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
290 (and (eq_attr "type" "load")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
291 (and (eq_attr "z10prop" "!z10_fwd")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
292 (eq_attr "z10prop" "!z10_fwd_A3"))))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
293 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
294
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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295 (define_insn_reservation "z10_load_fwd" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
296 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
297 (and (eq_attr "type" "load")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
298 (eq_attr "z10prop" "z10_fwd")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
299 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
300 ; "z10_e1_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
301
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
302 (define_insn_reservation "z10_load_fwd_A3" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
303 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
304 (and (eq_attr "type" "load")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
305 (eq_attr "z10prop" "z10_fwd_A3")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
306 "z10_e1_ANY, z10_Gate_ANY")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
307 ; "z10_e1_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
308
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
309 (define_insn_reservation "z10_store" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
310 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
311 (and (eq_attr "type" "store")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
312 (and (eq_attr "z10prop" "!z10_rec")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
313 (and (eq_attr "z10prop" "!z10_super")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
314 (eq_attr "z10prop" "!z10_super_c")))))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
315 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
316
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
317 (define_insn_reservation "z10_store_super" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
318 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
319 (and (eq_attr "type" "store")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
320 (ior (eq_attr "z10prop" "z10_super")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
321 (eq_attr "z10prop" "z10_super_c"))))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
322 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
323
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
324 (define_insn_reservation "z10_store_rec" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
325 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
326 (and (eq_attr "type" "store")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
327 (eq_attr "z10prop" "z10_rec")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
328 "z10_e1_ANY, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
329
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
330 ; The default_latency is chosen to drain off the pipeline.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
331 (define_insn_reservation "z10_call" 14
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
332 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
333 (eq_attr "type" "jsr"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
334 "z10_e1_BOTH*4, z10_Gate_BOTH")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
335
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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336 ; The default latency is for worst case. CS and CSG take one
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
337 ; cycle only (i.e. latency would be 6).
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
338 (define_insn_reservation "z10_sem" 9
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
339 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
340 (eq_attr "type" "sem"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
341 "z10_e1_BOTH*5, z10_Gate_ANY")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
342
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
343 (define_insn_reservation "z10_cs" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
344 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
345 (eq_attr "type" "cs"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
346 "z10_e1_BOTH, z10_Gate_BOTH")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
347
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
348 (define_insn_reservation "z10_vs" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
349 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
350 (eq_attr "type" "vs"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
351 "z10_e1_BOTH*4, z10_Gate_BOTH")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
352
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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353 ; Load and store multiple. Actual number of cycles
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
354 ; in unknown at compile.time.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
355 (define_insn_reservation "z10_stm" 10
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
356 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
357 (ior (eq_attr "type" "stm")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
358 (eq_attr "type" "lm")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
359 "z10_e1_BOTH*4, z10_Gate_BOTH")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
360
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
361
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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362 ; Subsets of z10_other follow.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
363
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
364 (define_insn_reservation "z10_other" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
365 (and (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
366 (eq_attr "type" "other"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
367 (and (and (eq_attr "z10prop" "!z10_fwd")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
368 (eq_attr "z10prop" "!z10_fwd_A1"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
369 (and (and (and (eq_attr "z10prop" "!z10_fr_A3")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
370 (eq_attr "z10prop" "!z10_fwd_A3"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
371 (and (eq_attr "z10prop" "!z10_fr")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
372 (eq_attr "z10prop" "!z10_fr_E1")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
373 (and (and (and (eq_attr "z10prop" "!z10_super")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
374 (eq_attr "z10prop" "!z10_super_c"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
375 (eq_attr "z10prop" "!z10_super_c_E1"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
376 (and (eq_attr "z10prop" "!z10_super_E1")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
377 (eq_attr "z10prop" "!z10_fwd_E1"))))))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
378 "z10_e1_BOTH, z10_Gate_BOTH")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
379
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
380 (define_insn_reservation "z10_other_fr_E1" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
381 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
382 (and (eq_attr "type" "other")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
383 (eq_attr "z10prop" "z10_fr_E1")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
384 "z10_e1_BOTH, z10_Gate_BOTH")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
385
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
386 (define_insn_reservation "z10_other_super_c_E1" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
387 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
388 (and (eq_attr "type" "other")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
389 (eq_attr "z10prop" "z10_super_c_E1")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
390 "z10_e1_BOTH, z10_Gate_BOTH")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
391
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
392 (define_insn_reservation "z10_other_super_E1" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
393 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
394 (and (eq_attr "type" "other")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
395 (eq_attr "z10prop" "z10_super_E1")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
396 "z10_e1_BOTH, z10_Gate_BOTH")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
397
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
398 (define_insn_reservation "z10_other_fwd_E1" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
399 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
400 (and (eq_attr "type" "other")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
401 (eq_attr "z10prop" "z10_fwd_E1")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
402 "z10_e1_BOTH, z10_Gate_BOTH")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
403
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
404 (define_insn_reservation "z10_other_fwd" 6
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
405 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
406 (and (eq_attr "type" "other")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
407 (eq_attr "z10prop" "z10_fwd")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
408 "z10_e1_BOTH, z10_Gate_BOTH")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
409
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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410 (define_insn_reservation "z10_other_fwd_A3" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
411 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
412 (and (eq_attr "type" "other")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
413 (eq_attr "z10prop" "z10_fwd_A3")))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
414 "z10_e1_BOTH, z10_Gate_BOTH")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
415
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
416 (define_insn_reservation "z10_other_fwd_A1" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
417 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
418 (and (eq_attr "type" "other")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
419 (eq_attr "z10prop" "z10_fwd_A1")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
420 "z10_e1_BOTH, z10_Gate_BOTH")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
421
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
422 (define_insn_reservation "z10_other_fr" 6
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
423 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
424 (and (eq_attr "type" "other")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
425 (eq_attr "z10prop" "z10_fr")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
426 "z10_e1_BOTH, z10_Gate_BOTH")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
427
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
428 (define_insn_reservation "z10_other_fr_A3" 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
429 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
430 (and (eq_attr "type" "other")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
431 (eq_attr "z10prop" "z10_fr_A3")))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
432 "z10_e1_BOTH, z10_Gate_BOTH")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
433
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
434 (define_insn_reservation "z10_other_super" 6
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
435 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
436 (and (eq_attr "type" "other")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
437 (ior (eq_attr "z10prop" "z10_super")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
438 (eq_attr "z10prop" "z10_super_c"))))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
439 "z10_e1_BOTH, z10_Gate_BOTH")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
440
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
441 ; END of z10_other subsets.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
442
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
443
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
444 ;
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
445 ; Floating point insns
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
446 ;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
447
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
448 ; Z10 executes the following integer operations in the BFU pipeline.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
449
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
450 (define_insn_reservation "z10_mul_sidi" 12
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
451 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
452 (eq_attr "type" "imulsi,imuldi,imulhi"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
453 "z10_e1_BOTH, z10_Gate_FP")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
454
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
455 ; Some variants take fewer cycles, but that is not relevant here.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
456 (define_insn_reservation "z10_div" 162
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
457 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
458 (eq_attr "type" "idiv"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
459 "z10_e1_BOTH*4, z10_Gate_FP")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
460
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
461
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
462 ; BFP multiplication and general instructions
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
463
36
855418dad1a3 gcc-4.4-20091020
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parents: 0
diff changeset
464 (define_insn_reservation "z10_fsimpdf" 6
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
465 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
466 (eq_attr "type" "fsimpdf,fmuldf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
467 "z10_e1_BOTH, z10_Gate_FP")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
468
36
855418dad1a3 gcc-4.4-20091020
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parents: 0
diff changeset
469 ; LOAD ZERO produces a hex value but we need bin. Using the stage 7
855418dad1a3 gcc-4.4-20091020
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parents: 0
diff changeset
470 ; bypass causes an exception for format conversion which is very
855418dad1a3 gcc-4.4-20091020
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parents: 0
diff changeset
471 ; expensive. So, make sure subsequent instructions only get the zero
855418dad1a3 gcc-4.4-20091020
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parents: 0
diff changeset
472 ; in the normal way.
855418dad1a3 gcc-4.4-20091020
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parents: 0
diff changeset
473 (define_insn_reservation "z10_fhex" 12
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parents: 0
diff changeset
474 (and (eq_attr "cpu" "z10")
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parents: 0
diff changeset
475 (eq_attr "type" "fhex"))
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parents: 0
diff changeset
476 "z10_e1_BOTH, z10_Gate_FP")
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parents: 0
diff changeset
477
855418dad1a3 gcc-4.4-20091020
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parents: 0
diff changeset
478 (define_insn_reservation "z10_fsimpsf" 6
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
479 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
480 (eq_attr "type" "fsimpsf,fmulsf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
481 "z10_e1_BOTH, z10_Gate_FP")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
482
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
483 (define_insn_reservation "z10_fmultf" 52
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
484 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
485 (eq_attr "type" "fmultf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
486 "z10_e1_BOTH*4, z10_Gate_FP")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
487
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
488 (define_insn_reservation "z10_fsimptf" 14
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
489 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
490 (eq_attr "type" "fsimptf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
491 "z10_e1_BOTH*2, z10_Gate_FP")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
492
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
493
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
494 ; BFP division
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
495
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
496 (define_insn_reservation "z10_fdivtf" 113
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
497 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
498 (eq_attr "type" "fdivtf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
499 "z10_e1_T*4, z10_Gate_FP")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
500
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
501 (define_insn_reservation "z10_fdivdf" 41
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
502 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
503 (eq_attr "type" "fdivdf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
504 "z10_e1_T*4, z10_Gate_FP")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
505
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
506 (define_insn_reservation "z10_fdivsf" 34
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
507 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
508 (eq_attr "type" "fdivsf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
509 "z10_e1_T*4, z10_Gate_FP")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
510
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
511
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
512 ; BFP sqrt
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
513
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
514 (define_insn_reservation "z10_fsqrtsf" 41
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
515 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
516 (eq_attr "type" "fsqrtsf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
517 "z10_e1_T*4, z10_Gate_FP")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
518
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
519 (define_insn_reservation "z10_fsqrtdf" 54
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
520 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
521 (eq_attr "type" "fsqrtdf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
522 "z10_e1_T*4, z10_Gate_FP")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
523
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
524 (define_insn_reservation "z10_fsqrtf" 122
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
525 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
526 (eq_attr "type" "fsqrttf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
527 "z10_e1_T*4, z10_Gate_FP")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
528
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
529
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
530 ; BFP load and store
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
531
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
532 (define_insn_reservation "z10_floadtf" 12
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
533 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
534 (eq_attr "type" "floadtf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
535 "z10_e1_T, z10_Gate_FP")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
536
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parents: 0
diff changeset
537 (define_insn_reservation "z10_floaddf" 1
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
538 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
539 (eq_attr "type" "floaddf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
540 "z10_e1_T, z10_Gate_FP")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
541
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parents: 0
diff changeset
542 (define_insn_reservation "z10_floadsf" 1
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
543 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
544 (eq_attr "type" "floadsf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
545 "z10_e1_T, z10_Gate_FP")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
546
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
547 (define_insn_reservation "z10_fstoredf" 12
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
548 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
549 (eq_attr "type" "fstoredf,fstoredd"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
550 "z10_e1_T, z10_Gate_FP")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
551
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
552 (define_insn_reservation "z10_fstoresf" 12
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
553 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
554 (eq_attr "type" "fstoresf,fstoresd"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
555 "z10_e1_T, z10_Gate_FP")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
556
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
557
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
558 ; BFP truncate
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parents: 0
diff changeset
559 (define_insn_reservation "z10_ftrunctf" 16
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
560 (and (eq_attr "cpu" "z10")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
561 (eq_attr "type" "ftrunctf"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
562 "z10_e1_T, z10_Gate_FP")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
563
36
855418dad1a3 gcc-4.4-20091020
e075725
parents: 0
diff changeset
564 (define_insn_reservation "z10_ftruncdf" 12
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
565 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
566 (eq_attr "type" "ftruncdf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
567 "z10_e1_T, z10_Gate_FP")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
568
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
569
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
570 ; Conversion between BFP and int.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
571 (define_insn_reservation "z10_ftoi" 13
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
572 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
573 (eq_attr "type" "ftoi"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
574 "z10_e1_T, z10_Gate_FP")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
575
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
576 (define_insn_reservation "z10_itoftf" 14
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
577 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
578 (eq_attr "type" "itoftf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
579 "z10_e1_T*2, z10_Gate_FP")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
580
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
581 (define_insn_reservation "z10_itofsfdf" 12
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
582 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
583 (eq_attr "type" "itofdf,itofsf"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
584 "z10_e1_T, z10_Gate_FP")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
585
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
586
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
587
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
588 ; BFP-related bypasses. There is no bypass for extended mode.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
589 (define_bypass 1 "z10_fsimpdf" "z10_fstoredf")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
590 (define_bypass 1 "z10_fsimpsf" "z10_fstoresf")
36
855418dad1a3 gcc-4.4-20091020
e075725
parents: 0
diff changeset
591 (define_bypass 1 "z10_floaddf" "z10_fsimpdf, z10_fstoredf")
855418dad1a3 gcc-4.4-20091020
e075725
parents: 0
diff changeset
592 (define_bypass 1 "z10_floadsf" "z10_fsimpsf, z10_fstoresf")
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
593
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
594
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
595 ;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
596 ; insn_reservations for DFP instructions.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
597 ;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
598
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
599 ; Exact number of cycles is not known at compile-time.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
600 (define_insn_reservation "z10_fdivddtd" 40
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
601 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
602 (eq_attr "type" "fdivdd,fdivtd"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
603 "z10_e1_BOTH,z10_Gate_DFU")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
604
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
605 (define_insn_reservation "z10_ftruncsd" 38
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
606 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
607 (eq_attr "type" "ftruncsd"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
608 "z10_e1_BOTH*4,z10_Gate_DFU")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
609
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
610 (define_insn_reservation "z10_ftruncdd" 340
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
611 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
612 (eq_attr "type" "ftruncsd"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
613 "z10_e1_BOTH*4,z10_Gate_DFU")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
614
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
615 (define_insn_reservation "z10_floaddd" 12
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
616 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
617 (eq_attr "type" "floaddd"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
618 "z10_e1_BOTH,z10_Gate_DFU")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
619
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
620 (define_insn_reservation "z10_floadsd" 12
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
621 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
622 (eq_attr "type" "floadsd"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
623 "z10_e1_BOTH,z10_Gate_DFU")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
624
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
625 ; Exact number of cycles is not known at compile-time.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
626 (define_insn_reservation "z10_fmulddtd" 35
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
627 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
628 (eq_attr "type" "fmuldd,fmultd"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
629 "z10_e1_BOTH,z10_Gate_DFU")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
630
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
631 (define_insn_reservation "z10_fsimpdd" 17
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
632 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
633 (eq_attr "type" "fsimpdd"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
634 "z10_e1_BOTH,z10_Gate_DFU")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
635
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
636 (define_insn_reservation "z10_fsimpsd" 17
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
637 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
638 (eq_attr "type" "fsimpsd"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
639 "z10_e1_BOTH,z10_Gate_DFU")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
640
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
641 (define_insn_reservation "z10_fsimptd" 18
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
642 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
643 (eq_attr "type" "fsimptd"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
644 "z10_e1_BOTH,z10_Gate_DFU")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
645
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
646 (define_insn_reservation "z10_itofdd" 36
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
647 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
648 (eq_attr "type" "itofdd"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
649 "z10_e1_BOTH*3,z10_Gate_DFU")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
650
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
651 (define_insn_reservation "z10_itoftd" 49
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
652 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
653 (eq_attr "type" "itoftd"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
654 "z10_e1_BOTH*3,z10_Gate_DFU")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
655
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
656 ; Exact number of cycles is not known at compile-time.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
657 (define_insn_reservation "z10_ftoidfp" 30
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
658 (and (eq_attr "cpu" "z10")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
659 (eq_attr "type" "ftoidfp"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
660 "z10_e1_BOTH*3,z10_Gate_DFU")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
661
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
662
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
663 ;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
664 ; Address-related bypasses
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
665 ;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
666
47
3bfb6c00c1e0 update it from 4.4.2 to 4.4.3.
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents: 36
diff changeset
667 ; Here is the cycle diagram for address-related bypasses:
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
668 ; ... G1 G2 G3 A0 A1 A2 A3 E1 P1 P2 P3 R0 ...
47
3bfb6c00c1e0 update it from 4.4.2 to 4.4.3.
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents: 36
diff changeset
669 ; ^ ^ ^ ^ ^ ^
3bfb6c00c1e0 update it from 4.4.2 to 4.4.3.
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents: 36
diff changeset
670 ; | | | | | without bypass, its available AFTER this cycle
3bfb6c00c1e0 update it from 4.4.2 to 4.4.3.
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents: 36
diff changeset
671 ; | | | | E1-type bypasses provide the new value AFTER this cycle
3bfb6c00c1e0 update it from 4.4.2 to 4.4.3.
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents: 36
diff changeset
672 ; | | | A3-type bypasses provide the new value AFTER this cycle
3bfb6c00c1e0 update it from 4.4.2 to 4.4.3.
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents: 36
diff changeset
673 ; | | A1-type bypasses provide the new value AFTER this cycle
3bfb6c00c1e0 update it from 4.4.2 to 4.4.3.
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents: 36
diff changeset
674 ; | AGI resolution, actual USE of new value is DURING this cycle
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
675 ; AGI detection
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
676
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
677 (define_bypass 3 "z10_larl_A1, z10_la_fwd_A1, z10_other_fwd_A1, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
678 z10_int_fwd_A1"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
679 "z10_agen, z10_la, z10_branch, z10_call, z10_load, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
680 z10_store, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
681 z10_cs, z10_stm, z10_other"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
682 "s390_agen_dep_p")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
683
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
684 (define_bypass 5 "z10_larl_fwd_A3, z10_load_fwd_A3, z10_other_fwd_A3, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
685 z10_other_fr_A3, z10_int_fwd_A3, z10_int_fr_A3"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
686 "z10_agen, z10_la, z10_branch, z10_call, z10_load, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
687 z10_store, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
688 z10_cs, z10_stm, z10_other"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
689 "s390_agen_dep_p")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
690
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
691 (define_bypass 6 "z10_other_fr_E1, z10_other_super_c_E1, z10_other_super_E1, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
692 z10_other_fwd_E1, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
693 z10_lr_fr_E1, z10_larl_super_E1, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
694 z10_int_super_E1, z10_int_fwd_E1, z10_int_fr_E1"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
695 "z10_agen, z10_la, z10_branch, z10_call, z10_load, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
696 z10_store, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
697 z10_cs, z10_stm, z10_other"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
698 "s390_agen_dep_p")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
699
47
3bfb6c00c1e0 update it from 4.4.2 to 4.4.3.
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents: 36
diff changeset
700 (define_bypass 9 "z10_int_super, z10_int_fwd, z10_int_fr"
3bfb6c00c1e0 update it from 4.4.2 to 4.4.3.
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents: 36
diff changeset
701 "z10_agen, z10_la, z10_branch, z10_call, z10_load, \
3bfb6c00c1e0 update it from 4.4.2 to 4.4.3.
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents: 36
diff changeset
702 z10_store, \
3bfb6c00c1e0 update it from 4.4.2 to 4.4.3.
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents: 36
diff changeset
703 z10_cs, z10_stm, z10_other"
3bfb6c00c1e0 update it from 4.4.2 to 4.4.3.
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents: 36
diff changeset
704 "s390_agen_dep_p")
3bfb6c00c1e0 update it from 4.4.2 to 4.4.3.
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents: 36
diff changeset
705
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
706
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
707
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
708 ;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
709 ; Try to avoid transitions between DFU-, BFU- and FXU-executed instructions as there is a
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
710 ; dispatch delay required.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
711 ;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
712
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
713
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
714 ; Declaration for some pseudo-pipeline stages that reflect the
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
715 ; dispatch gap when issueing an INT/FXU/BFU-executed instruction after
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
716 ; an instruction executed by a different unit has been executed. The
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
717 ; approach is that we pretend a pipelined execution of BFU operations
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
718 ; with as many stages as the gap is long and request that none of
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
719 ; these stages is busy when issueing a FXU- or DFU-executed
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
720 ; instruction. Similar for FXU- and DFU-executed instructions.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
721
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
722 ; Declaration for FPU stages.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
723 (define_cpu_unit "z10_f0, z10_f1, z10_f2, z10_f3, z10_f4, z10_f5, z10_f6, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
724 z10_f7, z10_f8, z10_f9, z10_f10, z10_f11, z10_f12" "z10_cpu")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
725 (define_reservation "z10_FP_PP" "z10_f0, z10_f1, z10_f2, z10_f3, z10_f4, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
726 z10_f5, z10_f6, z10_f7, z10_f8, z10_f9, z10_f10, z10_f11, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
727 z10_f12")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
728
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
729 ; Declaration for FXU stages.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
730 (define_cpu_unit "z10_S1, z10_S2, z10_S3, z10_S4, z10_S5, z10_S6" "z10_cpu")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
731 (define_cpu_unit "z10_T1, z10_T2, z10_T3, z10_T4, z10_T5, z10_T6" "z10_cpu")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
732 (define_reservation "z10_INT_PP" "z10_S1 | z10_T1, z10_S2 | z10_T2, z10_S3 \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
733 | z10_T3, z10_S4 | z10_T4, z10_S5 | \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
734 z10_T5, z10_S6 | z10_T6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
735
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
736 ; Declaration for DFU stages.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
737 (define_cpu_unit "z10_d0, z10_d1, z10_d2, z10_d3, z10_d4, z10_d5, z10_d6"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
738 "z10_cpu")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
739 (define_reservation "z10_DFU_PP" "z10_d0, z10_d1, z10_d2, z10_d3, z10_d4, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
740 z10_d5, z10_d6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
741
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
742
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
743 ; Pseudo-units representing whether the respective unit is available
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
744 ; in the sense that using it does not cause a dispatch delay.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
745
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
746 (define_cpu_unit "z10_S_avail, z10_T_avail, z10_FP_avail, z10_DFU_avail"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
747 "z10_cpu")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
748
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
749 (absence_set "z10_FP_avail"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
750 "z10_S1, z10_S2, z10_S3, z10_S4, z10_S5, z10_S6, z10_T1, z10_T2, z10_T3, z10_T4, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
751 z10_T5, z10_T6, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
752 z10_d0, z10_d1, z10_d2, z10_d3, z10_d4, z10_d5, z10_d6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
753
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
754 (absence_set "z10_S_avail,z10_T_avail"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
755 "z10_f0, z10_f1, z10_f2, z10_f3, z10_f4, z10_f5, z10_f6, z10_f7, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
756 z10_f8, z10_f9, z10_f10, z10_f11, z10_f12, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
757 z10_d0, z10_d1, z10_d2, z10_d3, z10_d4, z10_d5, z10_d6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
758
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
759 (absence_set "z10_DFU_avail"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
760 "z10_S1, z10_S2, z10_S3, z10_S4, z10_S5, z10_S6, z10_T1, z10_T2, z10_T3, z10_T4, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
761 z10_T5, z10_T6, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
762 z10_f0, z10_f1, z10_f2, z10_f3, z10_f4, z10_f5, z10_f6, z10_f7, \
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
763 z10_f8, z10_f9, z10_f10, z10_f11, z10_f12")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
764
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
765
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
766 ; Pseudo-units to be used in insn_reservations.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
767
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
768 (define_reservation "z10_Gate_ANY" "((z10_S_avail | z10_T_avail), z10_INT_PP)")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
769 (define_reservation "z10_Gate_BOTH" "((z10_S_avail + z10_T_avail), z10_INT_PP)")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
770
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
771 (define_reservation "z10_Gate_FP" "z10_FP_avail, z10_FP_PP")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
772
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
773 (define_reservation "z10_Gate_DFU" "z10_DFU_avail, z10_DFU_PP")