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1 ;; DFA scheduling description of the Synopsys DesignWare ARC EM cpu
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2 ;; for GNU C compiler
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3 ;; Copyright (C) 2007-2018 Free Software Foundation, Inc.
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4 ;; Contributor: Claudiu Zissulescu <claudiu.zissulescu@synopsys.com>
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5
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6 ;; This file is part of GCC.
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7
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8 ;; GCC is free software; you can redistribute it and/or modify
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9 ;; it under the terms of the GNU General Public License as published by
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10 ;; the Free Software Foundation; either version 3, or (at your option)
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11 ;; any later version.
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12
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13 ;; GCC is distributed in the hope that it will be useful,
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14 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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15 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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16 ;; GNU General Public License for more details.
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17
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18 ;; You should have received a copy of the GNU General Public License
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19 ;; along with GCC; see the file COPYING3. If not see
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20 ;; <http://www.gnu.org/licenses/>.
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21
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22 (define_automaton "ARCEM")
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23
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24 (define_cpu_unit "em_issue, ld_st, mul_em, divrem_em" "ARCEM")
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25
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26 (define_insn_reservation "em_data_load" 2
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27 (and (match_test "TARGET_EM")
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28 (eq_attr "type" "load"))
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29 "em_issue+ld_st,nothing")
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30
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31 (define_insn_reservation "em_data_store" 1
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32 (and (match_test "TARGET_EM")
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33 (eq_attr "type" "store"))
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34 "em_issue+ld_st")
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35
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36 ;; Multipliers options
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37 (define_insn_reservation "mul_em_mpyw_1" 1
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38 (and (match_test "TARGET_EM")
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39 (match_test "arc_mpy_option > 0")
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40 (match_test "arc_mpy_option <= 2")
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41 (eq_attr "type" "mul16_em"))
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42 "em_issue+mul_em")
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43
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44 (define_insn_reservation "mul_em_mpyw_2" 2
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45 (and (match_test "TARGET_EM")
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46 (match_test "arc_mpy_option > 2")
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47 (match_test "arc_mpy_option <= 5")
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48 (eq_attr "type" "mul16_em"))
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49 "em_issue+mul_em, nothing")
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50
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51 (define_insn_reservation "mul_em_mpyw_4" 4
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52 (and (match_test "TARGET_EM")
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53 (match_test "arc_mpy_option == 6")
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54 (eq_attr "type" "mul16_em"))
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55 "em_issue+mul_em, mul_em*3")
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56
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57 (define_insn_reservation "mul_em_multi_wlh1" 1
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58 (and (match_test "TARGET_EM")
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59 (match_test "arc_mpy_option == 2")
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60 (eq_attr "type" "multi,umulti"))
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61 "em_issue+mul_em")
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62
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63 (define_insn_reservation "mul_em_multi_wlh2" 2
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64 (and (match_test "TARGET_EM")
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65 (match_test "arc_mpy_option == 3")
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66 (eq_attr "type" "multi,umulti"))
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67 "em_issue+mul_em, nothing")
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68
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69 (define_insn_reservation "mul_em_multi_wlh3" 3
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70 (and (match_test "TARGET_EM")
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71 (match_test "arc_mpy_option == 4")
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72 (eq_attr "type" "multi,umulti"))
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73 "em_issue+mul_em, mul_em*2")
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74
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75 ;; FIXME! Make the difference between MPY and MPYM for WLH4
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76 (define_insn_reservation "mul_em_multi_wlh4" 4
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77 (and (match_test "TARGET_EM")
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78 (match_test "arc_mpy_option == 5")
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79 (eq_attr "type" "multi,umulti"))
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80 "em_issue+mul_em, mul_em*4")
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81
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82 (define_insn_reservation "mul_em_multi_wlh5" 9
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83 (and (match_test "TARGET_EM")
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84 (match_test "arc_mpy_option == 6")
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85 (eq_attr "type" "multi,umulti"))
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86 "em_issue+mul_em, mul_em*8")
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87
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88 ;; Radix-4 divider timing
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89 (define_insn_reservation "em_divrem" 3
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90 (and (match_test "TARGET_EM")
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91 (match_test "TARGET_DIVREM")
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92 (eq_attr "type" "div_rem"))
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93 "em_issue+mul_em+divrem_em, (mul_em+divrem_em)*2")
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