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annotate gcc/config/arm/marvell-pj4.md @ 131:84e7813d76e9

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gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children 1830386684a0
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1 ;; Marvell ARM Processor Pipeline Description
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84e7813d76e9 gcc-8.2
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2 ;; Copyright (C) 2010-2018 Free Software Foundation, Inc.
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3 ;; Contributed by Marvell.
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4
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5 ;; This file is part of GCC.
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6
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7 ;; GCC is free software; you can redistribute it and/or modify it
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8 ;; under the terms of the GNU General Public License as published
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9 ;; by the Free Software Foundation; either version 3, or (at your
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10 ;; option) any later version.
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11
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12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 ;; License for more details.
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16
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17 ;; You should have received a copy of the GNU General Public License
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18 ;; along with GCC; see the file COPYING3. If not see
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19 ;; <http://www.gnu.org/licenses/>.
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20
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21 ;; Pipeline description for the Marvell PJ4, aka "Flareon".
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22 (define_automaton "pj4")
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23
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24 ;; Issue resources
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25 (define_cpu_unit "pj4_is1,pj4_is2" "pj4")
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26 (define_reservation "pj4_is" "(pj4_is1|pj4_is2)")
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27 (define_reservation "pj4_isb" "(pj4_is1+pj4_is2)")
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28
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29 ;; Functional units
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30 (define_cpu_unit "pj4_alu1,pj4_alu2,pj4_mul,pj4_div" "pj4")
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31
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32 ;; Completion ports
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33 (define_cpu_unit "pj4_w1,pj4_w2" "pj4")
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34
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35 ;; Complete/Retire control
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36 (define_cpu_unit "pj4_c1,pj4_c2" "pj4")
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37 (define_reservation "pj4_cp" "(pj4_c1|pj4_c2)")
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38 (define_reservation "pj4_cpb" "(pj4_c1+pj4_c2)")
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39
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40 ;; Integer arithmetic instructions
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41
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42 (define_insn_reservation "pj4_alu_e1" 1
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43 (and (eq_attr "tune" "marvell_pj4")
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44 (eq_attr "type" "mov_imm,mov_reg,mvn_imm,mvn_reg")
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45 (not (eq_attr "conds" "set")))
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46 "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)")
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47
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48 (define_insn_reservation "pj4_alu_e1_conds" 4
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49 (and (eq_attr "tune" "marvell_pj4")
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50 (eq_attr "type" "mov_imm,mov_reg,mvn_imm,mvn_reg")
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51 (eq_attr "conds" "set"))
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52 "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)")
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53
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54 (define_insn_reservation "pj4_alu" 1
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55 (and (eq_attr "tune" "marvell_pj4")
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56 (eq_attr "type" "alu_imm,alus_imm,alu_sreg,alus_sreg,\
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57 logic_imm,logics_imm,logic_reg,logics_reg,\
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58 adc_imm,adcs_imm,adc_reg,adcs_reg,\
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59 adr,bfm,rev,alu_dsp_reg,\
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60 shift_imm,shift_reg")
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61 (not (eq_attr "conds" "set")))
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62 "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)")
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63
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64 (define_insn_reservation "pj4_alu_conds" 4
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65 (and (eq_attr "tune" "marvell_pj4")
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66 (eq_attr "type" "alu_imm,alus_imm,alu_sreg,alus_sreg,\
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67 logic_imm,logics_imm,logic_reg,logics_reg,\
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68 adc_imm,adcs_imm,adc_reg,adcs_reg,\
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69 adr,bfm,rev,alu_dsp_reg,\
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70 shift_imm,shift_reg")
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71 (eq_attr "conds" "set"))
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72 "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)")
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73
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74 (define_insn_reservation "pj4_shift" 1
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75 (and (eq_attr "tune" "marvell_pj4")
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76 (eq_attr "type" "alu_shift_imm,logic_shift_imm,\
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77 alus_shift_imm,logics_shift_imm,\
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78 alu_shift_reg,logic_shift_reg,\
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79 alus_shift_reg,logics_shift_reg,\
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80 extend,\
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81 mov_shift,mvn_shift,mov_shift_reg,mvn_shift_reg")
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82 (not (eq_attr "conds" "set"))
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83 (eq_attr "shift" "1")) "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)")
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84
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85 (define_insn_reservation "pj4_shift_conds" 4
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86 (and (eq_attr "tune" "marvell_pj4")
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87 (eq_attr "type" "alu_shift_imm,logic_shift_imm,\
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88 alus_shift_imm,logics_shift_imm,\
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89 alu_shift_reg,logic_shift_reg,\
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90 alus_shift_reg,logics_shift_reg,\
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91 extend,\
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92 mov_shift,mvn_shift,mov_shift_reg,mvn_shift_reg")
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93 (eq_attr "conds" "set")
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94 (eq_attr "shift" "1")) "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)")
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95
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96 (define_insn_reservation "pj4_alu_shift" 1
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97 (and (eq_attr "tune" "marvell_pj4")
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98 (not (eq_attr "conds" "set"))
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99 (eq_attr "type" "alu_shift_imm,logic_shift_imm,\
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100 alus_shift_imm,logics_shift_imm,\
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101 alu_shift_reg,logic_shift_reg,\
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102 alus_shift_reg,logics_shift_reg,\
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103 extend,\
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104 mov_shift,mvn_shift,mov_shift_reg,mvn_shift_reg"))
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105 "pj4_is,(pj4_alu1,nothing,pj4_w1+pj4_cp)|(pj4_alu2,nothing,pj4_w2+pj4_cp)")
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106
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107 (define_insn_reservation "pj4_alu_shift_conds" 4
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108 (and (eq_attr "tune" "marvell_pj4")
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109 (eq_attr "conds" "set")
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110 (eq_attr "type" "alu_shift_imm,logic_shift_imm,alus_shift_imm,logics_shift_imm,\
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111 alu_shift_reg,logic_shift_reg,alus_shift_reg,logics_shift_reg,\
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112 extend,\
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113 mov_shift,mvn_shift,mov_shift_reg,mvn_shift_reg"))
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114 "pj4_is,(pj4_alu1,nothing,pj4_w1+pj4_cp)|(pj4_alu2,nothing,pj4_w2+pj4_cp)")
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115
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116 (define_bypass 2 "pj4_alu_shift,pj4_shift"
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117 "pj4_ir_mul,pj4_ir_div,pj4_core_to_vfp")
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118
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119 (define_insn_reservation "pj4_ir_mul" 3
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120 (and (eq_attr "tune" "marvell_pj4")
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121 (ior (eq_attr "mul32" "yes")
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122 (eq_attr "mul64" "yes")))
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123 "pj4_is,pj4_mul,nothing*2,pj4_cp")
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124
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125 (define_insn_reservation "pj4_ir_div" 20
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126 (and (eq_attr "tune" "marvell_pj4")
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127 (eq_attr "type" "udiv,sdiv")) "pj4_is,pj4_div*19,pj4_cp")
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128
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129 ;; Branches and calls.
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130
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131 (define_insn_reservation "pj4_branches" 0
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132 (and (eq_attr "tune" "marvell_pj4") (eq_attr "type" "branch")) "pj4_is")
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133
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134 (define_insn_reservation "pj4_calls" 32
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135 (and (eq_attr "tune" "marvell_pj4") (eq_attr "type" "call")) "pj4_is")
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136
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137 ;; Load/store instructions
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138
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139 (define_insn_reservation "pj4_ldr" 3
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140 (and (eq_attr "tune" "marvell_pj4")
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141 (eq_attr "type" "load_byte,load_4"))
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142 "pj4_is,pj4_alu1,nothing*2,pj4_cp")
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143
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144 (define_insn_reservation "pj4_ldrd" 3
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145 (and (eq_attr "tune" "marvell_pj4")
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146 (eq_attr "type" "load_8"))
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147 "pj4_is,pj4_alu1,nothing*2,pj4_cpb")
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148
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149 (define_insn_reservation "pj4_str" 1
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150 (and (eq_attr "tune" "marvell_pj4")
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151 (eq_attr "type" "store_4"))
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152 "pj4_is,pj4_alu1,nothing*2,pj4_cp")
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153
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154 (define_insn_reservation "pj4_strd" 1
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155 (and (eq_attr "tune" "marvell_pj4")
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156 (eq_attr "type" "store_8"))
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157 "pj4_is,pj4_alu1,nothing*2,pj4_cpb")
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158
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159 (define_insn_reservation "pj4_ldm" 4
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160 (and (eq_attr "tune" "marvell_pj4")
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161 (eq_attr "type" "load_12,load_16")) "pj4_isb,pj4_isb+pj4_alu1,pj4_alu1,nothing,pj4_cp,pj4_cp")
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162
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163 (define_insn_reservation "pj4_stm" 2
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164 (and (eq_attr "tune" "marvell_pj4")
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165 (eq_attr "type" "store_12,store_16")) "pj4_isb,pj4_isb+pj4_alu1,pj4_alu1,nothing,pj4_cp,pj4_cp")
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166
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167 ;; Loads forward at WR-stage to ALU pipes
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168 (define_bypass 2 "pj4_ldr,pj4_ldrd" "pj4_alu")
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169 (define_bypass 2 "pj4_ldr,pj4_ldrd" "pj4_alu_shift" "arm_no_early_alu_shift_dep")
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170
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171 (define_bypass 4 "pj4_ldr,pj4_ldrd" "pj4_ir_mul,pj4_ir_div,pj4_core_to_vfp")
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172 (define_bypass 5 "pj4_ldm" "pj4_ir_mul,pj4_ir_div,pj4_core_to_vfp")
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173
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174 ;; Loads to stores can back-to-back forward
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175 (define_bypass 1 "pj4_ldr,pj4_ldrd" "pj4_str,pj4_strd" "arm_no_early_store_addr_dep")
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176
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177 ;; PJ4 VFP floating point unit
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178 (define_automaton "pj4_vfp")
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179
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180 (define_cpu_unit "vissue" "pj4_vfp")
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181 (define_cpu_unit "vadd" "pj4_vfp")
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182 (define_cpu_unit "vmul" "pj4_vfp")
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183 (define_cpu_unit "vdiv" "pj4_vfp")
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184 (define_cpu_unit "vfast" "pj4_vfp")
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185
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186 (define_insn_reservation "pj4_vfp_add" 5
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187 (and (eq_attr "tune" "marvell_pj4")
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188 (eq_attr "type" "fadds,faddd")) "pj4_is,nothing*2,vissue,vadd,nothing*3")
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189
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190 (define_insn_reservation "pj4_vfp_mul" 6
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191 (and (eq_attr "tune" "marvell_pj4")
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192 (eq_attr "type" "fmuls,fmuld")) "pj4_is,nothing*2,vissue,vmul,nothing*4")
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193
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194 (define_insn_reservation "pj4_vfp_divs" 20
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195 (and (eq_attr "tune" "marvell_pj4")
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196 (eq_attr "type" "fdivs, fsqrts")) "pj4_is,nothing*2,vissue,vdiv*18,nothing")
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197
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198 (define_insn_reservation "pj4_vfp_divd" 34
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199 (and (eq_attr "tune" "marvell_pj4")
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200 (eq_attr "type" "fdivd, fsqrtd")) "pj4_is,nothing*2,vissue,vdiv*32,nothing")
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201
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202 (define_insn_reservation "pj4_vfp_mac" 9
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203 (and (eq_attr "tune" "marvell_pj4")
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204 (eq_attr "type" "fmacs,fmacd"))
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205 "pj4_is,nothing*2,vissue,vmul,nothing*3,vadd,nothing*3")
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206
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207 (define_bypass 5 "pj4_vfp_mac" "pj4_vfp_mac" "arm_no_early_mul_dep")
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208
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209 (define_insn_reservation "pj4_vfp_cpy" 4
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210 (and (eq_attr "tune" "marvell_pj4")
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211 (eq_attr "type" "fmov,ffariths,ffarithd,fconsts,fconstd,\
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212 fcmps,fcmpd,f_cvt,f_cvtf2i,f_cvti2f"))
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213 "pj4_is,nothing*2,vissue,vfast,nothing*2")
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214
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215 ;; Enlarge latency, and wish that more nondependent insns are
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216 ;; scheduled immediately after VFP load.
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217 (define_insn_reservation "pj4_vfp_load" 4
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218 (and (eq_attr "tune" "marvell_pj4")
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219 (eq_attr "type" "f_loads,f_loadd")) "pj4_isb,pj4_alu1,nothing,vissue,pj4_cp")
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220
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221 (define_insn_reservation "pj4_vfp_store" 1
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222 (and (eq_attr "tune" "marvell_pj4")
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223 (eq_attr "type" "f_stores,f_stored")) "pj4_isb,pj4_alu1,nothing,vissue,pj4_cp")
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224
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225 (define_insn_reservation "pj4_vfp_to_core" 7
kono
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226 (and (eq_attr "tune" "marvell_pj4")
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227 (eq_attr "type" "f_mrc,f_mrrc,f_flag")) "pj4_isb,nothing,nothing,vissue,vfast,nothing*2")
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228
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229 (define_insn_reservation "pj4_core_to_vfp" 2
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230 (and (eq_attr "tune" "marvell_pj4")
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231 (eq_attr "type" "f_mcr,f_mcrr")) "pj4_isb,pj4_alu1,pj4_w1,vissue,pj4_cp")
kono
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232