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111
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1 /* Definitions of types that are used to store AVR architecture and
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2 device information.
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131
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3 Copyright (C) 2012-2018 Free Software Foundation, Inc.
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111
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4 Contributed by Georg-Johann Lay (avr@gjlay.de)
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5
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6 This file is part of GCC.
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7
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8 GCC is free software; you can redistribute it and/or modify
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9 it under the terms of the GNU General Public License as published by
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10 the Free Software Foundation; either version 3, or (at your option)
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11 any later version.
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12
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13 GCC is distributed in the hope that it will be useful,
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14 but WITHOUT ANY WARRANTY; without even the implied warranty of
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15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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16 GNU General Public License for more details.
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17
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18 You should have received a copy of the GNU General Public License
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19 along with GCC; see the file COPYING3. If not see
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20 <http://www.gnu.org/licenses/>. */
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21
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22 #ifndef AVR_ARCH_H
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23 #define AVR_ARCH_H
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24
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25 #define AVR_MMCU_DEFAULT "avr2"
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26
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27 /* This enum supplies indices into the avr_arch_types[] table below. */
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28
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29 enum avr_arch_id
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30 {
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31 ARCH_UNKNOWN,
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32 ARCH_AVR1,
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33 ARCH_AVR2,
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34 ARCH_AVR25,
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35 ARCH_AVR3,
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36 ARCH_AVR31,
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37 ARCH_AVR35,
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38 ARCH_AVR4,
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39 ARCH_AVR5,
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40 ARCH_AVR51,
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41 ARCH_AVR6,
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42 ARCH_AVRTINY,
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43 ARCH_AVRXMEGA2,
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44 ARCH_AVRXMEGA3,
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45 ARCH_AVRXMEGA4,
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46 ARCH_AVRXMEGA5,
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47 ARCH_AVRXMEGA6,
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48 ARCH_AVRXMEGA7
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49 };
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50
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51
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52 /* Architecture-specific properties. */
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53
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54 typedef struct
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55 {
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56 /* Assembler only. */
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57 int asm_only;
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58
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59 /* Core have 'MUL*' instructions. */
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60 int have_mul;
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61
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62 /* Core have 'CALL' and 'JMP' instructions. */
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63 int have_jmp_call;
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64
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65 /* Core have 'MOVW' and 'LPM Rx,Z' instructions. */
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66 int have_movw_lpmx;
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67
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68 /* Core have 'ELPM' instructions. */
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69 int have_elpm;
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70
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71 /* Core have 'ELPM Rx,Z' instructions. */
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72 int have_elpmx;
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73
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74 /* Core have 'EICALL' and 'EIJMP' instructions. */
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75 int have_eijmp_eicall;
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76
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77 /* This is an XMEGA core. */
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78 int xmega_p;
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79
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80 /* This core has the RAMPD special function register
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81 and thus also the RAMPX, RAMPY and RAMPZ registers. */
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82 int have_rampd;
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83
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84 /* This is a TINY core. */
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85 int tiny_p;
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86
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87 /* Default start of data section address for architecture. */
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88 int default_data_section_start;
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89
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90 /* Offset where flash memory is seen in RAM address range or 0. */
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91 int flash_pm_offset;
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92
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93 /* Offset between SFR address and RAM address:
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94 SFR-address = RAM-address - sfr_offset */
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95 int sfr_offset;
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96
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97 /* Architecture id to built-in define __AVR_ARCH__ (NULL -> no macro) */
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98 const char *const macro;
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99
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100 /* Architecture name. */
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101 const char *const name;
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102 } avr_arch_t;
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103
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104
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105 /* Device-specific properties. */
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106
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107 typedef struct
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108 {
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109 /* Device name. */
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110 const char *const name;
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111
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112 /* Index in avr_arch_types[]. */
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113 enum avr_arch_id arch_id;
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114
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115 /* device specific feature */
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116 int dev_attribute;
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117
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118 /* Must lie outside user's namespace. NULL == no macro. */
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119 const char *const macro;
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120
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121 /* Start of data section. */
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122 int data_section_start;
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123
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124 /* Start of text section. */
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125 int text_section_start;
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126
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127 /* Flash size in bytes. */
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128 int flash_size;
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129 } avr_mcu_t;
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130
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131 /* AVR device specific features.
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132
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133 AVR_ISA_RMW
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134 Only few avr devices have Read-Modify-Write (RMW) instructions
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135 (XCH, LAC, LAS and LAT)
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136
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137 AVR_SHORT_SP
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138 Stack Pointer has only 8 bit width.
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139 The device / multilib has an 8-bit stack pointer (no SPH).
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140
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141 AVR_ERRATA_SKIP
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142 Some AVR devices have a core erratum when skipping a 2-word instruction.
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143 Skip instructions are: SBRC, SBRS, SBIC, SBIS, CPSE.
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144 Problems will occur with return address is IRQ executes during the
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145 skip sequence.
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146
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147 A support ticket from Atmel returned the following information:
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148
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149 Subject: (ATTicket:644469) On AVR skip-bug core Erratum
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150 From: avr@atmel.com Date: 2011-07-27
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151 (Please keep the subject when replying to this mail)
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152
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153 This errata exists only in AT90S8515 and ATmega103 devices.
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154
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155 For information please refer the following respective errata links
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156 http://www.atmel.com/dyn/resources/prod_documents/doc2494.pdf
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157 http://www.atmel.com/dyn/resources/prod_documents/doc1436.pdf
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158
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159 AVR_ISA_RCALL
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160 Always use RJMP / RCALL and assume JMP / CALL are not available.
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161 This affects multilib selection via specs generation and -mshort-calls.
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162 Even if a device like ATtiny417 from avrxmega3 supports JMP / CALL, we
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163 assume these instructions are not available and we set the built-in
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164 macro __AVR_HAVE_JMP_CALL__ accordingly. This macro is used to
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165 determine a rough estimate of flash size in libgcc, and AVR-LibC uses
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166 this macro to determine vector sizes. */
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167
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168 enum avr_device_specific_features
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169 {
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170 AVR_ISA_NONE,
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171 AVR_ISA_RMW = 0x1, /* device has RMW instructions. */
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172 AVR_SHORT_SP = 0x2, /* Stack Pointer has 8 bits width. */
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173 AVR_ERRATA_SKIP = 0x4, /* device has a core erratum. */
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174 AVR_ISA_LDS = 0x8, /* whether LDS / STS is valid for all data in static
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175 storage. Only useful for reduced Tiny. */
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176 AVR_ISA_RCALL = 0x10 /* Use RJMP / RCALL even though JMP / CALL
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177 are available (-mshort-calls). */
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178 };
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179
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180 /* Map architecture to its texinfo string. */
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181
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182 typedef struct
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183 {
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184 /* Architecture ID. */
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185 enum avr_arch_id arch_id;
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186
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187 /* textinfo source to describe the architecture. */
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188 const char *texinfo;
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189 } avr_arch_info_t;
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190
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191 /* Preprocessor macros to define depending on MCU type. */
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192
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193 extern const avr_arch_t avr_arch_types[];
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194 extern const avr_arch_t *avr_arch;
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195
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196 extern const avr_mcu_t avr_mcu_types[];
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197
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198 extern void avr_inform_core_architectures (void);
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199
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200 #endif /* AVR_ARCH_H */
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