annotate gcc/config/ft32/predicates.md @ 131:84e7813d76e9

gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children 1830386684a0
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1 ;; Predicate definitions for FT32
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2 ;; Copyright (C) 2015-2018 Free Software Foundation, Inc.
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3 ;; Contributed by FTDI <support@ftdi.com>
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4
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5 ;; This file is part of GCC.
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6
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7 ;; GCC is free software; you can redistribute it and/or modify it
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8 ;; under the terms of the GNU General Public License as published
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9 ;; by the Free Software Foundation; either version 3, or (at your
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10 ;; option) any later version.
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11
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12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 ;; License for more details.
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16
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17 ;; You should have received a copy of the GNU General Public License
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18 ;; along with GCC; see the file COPYING3. If not see
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19 ;; <http://www.gnu.org/licenses/>.
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20
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21 ;; -------------------------------------------------------------------------
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22 ;; Predicates
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23 ;; -------------------------------------------------------------------------
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24
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25 ;; Nonzero if OP can be source of a simple move operation.
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26 ;;
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27 ;; The CONST_INT could really be CONST if we were to fix
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28 ;; ft32_print_operand_address to format the address correctly.
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29 ;; It might require assembler/linker work as well to ensure
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30 ;; the right relocation is emitted.
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31
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32 (define_predicate "ft32_general_movsrc_operand"
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33 (match_code "mem,const_int,reg,subreg,symbol_ref,label_ref,const")
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34 {
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35 /* Any (MEM LABEL_REF) is OK. That is a pc-relative load. */
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36 if (MEM_P (op) && GET_CODE (XEXP (op, 0)) == LABEL_REF)
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37 return 1;
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38
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39 if (MEM_P (op)
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40 && GET_CODE (XEXP (op, 0)) == PLUS
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41 && GET_CODE (XEXP (XEXP (op, 0), 0)) == REG
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42 && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT)
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43 return 1;
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44
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45 return general_operand (op, mode);
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46 })
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47
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48 (define_predicate "ft32_general_movdst_operand"
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49 (match_code "mem,const_int,reg,subreg,symbol_ref,label_ref,const")
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50 {
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51 if (MEM_P (op)
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52 && GET_CODE (XEXP (op, 0)) == PLUS
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53 && GET_CODE (XEXP (XEXP (op, 0), 0)) == REG
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54 && CONST_INT_P (XEXP (XEXP (op, 0), 1)))
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55 return 1;
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56 if (MEM_P (op) && GET_CODE (XEXP (op, 0)) == SYMBOL_REF)
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57 return 1;
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58 return REG_P(op) ||
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59 (MEM_P(op) && REG_P(XEXP (op, 0)));
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60 })
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61
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62 (define_predicate "reg_indirect"
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63 (match_code "mem")
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64 {
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65 return (MEM_P(op) && REG_P(XEXP (op, 0)));
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66 })
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67
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68 ;; Nonzero if OP can be an operand to an add/inc/dec instruction.
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69
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70 (define_predicate "ft32_add_operand"
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71 (ior (match_code "reg")
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72 (and (match_code "const_int")
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73 (match_test "IN_RANGE (INTVAL (op), -32768, 32767)"))))
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74
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75 ;; Nonzero if OP can be an operand to an sub/dec instruction.
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76
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77 (define_predicate "ft32_sub_operand"
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78 (ior (match_code "reg")
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79 (and (match_code "const_int")
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80 (match_test "IN_RANGE (INTVAL (op), -32767, 32768)"))))
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81
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82
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83 (define_predicate "ft32_rimm_operand"
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84 (ior (match_code "reg")
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85 (and (match_code "const_int")
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86 (match_test "IN_RANGE (INTVAL (op), -512, 511)"))))
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87
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88 (define_predicate "ft32_imm_operand"
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89 (and (match_code "const_int")
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90 (match_test "IN_RANGE (INTVAL (op), -512, 511)")))
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91
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92 (define_predicate "ft32_bwidth_operand"
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93 (and (match_code "const_int")
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94 (match_test "IN_RANGE (INTVAL (op), 1, 16)")))