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annotate gcc/config/i386/ia32intrin.h @ 131:84e7813d76e9

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gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children 1830386684a0
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
131
84e7813d76e9 gcc-8.2
mir3636
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diff changeset
1 /* Copyright (C) 2009-2018 Free Software Foundation, Inc.
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2
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3 This file is part of GCC.
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4
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5 GCC is free software; you can redistribute it and/or modify
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6 it under the terms of the GNU General Public License as published by
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7 the Free Software Foundation; either version 3, or (at your option)
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8 any later version.
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9
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10 GCC is distributed in the hope that it will be useful,
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11 but WITHOUT ANY WARRANTY; without even the implied warranty of
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12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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13 GNU General Public License for more details.
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14
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15 Under Section 7 of GPL version 3, you are granted additional
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16 permissions described in the GCC Runtime Library Exception, version
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17 3.1, as published by the Free Software Foundation.
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18
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19 You should have received a copy of the GNU General Public License and
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20 a copy of the GCC Runtime Library Exception along with this program;
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21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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22 <http://www.gnu.org/licenses/>. */
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23
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24 #ifndef _X86INTRIN_H_INCLUDED
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25 # error "Never use <ia32intrin.h> directly; include <x86intrin.h> instead."
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26 #endif
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27
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28 /* 32bit bsf */
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29 extern __inline int
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30 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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31 __bsfd (int __X)
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32 {
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33 return __builtin_ctz (__X);
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34 }
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35
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36 /* 32bit bsr */
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37 extern __inline int
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38 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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39 __bsrd (int __X)
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40 {
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41 return __builtin_ia32_bsrsi (__X);
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42 }
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43
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44 /* 32bit bswap */
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45 extern __inline int
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46 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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47 __bswapd (int __X)
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48 {
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49 return __builtin_bswap32 (__X);
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50 }
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51
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52 #ifndef __iamcu__
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53
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54 #ifndef __SSE4_2__
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55 #pragma GCC push_options
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56 #pragma GCC target("sse4.2")
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57 #define __DISABLE_SSE4_2__
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58 #endif /* __SSE4_2__ */
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59
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60 /* 32bit accumulate CRC32 (polynomial 0x11EDC6F41) value. */
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61 extern __inline unsigned int
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62 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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63 __crc32b (unsigned int __C, unsigned char __V)
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64 {
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65 return __builtin_ia32_crc32qi (__C, __V);
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66 }
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67
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68 extern __inline unsigned int
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69 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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70 __crc32w (unsigned int __C, unsigned short __V)
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71 {
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72 return __builtin_ia32_crc32hi (__C, __V);
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73 }
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74
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75 extern __inline unsigned int
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76 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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77 __crc32d (unsigned int __C, unsigned int __V)
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78 {
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79 return __builtin_ia32_crc32si (__C, __V);
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80 }
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81
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82 #ifdef __DISABLE_SSE4_2__
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83 #undef __DISABLE_SSE4_2__
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84 #pragma GCC pop_options
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85 #endif /* __DISABLE_SSE4_2__ */
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86
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87 #endif /* __iamcu__ */
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88
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89 /* 32bit popcnt */
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90 extern __inline int
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91 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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92 __popcntd (unsigned int __X)
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93 {
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94 return __builtin_popcount (__X);
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95 }
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96
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97 #ifndef __iamcu__
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98
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99 /* rdpmc */
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100 extern __inline unsigned long long
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101 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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102 __rdpmc (int __S)
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103 {
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104 return __builtin_ia32_rdpmc (__S);
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105 }
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106
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107 #endif /* __iamcu__ */
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108
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109 /* rdtsc */
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110 extern __inline unsigned long long
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111 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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112 __rdtsc (void)
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113 {
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114 return __builtin_ia32_rdtsc ();
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115 }
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116
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117 #ifndef __iamcu__
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118
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119 /* rdtscp */
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120 extern __inline unsigned long long
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121 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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122 __rdtscp (unsigned int *__A)
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123 {
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124 return __builtin_ia32_rdtscp (__A);
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125 }
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126
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127 #endif /* __iamcu__ */
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128
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129 /* 8bit rol */
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130 extern __inline unsigned char
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131 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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132 __rolb (unsigned char __X, int __C)
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133 {
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134 return __builtin_ia32_rolqi (__X, __C);
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135 }
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136
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137 /* 16bit rol */
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138 extern __inline unsigned short
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139 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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diff changeset
140 __rolw (unsigned short __X, int __C)
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
141 {
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
142 return __builtin_ia32_rolhi (__X, __C);
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parents:
diff changeset
143 }
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
144
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
145 /* 32bit rol */
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
146 extern __inline unsigned int
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
147 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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diff changeset
148 __rold (unsigned int __X, int __C)
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149 {
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150 __C &= 31;
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151 return (__X << __C) | (__X >> (-__C & 31));
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152 }
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
153
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
154 /* 8bit ror */
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
155 extern __inline unsigned char
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
156 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
157 __rorb (unsigned char __X, int __C)
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
158 {
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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159 return __builtin_ia32_rorqi (__X, __C);
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160 }
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
161
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162 /* 16bit ror */
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163 extern __inline unsigned short
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
164 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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165 __rorw (unsigned short __X, int __C)
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166 {
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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167 return __builtin_ia32_rorhi (__X, __C);
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168 }
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169
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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170 /* 32bit ror */
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
171 extern __inline unsigned int
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
172 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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173 __rord (unsigned int __X, int __C)
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174 {
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175 __C &= 31;
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176 return (__X >> __C) | (__X << (-__C & 31));
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177 }
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178
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179 /* Pause */
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180 extern __inline void
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181 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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182 __pause (void)
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183 {
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184 __builtin_ia32_pause ();
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185 }
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186
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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187 #ifdef __x86_64__
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188 /* 64bit bsf */
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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189 extern __inline int
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
190 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
191 __bsfq (long long __X)
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diff changeset
192 {
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
193 return __builtin_ctzll (__X);
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diff changeset
194 }
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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195
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
196 /* 64bit bsr */
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
197 extern __inline int
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
198 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
199 __bsrq (long long __X)
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
200 {
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
201 return __builtin_ia32_bsrdi (__X);
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parents:
diff changeset
202 }
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
203
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
204 /* 64bit bswap */
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
205 extern __inline long long
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
206 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
207 __bswapq (long long __X)
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
208 {
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
209 return __builtin_bswap64 (__X);
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
210 }
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211
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212 #ifndef __SSE4_2__
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213 #pragma GCC push_options
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214 #pragma GCC target("sse4.2")
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215 #define __DISABLE_SSE4_2__
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216 #endif /* __SSE4_2__ */
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217
55
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
218 /* 64bit accumulate CRC32 (polynomial 0x11EDC6F41) value. */
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
219 extern __inline unsigned long long
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
220 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
221 __crc32q (unsigned long long __C, unsigned long long __V)
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
222 {
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
223 return __builtin_ia32_crc32di (__C, __V);
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
224 }
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225
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226 #ifdef __DISABLE_SSE4_2__
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227 #undef __DISABLE_SSE4_2__
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228 #pragma GCC pop_options
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229 #endif /* __DISABLE_SSE4_2__ */
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diff changeset
230
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
231 /* 64bit popcnt */
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
232 extern __inline long long
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
233 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
234 __popcntq (unsigned long long __X)
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
235 {
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
236 return __builtin_popcountll (__X);
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
237 }
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
238
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
239 /* 64bit rol */
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
240 extern __inline unsigned long long
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
241 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
242 __rolq (unsigned long long __X, int __C)
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
243 {
111
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diff changeset
244 __C &= 63;
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parents: 67
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245 return (__X << __C) | (__X >> (-__C & 63));
55
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
246 }
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
247
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
248 /* 64bit ror */
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
249 extern __inline unsigned long long
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
251 __rorq (unsigned long long __X, int __C)
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diff changeset
252 {
111
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253 __C &= 63;
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parents: 67
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254 return (__X >> __C) | (__X << (-__C & 63));
kono
parents: 67
diff changeset
255 }
kono
parents: 67
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256
kono
parents: 67
diff changeset
257 /* Read flags register */
kono
parents: 67
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258 extern __inline unsigned long long
kono
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259 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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diff changeset
260 __readeflags (void)
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261 {
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262 return __builtin_ia32_readeflags_u64 ();
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263 }
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264
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265 /* Write flags register */
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266 extern __inline void
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267 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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268 __writeeflags (unsigned long long __X)
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269 {
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270 __builtin_ia32_writeeflags_u64 (__X);
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diff changeset
271 }
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
272
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
273 #define _bswap64(a) __bswapq(a)
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
274 #define _popcnt64(a) __popcntq(a)
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diff changeset
275 #else
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276
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277 /* Read flags register */
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278 extern __inline unsigned int
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279 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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280 __readeflags (void)
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281 {
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282 return __builtin_ia32_readeflags_u32 ();
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parents: 67
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283 }
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parents: 67
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284
kono
parents: 67
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285 /* Write flags register */
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286 extern __inline void
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287 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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288 __writeeflags (unsigned int __X)
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289 {
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290 __builtin_ia32_writeeflags_u32 (__X);
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parents: 67
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291 }
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292
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293 #endif
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294
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diff changeset
295 /* On LP64 systems, longs are 64-bit. Use the appropriate rotate
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parents: 67
diff changeset
296 * function. */
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diff changeset
297 #ifdef __LP64__
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diff changeset
298 #define _lrotl(a,b) __rolq((a), (b))
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diff changeset
299 #define _lrotr(a,b) __rorq((a), (b))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
300 #else
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
301 #define _lrotl(a,b) __rold((a), (b))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
302 #define _lrotr(a,b) __rord((a), (b))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
303 #endif
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
304
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
305 #define _bit_scan_forward(a) __bsfd(a)
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
306 #define _bit_scan_reverse(a) __bsrd(a)
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
307 #define _bswap(a) __bswapd(a)
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
308 #define _popcnt32(a) __popcntd(a)
111
kono
parents: 67
diff changeset
309 #ifndef __iamcu__
55
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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310 #define _rdpmc(a) __rdpmc(a)
111
kono
parents: 67
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311 #define _rdtscp(a) __rdtscp(a)
kono
parents: 67
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312 #endif /* __iamcu__ */
55
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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313 #define _rdtsc() __rdtsc()
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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314 #define _rotwl(a,b) __rolw((a), (b))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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315 #define _rotwr(a,b) __rorw((a), (b))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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316 #define _rotl(a,b) __rold((a), (b))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
317 #define _rotr(a,b) __rord((a), (b))