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annotate gcc/config/mips/loongson3a.md @ 131:84e7813d76e9

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gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
68
561a7518be6b update gcc-4.6
Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
1 ;; Pipeline model for Loongson-3A cores.
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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2
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84e7813d76e9 gcc-8.2
mir3636
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3 ;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
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4 ;;
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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5 ;; This file is part of GCC.
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6 ;;
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7 ;; GCC is free software; you can redistribute it and/or modify it
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parents:
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8 ;; under the terms of the GNU General Public License as published
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parents:
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9 ;; by the Free Software Foundation; either version 3, or (at your
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parents:
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10 ;; option) any later version.
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11 ;;
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12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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parents:
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13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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parents:
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14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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15 ;; License for more details.
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16 ;;
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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17 ;; You should have received a copy of the GNU General Public License
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parents:
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18 ;; along with GCC; see the file COPYING3. If not see
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19 ;; <http://www.gnu.org/licenses/>.
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20
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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21 ;; Uncomment the following line to output automata for debugging.
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22 ;; (automata_option "v")
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23
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24 ;; Automaton for integer instructions.
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25 (define_automaton "ls3a_a_alu")
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26
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27 ;; Automaton for floating-point instructions.
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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28 (define_automaton "ls3a_a_falu")
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29
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30 ;; Automaton for memory operations.
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31 (define_automaton "ls3a_a_mem")
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32
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33 ;; Describe the resources.
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34
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35 (define_cpu_unit "ls3a_alu1" "ls3a_a_alu")
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36 (define_cpu_unit "ls3a_alu2" "ls3a_a_alu")
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37 (define_cpu_unit "ls3a_mem" "ls3a_a_mem")
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38 (define_cpu_unit "ls3a_falu1" "ls3a_a_falu")
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39 (define_cpu_unit "ls3a_falu2" "ls3a_a_falu")
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40
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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41 ;; Describe instruction reservations.
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42
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43 (define_insn_reservation "ls3a_arith" 1
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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44 (and (eq_attr "cpu" "loongson_3a")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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45 (eq_attr "type" "arith,clz,const,logical,
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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46 move,nop,shift,signext,slt"))
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47 "ls3a_alu1 | ls3a_alu2")
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48
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49 (define_insn_reservation "ls3a_branch" 1
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50 (and (eq_attr "cpu" "loongson_3a")
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51 (eq_attr "type" "branch,jump,call,condmove,trap"))
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52 "ls3a_alu1")
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53
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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54 (define_insn_reservation "ls3a_mfhilo" 1
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55 (and (eq_attr "cpu" "loongson_3a")
111
kono
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56 (eq_attr "type" "mfhi,mflo,mthi,mtlo"))
68
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57 "ls3a_alu2")
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58
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59 ;; Operation imul3nc is fully pipelined.
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60 (define_insn_reservation "ls3a_imul3nc" 5
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61 (and (eq_attr "cpu" "loongson_3a")
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62 (eq_attr "type" "imul3nc"))
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63 "ls3a_alu2")
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64
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65 (define_insn_reservation "ls3a_imul" 7
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66 (and (eq_attr "cpu" "loongson_3a")
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67 (eq_attr "type" "imul,imadd"))
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68 "ls3a_alu2 * 7")
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69
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70 (define_insn_reservation "ls3a_idiv_si" 12
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71 (and (eq_attr "cpu" "loongson_3a")
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72 (and (eq_attr "type" "idiv")
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73 (eq_attr "mode" "SI")))
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74 "ls3a_alu2 * 12")
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75
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76 (define_insn_reservation "ls3a_idiv_di" 25
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77 (and (eq_attr "cpu" "loongson_3a")
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78 (and (eq_attr "type" "idiv")
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79 (eq_attr "mode" "DI")))
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80 "ls3a_alu2 * 25")
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81
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82 (define_insn_reservation "ls3a_load" 3
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83 (and (eq_attr "cpu" "loongson_3a")
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84 (eq_attr "type" "load"))
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85 "ls3a_mem")
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86
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87 (define_insn_reservation "ls3a_fpload" 4
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88 (and (eq_attr "cpu" "loongson_3a")
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89 (eq_attr "type" "load,mfc,mtc"))
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90 "ls3a_mem")
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91
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92 (define_insn_reservation "ls3a_prefetch" 0
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93 (and (eq_attr "cpu" "loongson_3a")
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94 (eq_attr "type" "prefetch,prefetchx"))
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95 "ls3a_mem")
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96
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97 (define_insn_reservation "ls3a_store" 0
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98 (and (eq_attr "cpu" "loongson_3a")
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99 (eq_attr "type" "store,fpstore,fpidxstore"))
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100 "ls3a_mem")
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101
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102 ;; All the fp operations can be executed in FALU1. Only fp add,
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103 ;; sub, mul, madd can be executed in FALU2. Try FALU2 firstly.
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104 (define_insn_reservation "ls3a_fadd" 6
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105 (and (eq_attr "cpu" "loongson_3a")
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106 (eq_attr "type" "fadd,fmul,fmadd"))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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107 "ls3a_falu2 | ls3a_falu1")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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108
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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109 (define_insn_reservation "ls3a_fcmp" 2
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110 (and (eq_attr "cpu" "loongson_3a")
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111 (eq_attr "type" "fabs,fcmp,fmove,fneg"))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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112 "ls3a_falu1")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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113
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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114 (define_insn_reservation "ls3a_fcvt" 4
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115 (and (eq_attr "cpu" "loongson_3a")
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116 (eq_attr "type" "fcvt"))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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117 "ls3a_falu1")
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118
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119 (define_insn_reservation "ls3a_fdiv_sf" 12
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120 (and (eq_attr "cpu" "loongson_3a")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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121 (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt")
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122 (eq_attr "mode" "SF")))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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123 "ls3a_falu1 * 12")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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124
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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125 (define_insn_reservation "ls3a_fdiv_df" 19
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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126 (and (eq_attr "cpu" "loongson_3a")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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127 (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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128 (eq_attr "mode" "DF")))
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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129 "ls3a_falu1 * 19")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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130
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
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131 ;; Force single-dispatch for unknown or multi.
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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132 (define_insn_reservation "ls3a_unknown" 1
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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133 (and (eq_attr "cpu" "loongson_3a")
111
kono
parents: 68
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134 (eq_attr "type" "unknown,multi,atomic,syncloop"))
68
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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135 "ls3a_alu1 + ls3a_alu2 + ls3a_falu1 + ls3a_falu2 + ls3a_mem")
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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136
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Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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137 ;; End of DFA-based pipeline description for loongson_3a