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1 ;; Code and mode itertator and attribute definitions
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2 ;; of Andes NDS32 cpu for GNU compiler
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3 ;; Copyright (C) 2012-2018 Free Software Foundation, Inc.
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4 ;; Contributed by Andes Technology Corporation.
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5 ;;
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6 ;; This file is part of GCC.
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7 ;;
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8 ;; GCC is free software; you can redistribute it and/or modify it
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9 ;; under the terms of the GNU General Public License as published
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10 ;; by the Free Software Foundation; either version 3, or (at your
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11 ;; option) any later version.
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12 ;;
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13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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14 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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15 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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16 ;; License for more details.
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17 ;;
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18 ;; You should have received a copy of the GNU General Public License
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19 ;; along with GCC; see the file COPYING3. If not see
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20 ;; <http://www.gnu.org/licenses/>.
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21
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22 ;;----------------------------------------------------------------------------
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23 ;; Mode iterators.
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24 ;;----------------------------------------------------------------------------
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25
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26 ;; A list of integer modes that are up to one word long.
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27 (define_mode_iterator QIHISI [QI HI SI])
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28
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29 ;; A list of integer modes for one word and double word.
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30 (define_mode_iterator SIDI [SI DI])
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31
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32 ;; A list of integer modes that are up to one half-word long.
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33 (define_mode_iterator QIHI [QI HI])
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34
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35 ;; A list of the modes that are up to double-word long.
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36 (define_mode_iterator DIDF [DI DF])
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37
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38 ;; A list of the modes that are up to one word long vector.
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39 (define_mode_iterator VQIHI [V4QI V2HI])
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40
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41 ;; A list of the modes that are up to one word long vector
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42 ;; and scalar for varies mode.
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43 (define_mode_iterator VSHI [V2HI HI])
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44 (define_mode_iterator VSQIHI [V4QI V2HI QI HI])
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45 (define_mode_iterator VSQIHIDI [V4QI V2HI QI HI DI])
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46 (define_mode_iterator VQIHIDI [V4QI V2HI DI])
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47
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48 ;; A list of the modes that are up to double-word long.
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49 (define_mode_iterator ANYF [(SF "TARGET_FPU_SINGLE")
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50 (DF "TARGET_FPU_DOUBLE")])
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51
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52 ;;----------------------------------------------------------------------------
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53 ;; Mode attributes.
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54 ;;----------------------------------------------------------------------------
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55
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56 (define_mode_attr size [(QI "b") (HI "h") (SI "w") (SF "s") (DF "d")])
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57
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58 (define_mode_attr byte [(QI "1") (HI "2") (SI "4") (V4QI "4") (V2HI "4")])
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59
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60 (define_mode_attr bits [(V4QI "8") (QI "8") (V2HI "16") (HI "16") (DI "64")])
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61
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62 (define_mode_attr VELT [(V4QI "QI") (V2HI "HI")])
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63
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64 ;;----------------------------------------------------------------------------
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65 ;; Code iterators.
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66 ;;----------------------------------------------------------------------------
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67
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68 ;; shifts
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69 (define_code_iterator shift_rotate [ashift ashiftrt lshiftrt rotatert])
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70
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71 (define_code_iterator shifts [ashift ashiftrt lshiftrt])
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72
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73 (define_code_iterator shiftrt [ashiftrt lshiftrt])
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74
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75 (define_code_iterator sat_plus [ss_plus us_plus])
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76
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77 (define_code_iterator all_plus [plus ss_plus us_plus])
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78
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79 (define_code_iterator sat_minus [ss_minus us_minus])
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80
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81 (define_code_iterator all_minus [minus ss_minus us_minus])
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82
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83 (define_code_iterator plus_minus [plus minus])
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84
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85 (define_code_iterator extend [sign_extend zero_extend])
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86
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87 (define_code_iterator sumax [smax umax])
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88
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89 (define_code_iterator sumin [smin umin])
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90
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91 (define_code_iterator sumin_max [smax umax smin umin])
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92
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93 ;;----------------------------------------------------------------------------
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94 ;; Code attributes.
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95 ;;----------------------------------------------------------------------------
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96
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97 ;; shifts
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98 (define_code_attr shift
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99 [(ashift "ashl") (ashiftrt "ashr") (lshiftrt "lshr") (rotatert "rotr")])
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100
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101 (define_code_attr su
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102 [(ashiftrt "") (lshiftrt "u") (sign_extend "s") (zero_extend "u")])
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103
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104 (define_code_attr zs
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105 [(sign_extend "s") (zero_extend "z")])
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106
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107 (define_code_attr uk
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108 [(plus "") (ss_plus "k") (us_plus "uk")
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109 (minus "") (ss_minus "k") (us_minus "uk")])
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110
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111 (define_code_attr opcode
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112 [(plus "add") (minus "sub") (smax "smax") (umax "umax") (smin "smin") (umin "umin")])
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113
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114 (define_code_attr add_rsub
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115 [(plus "a") (minus "rs")])
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116
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117 (define_code_attr add_sub
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118 [(plus "a") (minus "s")])
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119
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120 ;;----------------------------------------------------------------------------
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