|
111
|
1 ;; Scheduling description for IBM PowerPC 440 processor.
|
|
131
|
2 ;; Copyright (C) 2003-2018 Free Software Foundation, Inc.
|
|
111
|
3 ;;
|
|
|
4 ;; This file is part of GCC.
|
|
|
5 ;;
|
|
|
6 ;; GCC is free software; you can redistribute it and/or modify
|
|
|
7 ;; it under the terms of the GNU General Public License as published by
|
|
|
8 ;; the Free Software Foundation; either version 3, or (at your option)
|
|
|
9 ;; any later version.
|
|
|
10 ;;
|
|
|
11 ;; GCC is distributed in the hope that it will be useful,
|
|
|
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
14 ;; GNU General Public License for more details.
|
|
|
15 ;;
|
|
|
16 ;; You should have received a copy of the GNU General Public License
|
|
|
17 ;; along with GCC; see the file COPYING3. If not see
|
|
|
18 ;; <http://www.gnu.org/licenses/>.
|
|
|
19
|
|
|
20 ;; PPC440 Embedded PowerPC controller
|
|
|
21 ;; dual issue
|
|
|
22 ;; i_pipe - complex integer / compare / branch
|
|
|
23 ;; j_pipe - simple integer arithmetic
|
|
|
24 ;; l_pipe - load-store
|
|
|
25 ;; f_pipe - floating point arithmetic
|
|
|
26
|
|
|
27 (define_automaton "ppc440_core,ppc440_apu")
|
|
|
28 (define_cpu_unit "ppc440_i_pipe,ppc440_j_pipe,ppc440_l_pipe" "ppc440_core")
|
|
|
29 (define_cpu_unit "ppc440_f_pipe" "ppc440_apu")
|
|
|
30 (define_cpu_unit "ppc440_issue_0,ppc440_issue_1" "ppc440_core")
|
|
|
31
|
|
|
32 (define_reservation "ppc440_issue" "ppc440_issue_0|ppc440_issue_1")
|
|
|
33
|
|
|
34
|
|
|
35 (define_insn_reservation "ppc440-load" 3
|
|
|
36 (and (eq_attr "type" "load,load_l,store_c,sync")
|
|
|
37 (eq_attr "cpu" "ppc440"))
|
|
|
38 "ppc440_issue,ppc440_l_pipe")
|
|
|
39
|
|
|
40 (define_insn_reservation "ppc440-store" 3
|
|
|
41 (and (eq_attr "type" "store")
|
|
|
42 (eq_attr "cpu" "ppc440"))
|
|
|
43 "ppc440_issue,ppc440_l_pipe")
|
|
|
44
|
|
|
45 (define_insn_reservation "ppc440-fpload" 4
|
|
|
46 (and (eq_attr "type" "fpload")
|
|
|
47 (eq_attr "cpu" "ppc440"))
|
|
|
48 "ppc440_issue,ppc440_l_pipe")
|
|
|
49
|
|
|
50 (define_insn_reservation "ppc440-fpstore" 3
|
|
|
51 (and (eq_attr "type" "fpstore")
|
|
|
52 (eq_attr "cpu" "ppc440"))
|
|
|
53 "ppc440_issue,ppc440_l_pipe")
|
|
|
54
|
|
|
55 (define_insn_reservation "ppc440-integer" 1
|
|
|
56 (and (ior (eq_attr "type" "integer,insert,trap,cntlz,isel")
|
|
|
57 (and (eq_attr "type" "add,logical,shift,exts")
|
|
|
58 (eq_attr "dot" "no")))
|
|
|
59 (eq_attr "cpu" "ppc440"))
|
|
|
60 "ppc440_issue,ppc440_i_pipe|ppc440_j_pipe")
|
|
|
61
|
|
|
62 (define_insn_reservation "ppc440-two" 1
|
|
|
63 (and (eq_attr "type" "two")
|
|
|
64 (eq_attr "cpu" "ppc440"))
|
|
|
65 "ppc440_issue_0+ppc440_issue_1,\
|
|
|
66 ppc440_i_pipe|ppc440_j_pipe,ppc440_i_pipe|ppc440_j_pipe")
|
|
|
67
|
|
|
68 (define_insn_reservation "ppc440-three" 1
|
|
|
69 (and (eq_attr "type" "three")
|
|
|
70 (eq_attr "cpu" "ppc440"))
|
|
|
71 "ppc440_issue_0+ppc440_issue_1,ppc440_i_pipe|ppc440_j_pipe,\
|
|
|
72 ppc440_i_pipe|ppc440_j_pipe,ppc440_i_pipe|ppc440_j_pipe")
|
|
|
73
|
|
|
74 (define_insn_reservation "ppc440-imul" 3
|
|
|
75 (and (eq_attr "type" "mul")
|
|
|
76 (eq_attr "size" "32")
|
|
|
77 (eq_attr "cpu" "ppc440"))
|
|
|
78 "ppc440_issue,ppc440_i_pipe")
|
|
|
79
|
|
|
80 (define_insn_reservation "ppc440-imul2" 2
|
|
|
81 (and (ior (eq_attr "type" "halfmul")
|
|
|
82 (and (eq_attr "type" "mul")
|
|
|
83 (eq_attr "size" "8,16")))
|
|
|
84 (eq_attr "cpu" "ppc440"))
|
|
|
85 "ppc440_issue,ppc440_i_pipe")
|
|
|
86
|
|
|
87 (define_insn_reservation "ppc440-idiv" 34
|
|
|
88 (and (eq_attr "type" "div")
|
|
|
89 (eq_attr "cpu" "ppc440"))
|
|
|
90 "ppc440_issue,ppc440_i_pipe*33")
|
|
|
91
|
|
|
92 (define_insn_reservation "ppc440-branch" 1
|
|
|
93 (and (eq_attr "type" "branch,jmpreg,isync")
|
|
|
94 (eq_attr "cpu" "ppc440"))
|
|
|
95 "ppc440_issue,ppc440_i_pipe")
|
|
|
96
|
|
|
97 (define_insn_reservation "ppc440-compare" 2
|
|
|
98 (and (ior (eq_attr "type" "cmp,cr_logical,delayed_cr,mfcr")
|
|
|
99 (and (eq_attr "type" "add,logical,shift,exts")
|
|
|
100 (eq_attr "dot" "yes")))
|
|
|
101 (eq_attr "cpu" "ppc440"))
|
|
|
102 "ppc440_issue,ppc440_i_pipe")
|
|
|
103
|
|
|
104 (define_insn_reservation "ppc440-fpcompare" 3 ; 2
|
|
|
105 (and (eq_attr "type" "fpcompare")
|
|
|
106 (eq_attr "cpu" "ppc440"))
|
|
|
107 "ppc440_issue,ppc440_f_pipe+ppc440_i_pipe")
|
|
|
108
|
|
|
109 (define_insn_reservation "ppc440-fp" 5
|
|
|
110 (and (eq_attr "type" "fp,fpsimple,dmul")
|
|
|
111 (eq_attr "cpu" "ppc440"))
|
|
|
112 "ppc440_issue,ppc440_f_pipe")
|
|
|
113
|
|
|
114 (define_insn_reservation "ppc440-sdiv" 19
|
|
|
115 (and (eq_attr "type" "sdiv")
|
|
|
116 (eq_attr "cpu" "ppc440"))
|
|
|
117 "ppc440_issue,ppc440_f_pipe*15")
|
|
|
118
|
|
|
119 (define_insn_reservation "ppc440-ddiv" 33
|
|
|
120 (and (eq_attr "type" "ddiv")
|
|
|
121 (eq_attr "cpu" "ppc440"))
|
|
|
122 "ppc440_issue,ppc440_f_pipe*29")
|
|
|
123
|
|
|
124 (define_insn_reservation "ppc440-mtcr" 3
|
|
|
125 (and (eq_attr "type" "mtcr")
|
|
|
126 (eq_attr "cpu" "ppc440"))
|
|
|
127 "ppc440_issue,ppc440_i_pipe")
|
|
|
128
|
|
|
129 (define_insn_reservation "ppc440-mtjmpr" 4
|
|
|
130 (and (eq_attr "type" "mtjmpr")
|
|
|
131 (eq_attr "cpu" "ppc440"))
|
|
|
132 "ppc440_issue,ppc440_i_pipe")
|
|
|
133
|
|
|
134 (define_insn_reservation "ppc440-mfjmpr" 2
|
|
|
135 (and (eq_attr "type" "mfjmpr")
|
|
|
136 (eq_attr "cpu" "ppc440"))
|
|
|
137 "ppc440_issue,ppc440_i_pipe")
|
|
|
138
|
