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1 /* Machine description patterns for PowerPC running Darwin (Mac OS X).
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131
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2 Copyright (C) 2004-2018 Free Software Foundation, Inc.
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3 Contributed by Apple Computer Inc.
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4
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5 This file is part of GCC.
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6
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7 GNU CC is free software; you can redistribute it and/or modify
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8 it under the terms of the GNU General Public License as published by
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9 the Free Software Foundation; either version 3, or (at your option)
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10 any later version.
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11
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12 GNU CC is distributed in the hope that it will be useful,
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13 but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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15 GNU General Public License for more details.
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16
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17 You should have received a copy of the GNU General Public License
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18 ;; along with GCC; see the file COPYING3. If not see
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19 ;; <http://www.gnu.org/licenses/>. */
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20
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21 (define_insn "adddi3_high"
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22 [(set (match_operand:DI 0 "gpc_reg_operand" "=b")
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23 (plus:DI (match_operand:DI 1 "gpc_reg_operand" "b")
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24 (high:DI (match_operand 2 "" ""))))]
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25 "TARGET_MACHO && TARGET_64BIT"
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26 "addis %0,%1,ha16(%2)"
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27 [(set_attr "length" "4")])
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28
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29 (define_insn "movdf_low_si"
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30 [(set (match_operand:DF 0 "gpc_reg_operand" "=f,!r")
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31 (mem:DF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
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32 (match_operand 2 "" ""))))]
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33 "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && !TARGET_64BIT"
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34 "*
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35 {
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36 switch (which_alternative)
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37 {
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38 case 0:
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39 return \"lfd %0,lo16(%2)(%1)\";
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40 case 1:
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41 {
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42 if (TARGET_POWERPC64 && TARGET_32BIT)
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43 /* Note, old assemblers didn't support relocation here. */
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44 return \"ld %0,lo16(%2)(%1)\";
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45 else
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46 {
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47 output_asm_insn (\"la %0,lo16(%2)(%1)\", operands);
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48 output_asm_insn (\"lwz %L0,4(%0)\", operands);
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49 return (\"lwz %0,0(%0)\");
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50 }
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51 }
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52 default:
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53 gcc_unreachable ();
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54 }
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55 }"
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56 [(set_attr "type" "load")
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57 (set_attr "length" "4,12")])
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58
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59
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60 (define_insn "movdf_low_di"
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61 [(set (match_operand:DF 0 "gpc_reg_operand" "=f,!r")
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62 (mem:DF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
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63 (match_operand 2 "" ""))))]
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64 "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_64BIT"
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65 "*
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66 {
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67 switch (which_alternative)
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68 {
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69 case 0:
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70 return \"lfd %0,lo16(%2)(%1)\";
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71 case 1:
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72 return \"ld %0,lo16(%2)(%1)\";
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73 default:
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74 gcc_unreachable ();
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75 }
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76 }"
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77 [(set_attr "type" "load")
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78 (set_attr "length" "4,4")])
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79
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80 (define_insn "movdf_low_st_si"
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81 [(set (mem:DF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")
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82 (match_operand 2 "" "")))
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83 (match_operand:DF 0 "gpc_reg_operand" "f"))]
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84 "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && ! TARGET_64BIT"
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85 "stfd %0,lo16(%2)(%1)"
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86 [(set_attr "type" "store")
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87 (set_attr "length" "4")])
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88
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89 (define_insn "movdf_low_st_di"
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90 [(set (mem:DF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b")
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91 (match_operand 2 "" "")))
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92 (match_operand:DF 0 "gpc_reg_operand" "f"))]
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93 "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_64BIT"
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94 "stfd %0,lo16(%2)(%1)"
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95 [(set_attr "type" "store")
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96 (set_attr "length" "4")])
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97
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98 (define_insn "movsf_low_si"
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99 [(set (match_operand:SF 0 "gpc_reg_operand" "=f,!r")
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100 (mem:SF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
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101 (match_operand 2 "" ""))))]
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102 "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && ! TARGET_64BIT"
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103 "@
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104 lfs %0,lo16(%2)(%1)
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105 lwz %0,lo16(%2)(%1)"
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106 [(set_attr "type" "load")
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107 (set_attr "length" "4")])
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108
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109 (define_insn "movsf_low_di"
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110 [(set (match_operand:SF 0 "gpc_reg_operand" "=f,!r")
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111 (mem:SF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
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112 (match_operand 2 "" ""))))]
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113 "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_64BIT"
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114 "@
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115 lfs %0,lo16(%2)(%1)
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116 lwz %0,lo16(%2)(%1)"
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117 [(set_attr "type" "load")
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118 (set_attr "length" "4")])
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119
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120 (define_insn "movsf_low_st_si"
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121 [(set (mem:SF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
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122 (match_operand 2 "" "")))
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123 (match_operand:SF 0 "gpc_reg_operand" "f,!r"))]
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124 "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && ! TARGET_64BIT"
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125 "@
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126 stfs %0,lo16(%2)(%1)
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127 stw %0,lo16(%2)(%1)"
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128 [(set_attr "type" "store")
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129 (set_attr "length" "4")])
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130
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131 (define_insn "movsf_low_st_di"
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132 [(set (mem:SF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
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133 (match_operand 2 "" "")))
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134 (match_operand:SF 0 "gpc_reg_operand" "f,!r"))]
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135 "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_64BIT"
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136 "@
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137 stfs %0,lo16(%2)(%1)
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138 stw %0,lo16(%2)(%1)"
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139 [(set_attr "type" "store")
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140 (set_attr "length" "4")])
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141
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142 ;; 64-bit MachO load/store support
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143 (define_insn "movdi_low"
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144 [(set (match_operand:DI 0 "gpc_reg_operand" "=r,*!d")
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145 (mem:DI (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
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146 (match_operand 2 "" ""))))]
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147 "TARGET_MACHO && TARGET_64BIT"
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148 "@
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149 ld %0,lo16(%2)(%1)
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150 lfd %0,lo16(%2)(%1)"
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151 [(set_attr "type" "load")
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152 (set_attr "length" "4")])
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153
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154 (define_insn "movsi_low_st"
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155 [(set (mem:SI (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")
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156 (match_operand 2 "" "")))
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157 (match_operand:SI 0 "gpc_reg_operand" "r"))]
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158 "TARGET_MACHO && ! TARGET_64BIT"
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159 "stw %0,lo16(%2)(%1)"
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160 [(set_attr "type" "store")
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161 (set_attr "length" "4")])
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162
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163 (define_insn "movdi_low_st"
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164 [(set (mem:DI (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
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165 (match_operand 2 "" "")))
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166 (match_operand:DI 0 "gpc_reg_operand" "r,*!d"))]
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167 "TARGET_MACHO && TARGET_64BIT"
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168 "@
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169 std %0,lo16(%2)(%1)
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170 stfd %0,lo16(%2)(%1)"
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171 [(set_attr "type" "store")
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172 (set_attr "length" "4")])
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173
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174 ;; Mach-O PIC trickery.
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175 (define_expand "macho_high"
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176 [(set (match_operand 0 "" "")
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177 (high (match_operand 1 "" "")))]
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178 "TARGET_MACHO"
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179 {
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180 if (TARGET_64BIT)
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181 emit_insn (gen_macho_high_di (operands[0], operands[1]));
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182 else
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183 emit_insn (gen_macho_high_si (operands[0], operands[1]));
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184
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185 DONE;
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186 })
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187
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188 (define_insn "macho_high_si"
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189 [(set (match_operand:SI 0 "gpc_reg_operand" "=b*r")
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190 (high:SI (match_operand 1 "" "")))]
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191 "TARGET_MACHO && ! TARGET_64BIT"
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192 "lis %0,ha16(%1)")
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193
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194
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195 (define_insn "macho_high_di"
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196 [(set (match_operand:DI 0 "gpc_reg_operand" "=b*r")
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197 (high:DI (match_operand 1 "" "")))]
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198 "TARGET_MACHO && TARGET_64BIT"
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199 "lis %0,ha16(%1)")
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200
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201 (define_expand "macho_low"
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202 [(set (match_operand 0 "" "")
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203 (lo_sum (match_operand 1 "" "")
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204 (match_operand 2 "" "")))]
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205 "TARGET_MACHO"
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206 {
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207 if (TARGET_64BIT)
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208 emit_insn (gen_macho_low_di (operands[0], operands[1], operands[2]));
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209 else
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210 emit_insn (gen_macho_low_si (operands[0], operands[1], operands[2]));
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211
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212 DONE;
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213 })
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214
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215 (define_insn "macho_low_si"
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216 [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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217 (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")
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218 (match_operand 2 "" "")))]
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219 "TARGET_MACHO && ! TARGET_64BIT"
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220 "la %0,lo16(%2)(%1)")
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221
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222 (define_insn "macho_low_di"
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223 [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
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224 (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b")
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225 (match_operand 2 "" "")))]
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226 "TARGET_MACHO && TARGET_64BIT"
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227 "la %0,lo16(%2)(%1)")
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228
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229 (define_split
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230 [(set (mem:V4SI (plus:DI (match_operand:DI 0 "gpc_reg_operand" "")
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231 (match_operand:DI 1 "short_cint_operand" "")))
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232 (match_operand:V4SI 2 "register_operand" ""))
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233 (clobber (match_operand:DI 3 "gpc_reg_operand" ""))]
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234 "TARGET_MACHO && TARGET_64BIT"
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235 [(set (match_dup 3) (plus:DI (match_dup 0) (match_dup 1)))
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236 (set (mem:V4SI (match_dup 3))
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237 (match_dup 2))]
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238 "")
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239
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240 (define_expand "load_macho_picbase"
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241 [(set (reg:SI LR_REGNO)
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242 (unspec [(match_operand 0 "" "")]
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243 UNSPEC_LD_MPIC))]
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244 "(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
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245 {
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246 if (TARGET_32BIT)
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247 emit_insn (gen_load_macho_picbase_si (operands[0]));
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248 else
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249 emit_insn (gen_load_macho_picbase_di (operands[0]));
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250
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251 DONE;
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252 })
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253
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254 (define_insn "load_macho_picbase_si"
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255 [(set (reg:SI LR_REGNO)
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256 (unspec:SI [(match_operand:SI 0 "immediate_operand" "s")
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257 (pc)] UNSPEC_LD_MPIC))]
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258 "(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
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259 {
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260 #if TARGET_MACHO
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261 machopic_should_output_picbase_label (); /* Update for new func. */
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262 #else
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263 gcc_unreachable ();
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264 #endif
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265 return "bcl 20,31,%0\\n%0:";
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266 }
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267 [(set_attr "type" "branch")
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268 (set_attr "cannot_copy" "yes")
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269 (set_attr "length" "4")])
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270
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271 (define_insn "load_macho_picbase_di"
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272 [(set (reg:DI LR_REGNO)
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273 (unspec:DI [(match_operand:DI 0 "immediate_operand" "s")
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274 (pc)] UNSPEC_LD_MPIC))]
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275 "(DEFAULT_ABI == ABI_DARWIN) && flag_pic && TARGET_64BIT"
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276 {
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277 #if TARGET_MACHO
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278 machopic_should_output_picbase_label (); /* Update for new func. */
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279 #else
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280 gcc_unreachable ();
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281 #endif
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282 return "bcl 20,31,%0\\n%0:";
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283 }
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284 [(set_attr "type" "branch")
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285 (set_attr "cannot_copy" "yes")
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286 (set_attr "length" "4")])
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287
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288 (define_expand "macho_correct_pic"
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289 [(set (match_operand 0 "" "")
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290 (plus (match_operand 1 "" "")
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291 (unspec [(match_operand 2 "" "")
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292 (match_operand 3 "" "")]
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293 UNSPEC_MPIC_CORRECT)))]
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294 "DEFAULT_ABI == ABI_DARWIN"
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295 {
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296 if (TARGET_32BIT)
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297 emit_insn (gen_macho_correct_pic_si (operands[0], operands[1], operands[2],
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298 operands[3]));
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299 else
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300 emit_insn (gen_macho_correct_pic_di (operands[0], operands[1], operands[2],
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301 operands[3]));
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302
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303 DONE;
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304 })
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305
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306 (define_insn "macho_correct_pic_si"
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307 [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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308 (plus:SI (match_operand:SI 1 "gpc_reg_operand" "r")
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309 (unspec:SI [(match_operand:SI 2 "immediate_operand" "s")
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310 (match_operand:SI 3 "immediate_operand" "s")]
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311 UNSPEC_MPIC_CORRECT)))]
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312 "DEFAULT_ABI == ABI_DARWIN"
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313 "addis %0,%1,ha16(%2-%3)\n\taddi %0,%0,lo16(%2-%3)"
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314 [(set_attr "length" "8")])
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315
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316 (define_insn "macho_correct_pic_di"
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317 [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
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318 (plus:DI (match_operand:DI 1 "gpc_reg_operand" "r")
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319 (unspec:DI [(match_operand:DI 2 "immediate_operand" "s")
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320 (match_operand:DI 3 "immediate_operand" "s")]
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321 16)))]
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322 "DEFAULT_ABI == ABI_DARWIN && TARGET_64BIT"
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323 "addis %0,%1,ha16(%2-%3)\n\taddi %0,%0,lo16(%2-%3)"
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324 [(set_attr "length" "8")])
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325
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326 (define_insn "*call_indirect_nonlocal_darwin64"
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327 [(call (mem:SI (match_operand:DI 0 "register_operand" "c,*l,c,*l"))
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328 (match_operand 1 "" "g,g,g,g"))
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329 (use (match_operand:SI 2 "immediate_operand" "O,O,n,n"))
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330 (clobber (reg:SI LR_REGNO))]
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331 "DEFAULT_ABI == ABI_DARWIN && TARGET_64BIT"
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332 {
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333 return "b%T0l";
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334 }
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335 [(set_attr "type" "jmpreg,jmpreg,jmpreg,jmpreg")
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336 (set_attr "length" "4,4,8,8")])
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337
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338 (define_insn "*call_nonlocal_darwin64"
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339 [(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s,s"))
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340 (match_operand 1 "" "g,g"))
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341 (use (match_operand:SI 2 "immediate_operand" "O,n"))
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342 (clobber (reg:SI LR_REGNO))]
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343 "(DEFAULT_ABI == ABI_DARWIN)
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344 && (INTVAL (operands[2]) & CALL_LONG) == 0"
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345 {
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346 #if TARGET_MACHO
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347 return output_call(insn, operands, 0, 2);
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348 #else
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349 gcc_unreachable ();
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350 #endif
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351 }
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352 [(set_attr "type" "branch,branch")
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353 (set_attr "length" "4,8")])
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354
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355 (define_insn "*call_value_indirect_nonlocal_darwin64"
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356 [(set (match_operand 0 "" "")
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357 (call (mem:SI (match_operand:DI 1 "register_operand" "c,*l,c,*l"))
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358 (match_operand 2 "" "g,g,g,g")))
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359 (use (match_operand:SI 3 "immediate_operand" "O,O,n,n"))
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360 (clobber (reg:SI LR_REGNO))]
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361 "DEFAULT_ABI == ABI_DARWIN"
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362 {
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363 return "b%T1l";
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364 }
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365 [(set_attr "type" "jmpreg,jmpreg,jmpreg,jmpreg")
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366 (set_attr "length" "4,4,8,8")])
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367
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368 (define_insn "*call_value_nonlocal_darwin64"
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369 [(set (match_operand 0 "" "")
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370 (call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s,s"))
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371 (match_operand 2 "" "g,g")))
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372 (use (match_operand:SI 3 "immediate_operand" "O,n"))
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373 (clobber (reg:SI LR_REGNO))]
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374 "(DEFAULT_ABI == ABI_DARWIN)
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375 && (INTVAL (operands[3]) & CALL_LONG) == 0"
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376 {
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377 #if TARGET_MACHO
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378 return output_call(insn, operands, 1, 3);
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379 #else
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380 gcc_unreachable ();
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381 #endif
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382 }
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383 [(set_attr "type" "branch,branch")
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384 (set_attr "length" "4,8")])
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385
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386 (define_expand "reload_macho_picbase"
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387 [(set (reg:SI LR_REGNO)
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388 (unspec [(match_operand 0 "" "")]
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389 UNSPEC_RELD_MPIC))]
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390 "(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
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391 {
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392 if (TARGET_32BIT)
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393 emit_insn (gen_reload_macho_picbase_si (operands[0]));
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394 else
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395 emit_insn (gen_reload_macho_picbase_di (operands[0]));
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396
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397 DONE;
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398 })
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399
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400 (define_insn "reload_macho_picbase_si"
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401 [(set (reg:SI LR_REGNO)
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402 (unspec:SI [(match_operand:SI 0 "immediate_operand" "s")
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403 (pc)] UNSPEC_RELD_MPIC))]
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404 "(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
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405 {
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406 #if TARGET_MACHO
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407 if (machopic_should_output_picbase_label ())
|
|
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408 {
|
|
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409 static char tmp[64];
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410 const char *cnam = machopic_get_function_picbase ();
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411 snprintf (tmp, 64, "bcl 20,31,%s\\n%s:\\n%%0:", cnam, cnam);
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|
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412 return tmp;
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|
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413 }
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|
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414 else
|
|
|
415 #else
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|
|
416 gcc_unreachable ();
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|
|
417 #endif
|
|
|
418 return "bcl 20,31,%0\\n%0:";
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|
|
419 }
|
|
|
420 [(set_attr "type" "branch")
|
|
|
421 (set_attr "cannot_copy" "yes")
|
|
|
422 (set_attr "length" "4")])
|
|
|
423
|
|
|
424 (define_insn "reload_macho_picbase_di"
|
|
|
425 [(set (reg:DI LR_REGNO)
|
|
|
426 (unspec:DI [(match_operand:DI 0 "immediate_operand" "s")
|
|
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427 (pc)] UNSPEC_RELD_MPIC))]
|
|
|
428 "(DEFAULT_ABI == ABI_DARWIN) && flag_pic && TARGET_64BIT"
|
|
|
429 {
|
|
|
430 #if TARGET_MACHO
|
|
|
431 if (machopic_should_output_picbase_label ())
|
|
|
432 {
|
|
|
433 static char tmp[64];
|
|
|
434 const char *cnam = machopic_get_function_picbase ();
|
|
|
435 snprintf (tmp, 64, "bcl 20,31,%s\\n%s:\\n%%0:", cnam, cnam);
|
|
|
436 return tmp;
|
|
|
437 }
|
|
|
438 else
|
|
|
439 #else
|
|
|
440 gcc_unreachable ();
|
|
|
441 #endif
|
|
|
442 return "bcl 20,31,%0\\n%0:";
|
|
|
443 }
|
|
|
444 [(set_attr "type" "branch")
|
|
|
445 (set_attr "cannot_copy" "yes")
|
|
|
446 (set_attr "length" "4")])
|
|
|
447
|
|
|
448 ;; We need to restore the PIC register, at the site of nonlocal label.
|
|
|
449
|
|
|
450 (define_insn_and_split "nonlocal_goto_receiver"
|
|
|
451 [(unspec_volatile [(const_int 0)] UNSPECV_NLGR)]
|
|
|
452 "TARGET_MACHO && flag_pic"
|
|
|
453 "#"
|
|
|
454 "&& reload_completed"
|
|
|
455 [(const_int 0)]
|
|
|
456 {
|
|
|
457 #if TARGET_MACHO
|
|
|
458 if (crtl->uses_pic_offset_table)
|
|
|
459 {
|
|
|
460 static unsigned n = 0;
|
|
|
461 rtx picrtx = gen_rtx_SYMBOL_REF (Pmode, MACHOPIC_FUNCTION_BASE_NAME);
|
|
|
462 rtx picreg = gen_rtx_REG (Pmode, RS6000_PIC_OFFSET_TABLE_REGNUM);
|
|
|
463 rtx tmplrtx;
|
|
|
464 char tmplab[20];
|
|
|
465
|
|
|
466 ASM_GENERATE_INTERNAL_LABEL(tmplab, "Lnlgr", ++n);
|
|
|
467 tmplrtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (tmplab));
|
|
|
468
|
|
|
469 emit_insn (gen_reload_macho_picbase (tmplrtx));
|
|
|
470 emit_move_insn (picreg, gen_rtx_REG (Pmode, LR_REGNO));
|
|
|
471 emit_insn (gen_macho_correct_pic (picreg, picreg, picrtx, tmplrtx));
|
|
|
472 }
|
|
|
473 else
|
|
|
474 /* Not using PIC reg, no reload needed. */
|
|
|
475 emit_note (NOTE_INSN_DELETED);
|
|
|
476 #else
|
|
|
477 gcc_unreachable ();
|
|
|
478 #endif
|
|
|
479 DONE;
|
|
|
480 })
|
