Mercurial > hg > CbC > CbC_gcc

annotate gcc/config/rs6000/power6.md @ 131:84e7813d76e9

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gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children 1830386684a0
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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1 ;; Scheduling description for IBM POWER6 processor.
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2 ;; Copyright (C) 2006-2018 Free Software Foundation, Inc.
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3 ;; Contributed by Peter Steinmetz (steinmtz@us.ibm.com)
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4 ;;
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5 ;; This file is part of GCC.
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6 ;;
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7 ;; GCC is free software; you can redistribute it and/or modify it
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8 ;; under the terms of the GNU General Public License as published
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9 ;; by the Free Software Foundation; either version 3, or (at your
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10 ;; option) any later version.
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11 ;;
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12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 ;; License for more details.
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16 ;;
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17 ;; You should have received a copy of the GNU General Public License
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18 ;; along with GCC; see the file COPYING3. If not see
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19 ;; <http://www.gnu.org/licenses/>.
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20
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21 ;; Sources:
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22
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23 ;; The POWER6 has 2 iu, 2 fpu, 2 lsu, and 1 bu/cru unit per engine
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24 ;; (2 engines per chip). The chip can issue up to 5 internal ops
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25 ;; per cycle.
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26
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27 (define_automaton "power6iu,power6lsu,power6fpu,power6bu")
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28
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29 (define_cpu_unit "iu1_power6,iu2_power6" "power6iu")
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30 (define_cpu_unit "lsu1_power6,lsu2_power6" "power6lsu")
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31 (define_cpu_unit "bpu_power6" "power6bu")
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32 (define_cpu_unit "fpu1_power6,fpu2_power6" "power6fpu")
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33
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34 (define_reservation "LS2_power6"
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35 "lsu1_power6+lsu2_power6")
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37 (define_reservation "FPU_power6"
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38 "fpu1_power6|fpu2_power6")
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40 (define_reservation "BRU_power6"
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41 "bpu_power6")
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42
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43 (define_reservation "LSU_power6"
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44 "lsu1_power6|lsu2_power6")
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45
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46 (define_reservation "LSF_power6"
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47 "(lsu1_power6+fpu1_power6)\
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48 |(lsu1_power6+fpu2_power6)\
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49 |(lsu2_power6+fpu1_power6)\
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50 |(lsu2_power6+fpu2_power6)")
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51
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52 (define_reservation "LX2_power6"
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53 "(iu1_power6+iu2_power6+lsu1_power6)\
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54 |(iu1_power6+iu2_power6+lsu2_power6)")
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55
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56 (define_reservation "FX2_power6"
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57 "iu1_power6+iu2_power6")
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58
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59 (define_reservation "X2F_power6"
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60 "(iu1_power6+iu2_power6+fpu1_power6)\
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61 |(iu1_power6+iu2_power6+fpu2_power6)")
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62
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63 (define_reservation "BX2_power6"
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64 "iu1_power6+iu2_power6+bpu_power6")
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65
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66 (define_reservation "LSX_power6"
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67 "(iu1_power6+lsu1_power6)\
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68 |(iu1_power6+lsu2_power6)\
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69 |(iu2_power6+lsu1_power6)\
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70 |(iu2_power6+lsu2_power6)")
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71
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72 (define_reservation "FXU_power6"
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73 "iu1_power6|iu2_power6")
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74
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75 (define_reservation "XLF_power6"
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76 "(iu1_power6+lsu1_power6+fpu1_power6)\
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77 |(iu1_power6+lsu1_power6+fpu2_power6)\
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78 |(iu1_power6+lsu2_power6+fpu1_power6)\
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79 |(iu1_power6+lsu2_power6+fpu2_power6)\
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80 |(iu2_power6+lsu1_power6+fpu1_power6)\
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81 |(iu2_power6+lsu1_power6+fpu2_power6)\
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82 |(iu2_power6+lsu2_power6+fpu1_power6)\
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83 |(iu2_power6+lsu2_power6+fpu2_power6)")
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84
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85 (define_reservation "BRX_power6"
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86 "(bpu_power6+iu1_power6)\
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87 |(bpu_power6+iu2_power6)")
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88
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89 ; Load/store
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90
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91 ; The default for a value written by a fixed point load
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92 ; that is read/written by a subsequent fixed point op.
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93 (define_insn_reservation "power6-load" 2 ; fx
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94 (and (eq_attr "type" "load")
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95 (eq_attr "sign_extend" "no")
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96 (eq_attr "update" "no")
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97 (eq_attr "cpu" "power6"))
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98 "LSU_power6")
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99
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100 ; define the bypass for the case where the value written
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101 ; by a fixed point load is used as the source value on
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102 ; a store.
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103 (define_bypass 1 "power6-load,\
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104 power6-load-update,\
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105 power6-load-update-indexed"
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106 "power6-store,\
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107 power6-store-update,\
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108 power6-store-update-indexed,\
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109 power6-fpstore,\
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110 power6-fpstore-update"
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111 "rs6000_store_data_bypass_p")
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112
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113 (define_insn_reservation "power6-load-ext" 4 ; fx
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114 (and (eq_attr "type" "load")
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115 (eq_attr "sign_extend" "yes")
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116 (eq_attr "update" "no")
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117 (eq_attr "cpu" "power6"))
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118 "LSU_power6")
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119
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120 ; define the bypass for the case where the value written
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121 ; by a fixed point load ext is used as the source value on
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122 ; a store.
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123 (define_bypass 1 "power6-load-ext,\
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124 power6-load-ext-update,\
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125 power6-load-ext-update-indexed"
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126 "power6-store,\
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127 power6-store-update,\
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128 power6-store-update-indexed,\
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129 power6-fpstore,\
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130 power6-fpstore-update"
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131 "rs6000_store_data_bypass_p")
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132
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133 (define_insn_reservation "power6-load-update" 2 ; fx
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134 (and (eq_attr "type" "load")
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135 (eq_attr "sign_extend" "no")
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136 (eq_attr "update" "yes")
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137 (eq_attr "indexed" "no")
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138 (eq_attr "cpu" "power6"))
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139 "LSX_power6")
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140
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141 (define_insn_reservation "power6-load-update-indexed" 2 ; fx
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142 (and (eq_attr "type" "load")
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143 (eq_attr "sign_extend" "no")
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144 (eq_attr "update" "yes")
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145 (eq_attr "indexed" "yes")
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146 (eq_attr "cpu" "power6"))
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147 "LSX_power6")
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148
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149 (define_insn_reservation "power6-load-ext-update" 4 ; fx
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150 (and (eq_attr "type" "load")
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151 (eq_attr "sign_extend" "yes")
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152 (eq_attr "update" "yes")
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153 (eq_attr "indexed" "no")
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parents:
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154 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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155 "LSX_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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156
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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157 (define_insn_reservation "power6-load-ext-update-indexed" 4 ; fx
111
kono
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158 (and (eq_attr "type" "load")
kono
parents: 55
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159 (eq_attr "sign_extend" "yes")
kono
parents: 55
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160 (eq_attr "update" "yes")
kono
parents: 55
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161 (eq_attr "indexed" "yes")
0
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parents:
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162 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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163 "LSX_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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164
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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165 (define_insn_reservation "power6-fpload" 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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166 (and (eq_attr "type" "fpload")
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167 (eq_attr "update" "no")
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168 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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169 "LSU_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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170
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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171 (define_insn_reservation "power6-fpload-update" 1
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parents: 55
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172 (and (eq_attr "type" "fpload")
kono
parents: 55
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173 (eq_attr "update" "yes")
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parents:
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174 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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175 "LSX_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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176
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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177 (define_insn_reservation "power6-store" 14
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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178 (and (eq_attr "type" "store")
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diff changeset
179 (eq_attr "update" "no")
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180 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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181 "LSU_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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182
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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183 (define_insn_reservation "power6-store-update" 14
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kono
parents: 55
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184 (and (eq_attr "type" "store")
kono
parents: 55
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185 (eq_attr "update" "yes")
kono
parents: 55
diff changeset
186 (eq_attr "indexed" "no")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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187 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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188 "LSX_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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189
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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190 (define_insn_reservation "power6-store-update-indexed" 14
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kono
parents: 55
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191 (and (eq_attr "type" "store")
kono
parents: 55
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192 (eq_attr "update" "yes")
kono
parents: 55
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193 (eq_attr "indexed" "yes")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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194 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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195 "LX2_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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196
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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197 (define_insn_reservation "power6-fpstore" 14
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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198 (and (eq_attr "type" "fpstore")
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kono
parents: 55
diff changeset
199 (eq_attr "update" "no")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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200 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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201 "LSF_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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202
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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203 (define_insn_reservation "power6-fpstore-update" 14
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kono
parents: 55
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204 (and (eq_attr "type" "fpstore")
kono
parents: 55
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205 (eq_attr "update" "yes")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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206 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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207 "XLF_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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208
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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209 (define_insn_reservation "power6-larx" 3
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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210 (and (eq_attr "type" "load_l")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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211 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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212 "LS2_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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213
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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214 (define_insn_reservation "power6-stcx" 10 ; best case
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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215 (and (eq_attr "type" "store_c")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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216 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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217 "LSX_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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218
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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219 (define_insn_reservation "power6-sync" 11 ; N/A
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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220 (and (eq_attr "type" "sync")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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221 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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222 "LSU_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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223
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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224 (define_insn_reservation "power6-integer" 1
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kono
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225 (and (ior (eq_attr "type" "integer")
kono
parents: 55
diff changeset
226 (and (eq_attr "type" "add,logical")
kono
parents: 55
diff changeset
227 (eq_attr "dot" "no")))
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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228 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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229 "FXU_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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230
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
231 (define_insn_reservation "power6-isel" 1
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
232 (and (eq_attr "type" "isel")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
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233 (eq_attr "cpu" "power6"))
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
234 "FXU_power6")
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
235
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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236 (define_insn_reservation "power6-exts" 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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237 (and (eq_attr "type" "exts")
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kono
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diff changeset
238 (eq_attr "dot" "no")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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239 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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240 "FXU_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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241
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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242 (define_insn_reservation "power6-shift" 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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243 (and (eq_attr "type" "shift")
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244 (eq_attr "var_shift" "no")
kono
parents: 55
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245 (eq_attr "dot" "no")
kono
parents: 55
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246 (eq_attr "cpu" "power6"))
kono
parents: 55
diff changeset
247 "FXU_power6")
kono
parents: 55
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248
kono
parents: 55
diff changeset
249 (define_insn_reservation "power6-popcnt" 1
kono
parents: 55
diff changeset
250 (and (eq_attr "type" "popcnt")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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251 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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252 "FXU_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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253
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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254 (define_insn_reservation "power6-insert" 1
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kono
parents: 55
diff changeset
255 (and (eq_attr "type" "insert")
kono
parents: 55
diff changeset
256 (eq_attr "size" "32")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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257 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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258 "FX2_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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259
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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260 (define_insn_reservation "power6-insert-dword" 1
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kono
parents: 55
diff changeset
261 (and (eq_attr "type" "insert")
kono
parents: 55
diff changeset
262 (eq_attr "size" "64")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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263 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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264 "FX2_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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265
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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266 ; define the bypass for the case where the value written
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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267 ; by a fixed point op is used as the source value on a
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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268 ; store.
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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269 (define_bypass 1 "power6-integer,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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270 power6-exts,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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271 power6-shift,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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272 power6-insert,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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273 power6-insert-dword"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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274 "power6-store,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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275 power6-store-update,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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276 power6-store-update-indexed,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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277 power6-fpstore,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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278 power6-fpstore-update"
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kono
parents: 55
diff changeset
279 "rs6000_store_data_bypass_p")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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280
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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281 (define_insn_reservation "power6-cntlz" 2
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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282 (and (eq_attr "type" "cntlz")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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283 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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284 "FXU_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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285
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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286 (define_bypass 1 "power6-cntlz"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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287 "power6-store,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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288 power6-store-update,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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289 power6-store-update-indexed,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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290 power6-fpstore,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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291 power6-fpstore-update"
111
kono
parents: 55
diff changeset
292 "rs6000_store_data_bypass_p")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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293
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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294 (define_insn_reservation "power6-var-rotate" 4
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kono
parents: 55
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295 (and (eq_attr "type" "shift")
kono
parents: 55
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296 (eq_attr "var_shift" "yes")
kono
parents: 55
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297 (eq_attr "dot" "no")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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298 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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299 "FXU_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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300
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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301 (define_insn_reservation "power6-trap" 1 ; N/A
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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302 (and (eq_attr "type" "trap")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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303 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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304 "BRX_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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305
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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306 (define_insn_reservation "power6-two" 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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307 (and (eq_attr "type" "two")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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308 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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309 "(iu1_power6,iu1_power6)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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310 |(iu1_power6+iu2_power6,nothing)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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311 |(iu1_power6,iu2_power6)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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312 |(iu2_power6,iu1_power6)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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313 |(iu2_power6,iu2_power6)")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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314
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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315 (define_insn_reservation "power6-three" 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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316 (and (eq_attr "type" "three")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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317 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
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318 "(iu1_power6,iu1_power6,iu1_power6)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
319 |(iu1_power6,iu1_power6,iu2_power6)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
320 |(iu1_power6,iu2_power6,iu1_power6)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
321 |(iu1_power6,iu2_power6,iu2_power6)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
322 |(iu2_power6,iu1_power6,iu1_power6)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
323 |(iu2_power6,iu1_power6,iu2_power6)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
324 |(iu2_power6,iu2_power6,iu1_power6)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
325 |(iu2_power6,iu2_power6,iu2_power6)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
326 |(iu1_power6+iu2_power6,iu1_power6)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
327 |(iu1_power6+iu2_power6,iu2_power6)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
328 |(iu1_power6,iu1_power6+iu2_power6)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
329 |(iu2_power6,iu1_power6+iu2_power6)")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
330
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
331 (define_insn_reservation "power6-cmp" 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
332 (and (eq_attr "type" "cmp")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
333 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
334 "FXU_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
335
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
336 (define_insn_reservation "power6-compare" 1
111
kono
parents: 55
diff changeset
337 (and (eq_attr "type" "exts")
kono
parents: 55
diff changeset
338 (eq_attr "dot" "yes")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
339 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
340 "FXU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
341
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
342 (define_insn_reservation "power6-fast-compare" 1
111
kono
parents: 55
diff changeset
343 (and (eq_attr "type" "add,logical")
kono
parents: 55
diff changeset
344 (eq_attr "dot" "yes")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
345 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
346 "FXU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
347
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
348 ; define the bypass for the case where the value written
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
349 ; by a fixed point rec form op is used as the source value
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
350 ; on a store.
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
351 (define_bypass 1 "power6-compare,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
352 power6-fast-compare"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
353 "power6-store,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
354 power6-store-update,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
355 power6-store-update-indexed,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
356 power6-fpstore,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
357 power6-fpstore-update"
111
kono
parents: 55
diff changeset
358 "rs6000_store_data_bypass_p")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
359
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
360 (define_insn_reservation "power6-delayed-compare" 2 ; N/A
111
kono
parents: 55
diff changeset
361 (and (eq_attr "type" "shift")
kono
parents: 55
diff changeset
362 (eq_attr "var_shift" "no")
kono
parents: 55
diff changeset
363 (eq_attr "dot" "yes")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
364 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
365 "FXU_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
366
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
367 (define_insn_reservation "power6-var-delayed-compare" 4
111
kono
parents: 55
diff changeset
368 (and (eq_attr "type" "shift")
kono
parents: 55
diff changeset
369 (eq_attr "var_shift" "yes")
kono
parents: 55
diff changeset
370 (eq_attr "dot" "yes")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
371 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
372 "FXU_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
373
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
374 (define_insn_reservation "power6-lmul-cmp" 16
111
kono
parents: 55
diff changeset
375 (and (eq_attr "type" "mul")
kono
parents: 55
diff changeset
376 (eq_attr "dot" "yes")
kono
parents: 55
diff changeset
377 (eq_attr "size" "64")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
378 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
379 "(iu1_power6*16+iu2_power6*16+fpu1_power6*16)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
380 |(iu1_power6*16+iu2_power6*16+fpu2_power6*16)");
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
381
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
382 (define_insn_reservation "power6-imul-cmp" 16
111
kono
parents: 55
diff changeset
383 (and (eq_attr "type" "mul")
kono
parents: 55
diff changeset
384 (eq_attr "dot" "yes")
kono
parents: 55
diff changeset
385 (eq_attr "size" "32")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
386 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
387 "(iu1_power6*16+iu2_power6*16+fpu1_power6*16)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
388 |(iu1_power6*16+iu2_power6*16+fpu2_power6*16)");
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
389
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
390 (define_insn_reservation "power6-lmul" 16
111
kono
parents: 55
diff changeset
391 (and (eq_attr "type" "mul")
kono
parents: 55
diff changeset
392 (eq_attr "dot" "no")
kono
parents: 55
diff changeset
393 (eq_attr "size" "64")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
394 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
395 "(iu1_power6*16+iu2_power6*16+fpu1_power6*16)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
396 |(iu1_power6*16+iu2_power6*16+fpu2_power6*16)");
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
397
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
398 (define_insn_reservation "power6-imul" 16
111
kono
parents: 55
diff changeset
399 (and (eq_attr "type" "mul")
kono
parents: 55
diff changeset
400 (eq_attr "dot" "no")
kono
parents: 55
diff changeset
401 (eq_attr "size" "32")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
402 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
403 "(iu1_power6*16+iu2_power6*16+fpu1_power6*16)\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
404 |(iu1_power6*16+iu2_power6*16+fpu2_power6*16)");
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
405
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
406 (define_insn_reservation "power6-imul3" 16
111
kono
parents: 55
diff changeset
407 (and (eq_attr "type" "mul")
kono
parents: 55
diff changeset
408 (eq_attr "size" "8,16")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
409 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
410 "(iu1_power6*16+iu2_power6*16+fpu1_power6*16)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
411 |(iu1_power6*16+iu2_power6*16+fpu2_power6*16)");
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
412
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
413 (define_bypass 9 "power6-imul,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
414 power6-lmul,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
415 power6-imul-cmp,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
416 power6-lmul-cmp,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
417 power6-imul3"
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
418 "power6-store,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
419 power6-store-update,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
420 power6-store-update-indexed,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
421 power6-fpstore,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
422 power6-fpstore-update"
111
kono
parents: 55
diff changeset
423 "rs6000_store_data_bypass_p")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
424
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
425 (define_insn_reservation "power6-idiv" 44
111
kono
parents: 55
diff changeset
426 (and (eq_attr "type" "div")
kono
parents: 55
diff changeset
427 (eq_attr "size" "32")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
428 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
429 "(iu1_power6*44+iu2_power6*44+fpu1_power6*44)\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
430 |(iu1_power6*44+iu2_power6*44+fpu2_power6*44)");
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
431
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
432 ; The latency for this bypass is yet to be defined
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
433 ;(define_bypass ? "power6-idiv"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
434 ; "power6-store,\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
435 ; power6-store-update,\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
436 ; power6-store-update-indexed,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
437 ; power6-fpstore,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
438 ; power6-fpstore-update"
111
kono
parents: 55
diff changeset
439 ; "rs6000_store_data_bypass_p")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
440
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
441 (define_insn_reservation "power6-ldiv" 56
111
kono
parents: 55
diff changeset
442 (and (eq_attr "type" "div")
kono
parents: 55
diff changeset
443 (eq_attr "size" "64")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
444 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
445 "(iu1_power6*56+iu2_power6*56+fpu1_power6*56)\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
446 |(iu1_power6*56+iu2_power6*56+fpu2_power6*56)");
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
447
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
448 ; The latency for this bypass is yet to be defined
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
449 ;(define_bypass ? "power6-ldiv"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
450 ; "power6-store,\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
451 ; power6-store-update,\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
452 ; power6-store-update-indexed,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
453 ; power6-fpstore,\
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
454 ; power6-fpstore-update"
111
kono
parents: 55
diff changeset
455 ; "rs6000_store_data_bypass_p")
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
456
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
457 (define_insn_reservation "power6-mtjmpr" 2
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
458 (and (eq_attr "type" "mtjmpr,mfjmpr")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
459 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
460 "BX2_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
461
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
462 (define_bypass 5 "power6-mtjmpr" "power6-branch")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
463
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
464 (define_insn_reservation "power6-branch" 2
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
465 (and (eq_attr "type" "jmpreg,branch")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
466 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
467 "BRU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
468
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
469 (define_bypass 5 "power6-branch" "power6-mtjmpr")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
470
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
471 (define_insn_reservation "power6-crlogical" 3
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
472 (and (eq_attr "type" "cr_logical")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
473 (eq_attr "cpu" "power6"))
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
474 "BRU_power6")
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kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
475
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
476 (define_bypass 3 "power6-crlogical" "power6-branch")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
477
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
478 (define_insn_reservation "power6-mfcr" 6 ; N/A
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
479 (and (eq_attr "type" "mfcr")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
480 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
481 "BX2_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
482
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
483 ; mfcrf (1 field)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
484 (define_insn_reservation "power6-mfcrf" 3 ; N/A
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
485 (and (eq_attr "type" "mfcrf")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
486 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
487 "BX2_power6") ;
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
488
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
489 ; mtcrf (1 field)
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
490 (define_insn_reservation "power6-mtcr" 4 ; N/A
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
491 (and (eq_attr "type" "mtcr")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
492 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
493 "BX2_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
494
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
495 (define_bypass 9 "power6-mtcr" "power6-branch")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
496
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
497 (define_insn_reservation "power6-fp" 6
111
kono
parents: 55
diff changeset
498 (and (eq_attr "type" "fp,fpsimple,dmul,dfp")
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
499 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
500 "FPU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
501
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
502 ; Any fp instruction that updates a CR has a latency
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
503 ; of 6 to a dependent branch
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
504 (define_bypass 6 "power6-fp" "power6-branch")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
505
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
506 (define_bypass 1 "power6-fp"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
507 "power6-fpstore,power6-fpstore-update"
111
kono
parents: 55
diff changeset
508 "rs6000_store_data_bypass_p")
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
509
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
510 (define_insn_reservation "power6-fpcompare" 8
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
511 (and (eq_attr "type" "fpcompare")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
512 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
513 "FPU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
514
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
515 (define_bypass 12 "power6-fpcompare"
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
516 "power6-branch,power6-crlogical")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
517
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
518 (define_insn_reservation "power6-sdiv" 26
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
519 (and (eq_attr "type" "sdiv")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
520 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
521 "FPU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
522
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
523 (define_insn_reservation "power6-ddiv" 32
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
524 (and (eq_attr "type" "ddiv")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
525 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
526 "FPU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
527
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
528 (define_insn_reservation "power6-sqrt" 30
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
529 (and (eq_attr "type" "ssqrt")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
530 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
531 "FPU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
532
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
533 (define_insn_reservation "power6-dsqrt" 42
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
534 (and (eq_attr "type" "dsqrt")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
535 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
536 "FPU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
537
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
538 (define_insn_reservation "power6-isync" 2 ; N/A
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
539 (and (eq_attr "type" "isync")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
540 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
541 "FXU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
542
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
543 (define_insn_reservation "power6-vecload" 1
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
544 (and (eq_attr "type" "vecload")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
545 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
546 "LSU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
547
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
548 (define_insn_reservation "power6-vecstore" 1
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
549 (and (eq_attr "type" "vecstore")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
550 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
551 "LSF_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
552
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
553 (define_insn_reservation "power6-vecsimple" 3
111
kono
parents: 55
diff changeset
554 (and (eq_attr "type" "vecsimple,veclogical,vecmove")
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
555 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
556 "FPU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
557
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
558 (define_bypass 6 "power6-vecsimple" "power6-veccomplex,\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
559 power6-vecperm")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
560
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
561 (define_bypass 5 "power6-vecsimple" "power6-vecfloat")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
562
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
563 (define_bypass 4 "power6-vecsimple" "power6-vecstore" )
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
564
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
565 (define_insn_reservation "power6-veccmp" 1
111
kono
parents: 55
diff changeset
566 (and (eq_attr "type" "veccmp,veccmpfx")
0
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
567 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
568 "FPU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
569
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
570 (define_bypass 10 "power6-veccmp" "power6-branch")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
571
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
572 (define_insn_reservation "power6-vecfloat" 7
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
573 (and (eq_attr "type" "vecfloat")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
574 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
575 "FPU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
576
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
577 (define_bypass 10 "power6-vecfloat" "power6-vecsimple")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
578
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
579 (define_bypass 11 "power6-vecfloat" "power6-veccomplex,\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
580 power6-vecperm")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
581
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
582 (define_bypass 9 "power6-vecfloat" "power6-vecstore" )
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
583
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
584 (define_insn_reservation "power6-veccomplex" 7
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
585 (and (eq_attr "type" "vecsimple")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
586 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
587 "FPU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
588
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
589 (define_bypass 10 "power6-veccomplex" "power6-vecsimple,\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
590 power6-vecfloat" )
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
591
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
592 (define_bypass 9 "power6-veccomplex" "power6-vecperm" )
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
593
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
594 (define_bypass 8 "power6-veccomplex" "power6-vecstore" )
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
595
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
596 (define_insn_reservation "power6-vecperm" 4
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
597 (and (eq_attr "type" "vecperm")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
598 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
599 "FPU_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
600
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
601 (define_bypass 7 "power6-vecperm" "power6-vecsimple,\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
602 power6-vecfloat" )
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
603
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
604 (define_bypass 6 "power6-vecperm" "power6-veccomplex" )
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
605
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
606 (define_bypass 5 "power6-vecperm" "power6-vecstore" )
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
607
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
608 (define_insn_reservation "power6-mftgpr" 8
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
609 (and (eq_attr "type" "mftgpr")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
610 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
611 "X2F_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
612
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
613 (define_insn_reservation "power6-mffgpr" 14
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
614 (and (eq_attr "type" "mffgpr")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
615 (eq_attr "cpu" "power6"))
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
616 "LX2_power6")
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
617
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
618 (define_bypass 4 "power6-mftgpr" "power6-imul,\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
619 power6-lmul,\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
620 power6-imul-cmp,\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
621 power6-lmul-cmp,\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
622 power6-imul3,\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
623 power6-idiv,\
a06113de4d67 first commit
kent <kent@cr.ie.u-ryukyu.ac.jp>
parents:
diff changeset
624 power6-ldiv" )