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1 /* Support functions for the unwinder.
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2 Copyright (C) 2003, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
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3 Contributed by Paul Brook
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4
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5 This file is free software; you can redistribute it and/or modify it
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6 under the terms of the GNU General Public License as published by the
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7 Free Software Foundation; either version 3, or (at your option) any
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8 later version.
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9
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10 This file is distributed in the hope that it will be useful, but
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11 WITHOUT ANY WARRANTY; without even the implied warranty of
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12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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13 General Public License for more details.
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14
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15 Under Section 7 of GPL version 3, you are granted additional
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16 permissions described in the GCC Runtime Library Exception, version
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17 3.1, as published by the Free Software Foundation.
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18
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19 You should have received a copy of the GNU General Public License and
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20 a copy of the GCC Runtime Library Exception along with this program;
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21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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22 <http://www.gnu.org/licenses/>. */
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23
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24 /* An executable stack is *not* required for these functions. */
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25 #if defined(__ELF__) && defined(__linux__)
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26 .section .note.GNU-stack,"",%progbits
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27 .previous
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28 #endif
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29
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30 #ifndef __symbian__
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31
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32 #include "lib1funcs.asm"
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33
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34 .macro UNPREFIX name
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35 .global SYM (\name)
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36 EQUIV SYM (\name), SYM (__\name)
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37 .endm
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38
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39 #if (__ARM_ARCH__ == 4)
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40 /* Some coprocessors require armv5. We know this code will never be run on
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41 other cpus. Tell gas to allow armv5, but only mark the objects as armv4.
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42 */
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43 .arch armv5t
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44 #ifdef __ARM_ARCH_4T__
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45 .object_arch armv4t
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46 #else
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47 .object_arch armv4
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48 #endif
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49 #endif
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50
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51 #ifdef __ARM_ARCH_6M__
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52
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53 /* r0 points to a 16-word block. Upload these values to the actual core
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54 state. */
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55 FUNC_START restore_core_regs
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56 mov r1, r0
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57 add r1, r1, #52
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58 ldmia r1!, {r3, r4, r5}
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59 sub r3, r3, #4
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60 mov ip, r3
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61 str r5, [r3]
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62 mov lr, r4
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63 /* Restore r8-r11. */
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64 mov r1, r0
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65 add r1, r1, #32
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66 ldmia r1!, {r2, r3, r4, r5}
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67 mov r8, r2
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68 mov r9, r3
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69 mov sl, r4
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70 mov fp, r5
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71 mov r1, r0
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72 add r1, r1, #8
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73 ldmia r1!, {r2, r3, r4, r5, r6, r7}
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74 ldr r1, [r0, #4]
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75 ldr r0, [r0]
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76 mov sp, ip
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77 pop {pc}
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78 FUNC_END restore_core_regs
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79 UNPREFIX restore_core_regs
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80
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81 /* ARMV6M does not have coprocessors, so these should never be used. */
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82 FUNC_START gnu_Unwind_Restore_VFP
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83 RET
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84
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85 /* Store VFR regsters d0-d15 to the address in r0. */
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86 FUNC_START gnu_Unwind_Save_VFP
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87 RET
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88
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89 /* Load VFP registers d0-d15 from the address in r0.
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90 Use this to load from FSTMD format. */
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91 FUNC_START gnu_Unwind_Restore_VFP_D
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92 RET
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93
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94 /* Store VFP registers d0-d15 to the address in r0.
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95 Use this to store in FLDMD format. */
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96 FUNC_START gnu_Unwind_Save_VFP_D
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97 RET
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98
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99 /* Load VFP registers d16-d31 from the address in r0.
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100 Use this to load from FSTMD (=VSTM) format. Needs VFPv3. */
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101 FUNC_START gnu_Unwind_Restore_VFP_D_16_to_31
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102 RET
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103
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104 /* Store VFP registers d16-d31 to the address in r0.
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105 Use this to store in FLDMD (=VLDM) format. Needs VFPv3. */
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106 FUNC_START gnu_Unwind_Save_VFP_D_16_to_31
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107 RET
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108
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109 FUNC_START gnu_Unwind_Restore_WMMXD
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110 RET
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111
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112 FUNC_START gnu_Unwind_Save_WMMXD
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113 RET
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114
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115 FUNC_START gnu_Unwind_Restore_WMMXC
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116 RET
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117
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118 FUNC_START gnu_Unwind_Save_WMMXC
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119 RET
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120
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121 .macro UNWIND_WRAPPER name nargs
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122 FUNC_START \name
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123 /* Create a phase2_vrs structure. */
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124 /* Save r0 in the PC slot so we can use it as a scratch register. */
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125 push {r0}
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126 add r0, sp, #4
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127 push {r0, lr} /* Push original SP and LR. */
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128 /* Make space for r8-r12. */
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129 sub sp, sp, #20
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130 /* Save low registers. */
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131 push {r0, r1, r2, r3, r4, r5, r6, r7}
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132 /* Save high registers. */
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133 add r0, sp, #32
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134 mov r1, r8
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135 mov r2, r9
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136 mov r3, sl
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137 mov r4, fp
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138 mov r5, ip
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139 stmia r0!, {r1, r2, r3, r4, r5}
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140 /* Restore original low register values. */
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141 add r0, sp, #4
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142 ldmia r0!, {r1, r2, r3, r4, r5}
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143 /* Restore orginial r0. */
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144 ldr r0, [sp, #60]
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145 str r0, [sp]
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146 /* Demand-save flags, plus an extra word for alignment. */
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147 mov r3, #0
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148 push {r2, r3}
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149 /* Point r1 at the block. Pass r[0..nargs) unchanged. */
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150 add r\nargs, sp, #4
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151
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152 bl SYM (__gnu\name)
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153
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154 ldr r3, [sp, #64]
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155 add sp, sp, #72
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156 bx r3
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157
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158 FUNC_END \name
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159 UNPREFIX \name
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160 .endm
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161
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162 #else /* !__ARM_ARCH_6M__ */
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163
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164 /* r0 points to a 16-word block. Upload these values to the actual core
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165 state. */
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166 ARM_FUNC_START restore_core_regs
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167 /* We must use sp as the base register when restoring sp. Push the
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168 last 3 registers onto the top of the current stack to achieve
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169 this. */
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170 add r1, r0, #52
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171 ldmia r1, {r3, r4, r5} /* {sp, lr, pc}. */
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172 #if defined(__thumb2__)
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173 /* Thumb-2 doesn't allow sp in a load-multiple instruction, so push
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174 the target address onto the target stack. This is safe as
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175 we're always returning to somewhere further up the call stack. */
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176 mov ip, r3
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177 mov lr, r4
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178 str r5, [ip, #-4]!
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179 #elif defined(__INTERWORKING__)
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180 /* Restore pc into ip. */
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181 mov r2, r5
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182 stmfd sp!, {r2, r3, r4}
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183 #else
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184 stmfd sp!, {r3, r4, r5}
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185 #endif
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186 /* Don't bother restoring ip. */
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187 ldmia r0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp}
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188 #if defined(__thumb2__)
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189 /* Pop the return address off the target stack. */
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190 mov sp, ip
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191 pop {pc}
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192 #elif defined(__INTERWORKING__)
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193 /* Pop the three registers we pushed earlier. */
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194 ldmfd sp, {ip, sp, lr}
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195 bx ip
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196 #else
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197 ldmfd sp, {sp, lr, pc}
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198 #endif
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199 FUNC_END restore_core_regs
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200 UNPREFIX restore_core_regs
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201
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202 /* Load VFP registers d0-d15 from the address in r0.
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203 Use this to load from FSTMX format. */
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204 ARM_FUNC_START gnu_Unwind_Restore_VFP
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205 /* Use the generic coprocessor form so that gas doesn't complain
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206 on soft-float targets. */
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207 ldc p11,cr0,[r0],{0x21} /* fldmiax r0, {d0-d15} */
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208 RET
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209
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210 /* Store VFP registers d0-d15 to the address in r0.
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211 Use this to store in FSTMX format. */
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212 ARM_FUNC_START gnu_Unwind_Save_VFP
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213 /* Use the generic coprocessor form so that gas doesn't complain
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214 on soft-float targets. */
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215 stc p11,cr0,[r0],{0x21} /* fstmiax r0, {d0-d15} */
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216 RET
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217
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218 /* Load VFP registers d0-d15 from the address in r0.
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219 Use this to load from FSTMD format. */
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220 ARM_FUNC_START gnu_Unwind_Restore_VFP_D
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221 ldc p11,cr0,[r0],{0x20} /* fldmiad r0, {d0-d15} */
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222 RET
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223
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224 /* Store VFP registers d0-d15 to the address in r0.
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225 Use this to store in FLDMD format. */
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226 ARM_FUNC_START gnu_Unwind_Save_VFP_D
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227 stc p11,cr0,[r0],{0x20} /* fstmiad r0, {d0-d15} */
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228 RET
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229
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230 /* Load VFP registers d16-d31 from the address in r0.
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231 Use this to load from FSTMD (=VSTM) format. Needs VFPv3. */
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232 ARM_FUNC_START gnu_Unwind_Restore_VFP_D_16_to_31
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233 ldcl p11,cr0,[r0],{0x20} /* vldm r0, {d16-d31} */
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234 RET
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235
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236 /* Store VFP registers d16-d31 to the address in r0.
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237 Use this to store in FLDMD (=VLDM) format. Needs VFPv3. */
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238 ARM_FUNC_START gnu_Unwind_Save_VFP_D_16_to_31
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239 stcl p11,cr0,[r0],{0x20} /* vstm r0, {d16-d31} */
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240 RET
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241
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242 ARM_FUNC_START gnu_Unwind_Restore_WMMXD
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243 /* Use the generic coprocessor form so that gas doesn't complain
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244 on non-iWMMXt targets. */
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245 ldcl p1, cr0, [r0], #8 /* wldrd wr0, [r0], #8 */
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246 ldcl p1, cr1, [r0], #8 /* wldrd wr1, [r0], #8 */
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247 ldcl p1, cr2, [r0], #8 /* wldrd wr2, [r0], #8 */
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248 ldcl p1, cr3, [r0], #8 /* wldrd wr3, [r0], #8 */
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249 ldcl p1, cr4, [r0], #8 /* wldrd wr4, [r0], #8 */
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250 ldcl p1, cr5, [r0], #8 /* wldrd wr5, [r0], #8 */
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251 ldcl p1, cr6, [r0], #8 /* wldrd wr6, [r0], #8 */
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252 ldcl p1, cr7, [r0], #8 /* wldrd wr7, [r0], #8 */
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253 ldcl p1, cr8, [r0], #8 /* wldrd wr8, [r0], #8 */
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254 ldcl p1, cr9, [r0], #8 /* wldrd wr9, [r0], #8 */
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255 ldcl p1, cr10, [r0], #8 /* wldrd wr10, [r0], #8 */
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256 ldcl p1, cr11, [r0], #8 /* wldrd wr11, [r0], #8 */
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257 ldcl p1, cr12, [r0], #8 /* wldrd wr12, [r0], #8 */
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258 ldcl p1, cr13, [r0], #8 /* wldrd wr13, [r0], #8 */
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259 ldcl p1, cr14, [r0], #8 /* wldrd wr14, [r0], #8 */
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260 ldcl p1, cr15, [r0], #8 /* wldrd wr15, [r0], #8 */
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261 RET
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262
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263 ARM_FUNC_START gnu_Unwind_Save_WMMXD
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264 /* Use the generic coprocessor form so that gas doesn't complain
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265 on non-iWMMXt targets. */
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266 stcl p1, cr0, [r0], #8 /* wstrd wr0, [r0], #8 */
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267 stcl p1, cr1, [r0], #8 /* wstrd wr1, [r0], #8 */
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268 stcl p1, cr2, [r0], #8 /* wstrd wr2, [r0], #8 */
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269 stcl p1, cr3, [r0], #8 /* wstrd wr3, [r0], #8 */
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270 stcl p1, cr4, [r0], #8 /* wstrd wr4, [r0], #8 */
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271 stcl p1, cr5, [r0], #8 /* wstrd wr5, [r0], #8 */
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272 stcl p1, cr6, [r0], #8 /* wstrd wr6, [r0], #8 */
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273 stcl p1, cr7, [r0], #8 /* wstrd wr7, [r0], #8 */
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274 stcl p1, cr8, [r0], #8 /* wstrd wr8, [r0], #8 */
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275 stcl p1, cr9, [r0], #8 /* wstrd wr9, [r0], #8 */
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276 stcl p1, cr10, [r0], #8 /* wstrd wr10, [r0], #8 */
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277 stcl p1, cr11, [r0], #8 /* wstrd wr11, [r0], #8 */
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278 stcl p1, cr12, [r0], #8 /* wstrd wr12, [r0], #8 */
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279 stcl p1, cr13, [r0], #8 /* wstrd wr13, [r0], #8 */
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280 stcl p1, cr14, [r0], #8 /* wstrd wr14, [r0], #8 */
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281 stcl p1, cr15, [r0], #8 /* wstrd wr15, [r0], #8 */
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282 RET
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283
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284 ARM_FUNC_START gnu_Unwind_Restore_WMMXC
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285 /* Use the generic coprocessor form so that gas doesn't complain
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286 on non-iWMMXt targets. */
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287 ldc2 p1, cr8, [r0], #4 /* wldrw wcgr0, [r0], #4 */
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288 ldc2 p1, cr9, [r0], #4 /* wldrw wcgr1, [r0], #4 */
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289 ldc2 p1, cr10, [r0], #4 /* wldrw wcgr2, [r0], #4 */
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290 ldc2 p1, cr11, [r0], #4 /* wldrw wcgr3, [r0], #4 */
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291 RET
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292
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293 ARM_FUNC_START gnu_Unwind_Save_WMMXC
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294 /* Use the generic coprocessor form so that gas doesn't complain
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295 on non-iWMMXt targets. */
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296 stc2 p1, cr8, [r0], #4 /* wstrw wcgr0, [r0], #4 */
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297 stc2 p1, cr9, [r0], #4 /* wstrw wcgr1, [r0], #4 */
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298 stc2 p1, cr10, [r0], #4 /* wstrw wcgr2, [r0], #4 */
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299 stc2 p1, cr11, [r0], #4 /* wstrw wcgr3, [r0], #4 */
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300 RET
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301
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302 /* Wrappers to save core registers, then call the real routine. */
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303
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304 .macro UNWIND_WRAPPER name nargs
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305 ARM_FUNC_START \name
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306 /* Create a phase2_vrs structure. */
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307 /* Split reg push in two to ensure the correct value for sp. */
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308 #if defined(__thumb2__)
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309 mov ip, sp
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310 push {lr} /* PC is ignored. */
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311 push {ip, lr} /* Push original SP and LR. */
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312 #else
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313 stmfd sp!, {sp, lr, pc}
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314 #endif
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315 stmfd sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip}
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316
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317 /* Demand-save flags, plus an extra word for alignment. */
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318 mov r3, #0
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319 stmfd sp!, {r2, r3}
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320
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321 /* Point r1 at the block. Pass r[0..nargs) unchanged. */
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322 add r\nargs, sp, #4
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323 #if defined(__thumb__) && !defined(__thumb2__)
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324 /* Switch back to thumb mode to avoid interworking hassle. */
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325 adr ip, .L1_\name
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326 orr ip, ip, #1
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327 bx ip
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328 .thumb
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329 .L1_\name:
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330 bl SYM (__gnu\name) __PLT__
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331 ldr r3, [sp, #64]
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332 add sp, #72
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333 bx r3
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334 #else
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335 bl SYM (__gnu\name) __PLT__
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336 ldr lr, [sp, #64]
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337 add sp, sp, #72
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338 RET
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339 #endif
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340 FUNC_END \name
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341 UNPREFIX \name
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342 .endm
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343
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344 #endif /* !__ARM_ARCH_6M__ */
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345
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346 UNWIND_WRAPPER _Unwind_RaiseException 1
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347 UNWIND_WRAPPER _Unwind_Resume 1
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348 UNWIND_WRAPPER _Unwind_Resume_or_Rethrow 1
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349 UNWIND_WRAPPER _Unwind_ForcedUnwind 3
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350 UNWIND_WRAPPER _Unwind_Backtrace 2
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351
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352 #endif /* ndef __symbian__ */
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