annotate gcc/config/ia64/sfp-machine.h @ 0:a06113de4d67

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author kent <kent@cr.ie.u-ryukyu.ac.jp>
date Fri, 17 Jul 2009 14:47:48 +0900
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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1 #define _FP_W_TYPE_SIZE 64
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2 #define _FP_W_TYPE unsigned long
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3 #define _FP_WS_TYPE signed long
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4 #define _FP_I_TYPE long
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5
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6 typedef int TItype __attribute__ ((mode (TI)));
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7 typedef unsigned int UTItype __attribute__ ((mode (TI)));
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8
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9 #define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))
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10
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11 /* The type of the result of a floating point comparison. This must
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12 match `__libgcc_cmp_return__' in GCC for the target. */
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13 typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
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14 #define CMPtype __gcc_CMPtype
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15
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16 #define _FP_MUL_MEAT_Q(R,X,Y) \
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17 _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
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18
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19 #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
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20
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21 #define _FP_NANFRAC_S _FP_QNANBIT_S
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22 #define _FP_NANFRAC_D _FP_QNANBIT_D
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23 #define _FP_NANFRAC_E _FP_QNANBIT_E, 0
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24 #define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0
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25 #define _FP_NANSIGN_S 1
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26 #define _FP_NANSIGN_D 1
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27 #define _FP_NANSIGN_E 1
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28 #define _FP_NANSIGN_Q 1
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29
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30 #define _FP_KEEPNANFRACP 1
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31
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32 /* Here is something Intel misdesigned: the specs don't define
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33 the case where we have two NaNs with same mantissas, but
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34 different sign. Different operations pick up different NaNs. */
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35 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
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36 do { \
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37 if (_FP_FRAC_GT_##wc(X, Y) \
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38 || (_FP_FRAC_EQ_##wc(X,Y) && (OP == '+' || OP == '*'))) \
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39 { \
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40 R##_s = X##_s; \
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41 _FP_FRAC_COPY_##wc(R,X); \
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42 } \
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43 else \
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44 { \
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45 R##_s = Y##_s; \
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46 _FP_FRAC_COPY_##wc(R,Y); \
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47 } \
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48 R##_c = FP_CLS_NAN; \
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49 } while (0)
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50
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51 #define FP_EX_INVALID 0x01
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52 #define FP_EX_DENORM 0x02
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53 #define FP_EX_DIVZERO 0x04
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54 #define FP_EX_OVERFLOW 0x08
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55 #define FP_EX_UNDERFLOW 0x10
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56 #define FP_EX_INEXACT 0x20
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57
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58 #define FP_HANDLE_EXCEPTIONS \
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59 do { \
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60 double tmp, dummy; \
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61 if (_fex & FP_EX_INVALID) \
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62 { \
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63 tmp = 0.0; \
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64 __asm__ __volatile__ ("frcpa.s0 %0,p1=f0,f0" \
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65 : "=f" (tmp) : : "p1" ); \
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66 } \
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67 if (_fex & FP_EX_DIVZERO) \
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68 { \
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69 __asm__ __volatile__ ("frcpa.s0 %0,p1=f1,f0" \
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70 : "=f" (tmp) : : "p1" ); \
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71 } \
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72 if (_fex & FP_EX_OVERFLOW) \
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73 { \
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74 dummy = __DBL_MAX__; \
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75 __asm__ __volatile__ ("fadd.d.s0 %0=%1,%1" \
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76 : "=f" (dummy) : "0" (dummy)); \
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77 } \
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78 if (_fex & FP_EX_UNDERFLOW) \
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79 { \
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80 dummy = __DBL_MIN__; \
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81 __asm__ __volatile__ ("fnma.d.s0 %0=%1,%1,f0" \
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82 : "=f" (tmp) : "f" (dummy)); \
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83 } \
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84 if (_fex & FP_EX_INEXACT) \
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85 { \
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86 dummy = __DBL_MAX__; \
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87 __asm__ __volatile__ ("fsub.d.s0 %0=%1,f1" \
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88 : "=f" (dummy) : "0" (dummy)); \
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89 } \
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90 } while (0)
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91
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92 #define FP_RND_NEAREST 0
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93 #define FP_RND_ZERO 0xc00L
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94 #define FP_RND_PINF 0x800L
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95 #define FP_RND_MINF 0x400L
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96
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97 #define _FP_DECL_EX \
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98 unsigned long int _fpsr __attribute__ ((unused)) = FP_RND_NEAREST
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99
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100 #define FP_INIT_ROUNDMODE \
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101 do { \
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102 __asm__ __volatile__ ("mov.m %0=ar.fpsr" \
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103 : "=r" (_fpsr)); \
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104 } while (0)
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105
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106 #define FP_ROUNDMODE (_fpsr & 0xc00L)
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107
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108 #define __LITTLE_ENDIAN 1234
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109 #define __BIG_ENDIAN 4321
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110
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111 #define __BYTE_ORDER __LITTLE_ENDIAN
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112
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113 /* Define ALIASNAME as a strong alias for NAME. */
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114 #define strong_alias(name, aliasname) _strong_alias(name, aliasname)
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115 #define _strong_alias(name, aliasname) \
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116 extern __typeof (name) aliasname __attribute__ ((alias (#name)));