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0
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1 /* Subroutines needed for unwinding IA-64 standard format stack frame
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2 info for exception handling.
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3 Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2004, 2005, 2006,
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4 2009 Free Software Foundation, Inc.
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5 Contributed by Andrew MacLeod <amacleod@cygnus.com>
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6 Andrew Haley <aph@cygnus.com>
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7 David Mosberger-Tang <davidm@hpl.hp.com>
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8
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9 This file is part of GCC.
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10
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11 GCC is free software; you can redistribute it and/or modify
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12 it under the terms of the GNU General Public License as published by
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13 the Free Software Foundation; either version 3, or (at your option)
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14 any later version.
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15
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16 GCC is distributed in the hope that it will be useful,
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17 but WITHOUT ANY WARRANTY; without even the implied warranty of
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18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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19 GNU General Public License for more details.
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20
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21 Under Section 7 of GPL version 3, you are granted additional
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22 permissions described in the GCC Runtime Library Exception, version
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23 3.1, as published by the Free Software Foundation.
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24
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25 You should have received a copy of the GNU General Public License and
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26 a copy of the GCC Runtime Library Exception along with this program;
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27 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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28 <http://www.gnu.org/licenses/>. */
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29
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30 #include "tconfig.h"
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31 #include "tsystem.h"
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32 #include "coretypes.h"
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33 #include "tm.h"
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34 #include "unwind.h"
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35 #include "unwind-ia64.h"
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36 #include "unwind-compat.h"
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37 #include "ia64intrin.h"
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38
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39 /* This isn't thread safe, but nice for occasional tests. */
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40 #undef ENABLE_MALLOC_CHECKING
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41
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42 #ifndef __USING_SJLJ_EXCEPTIONS__
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43
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44 #define UNW_VER(x) ((x) >> 48)
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45 #define UNW_FLAG_MASK 0x0000ffff00000000
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46 #define UNW_FLAG_OSMASK 0x0000f00000000000
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47 #define UNW_FLAG_EHANDLER(x) ((x) & 0x0000000100000000L)
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48 #define UNW_FLAG_UHANDLER(x) ((x) & 0x0000000200000000L)
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49 #define UNW_LENGTH(x) ((x) & 0x00000000ffffffffL)
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50
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51 enum unw_application_register
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52 {
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53 UNW_AR_BSP,
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54 UNW_AR_BSPSTORE,
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55 UNW_AR_PFS,
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56 UNW_AR_RNAT,
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57 UNW_AR_UNAT,
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58 UNW_AR_LC,
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59 UNW_AR_EC,
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60 UNW_AR_FPSR,
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61 UNW_AR_RSC,
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62 UNW_AR_CCV
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63 };
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64
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65 enum unw_register_index
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66 {
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67 /* Primary UNAT. */
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68 UNW_REG_PRI_UNAT_GR,
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69 UNW_REG_PRI_UNAT_MEM,
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70
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71 /* Memory Stack. */
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72 UNW_REG_PSP, /* previous memory stack pointer */
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73
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74 /* Register Stack. */
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75 UNW_REG_BSP, /* register stack pointer */
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76 UNW_REG_BSPSTORE,
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77 UNW_REG_PFS, /* previous function state */
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78 UNW_REG_RNAT,
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79 /* Return Pointer. */
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80 UNW_REG_RP,
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81
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82 /* Special preserved registers. */
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83 UNW_REG_UNAT, UNW_REG_PR, UNW_REG_LC, UNW_REG_FPSR,
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84
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85 /* Non-stacked general registers. */
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86 UNW_REG_R2,
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87 UNW_REG_R4 = UNW_REG_R2 + 2,
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88 UNW_REG_R7 = UNW_REG_R2 + 5,
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89 UNW_REG_R31 = UNW_REG_R2 + 29,
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90
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91 /* Non-stacked floating point registers. */
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92 UNW_REG_F2,
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93 UNW_REG_F5 = UNW_REG_F2 + 3,
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94 UNW_REG_F16 = UNW_REG_F2 + 14,
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95 UNW_REG_F31 = UNW_REG_F2 + 29,
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96
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97 /* Branch registers. */
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98 UNW_REG_B0, UNW_REG_B1,
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99 UNW_REG_B5 = UNW_REG_B1 + 4,
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100
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101 UNW_NUM_REGS
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102 };
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103
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104 enum unw_where
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105 {
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106 UNW_WHERE_NONE, /* register isn't saved at all */
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107 UNW_WHERE_GR, /* register is saved in a general register */
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108 UNW_WHERE_FR, /* register is saved in a floating-point register */
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109 UNW_WHERE_BR, /* register is saved in a branch register */
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110 UNW_WHERE_SPREL, /* register is saved on memstack (sp-relative) */
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111 UNW_WHERE_PSPREL, /* register is saved on memstack (psp-relative) */
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112
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113 /* At the end of each prologue these locations get resolved to
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114 UNW_WHERE_PSPREL and UNW_WHERE_GR, respectively. */
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115 UNW_WHERE_SPILL_HOME, /* register is saved in its spill home */
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116 UNW_WHERE_GR_SAVE /* register is saved in next general register */
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117 };
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118
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119 #define UNW_WHEN_NEVER 0x7fffffff
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120
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121 struct unw_reg_info
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122 {
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123 unsigned long val; /* save location: register number or offset */
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124 enum unw_where where; /* where the register gets saved */
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125 int when; /* when the register gets saved */
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126 };
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127
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128 struct unw_reg_state {
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129 struct unw_reg_state *next; /* next (outer) element on state stack */
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130 struct unw_reg_info reg[UNW_NUM_REGS]; /* register save locations */
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131 };
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132
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133 struct unw_labeled_state {
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134 struct unw_labeled_state *next; /* next labeled state (or NULL) */
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135 unsigned long label; /* label for this state */
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136 struct unw_reg_state saved_state;
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137 };
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138
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139 typedef struct unw_state_record
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140 {
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141 unsigned int first_region : 1; /* is this the first region? */
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142 unsigned int done : 1; /* are we done scanning descriptors? */
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143 unsigned int any_spills : 1; /* got any register spills? */
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144 unsigned int in_body : 1; /* are we inside a body? */
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145 unsigned int no_reg_stack_frame : 1; /* Don't adjust bsp for i&l regs */
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146 unsigned char *imask; /* imask of spill_mask record or NULL */
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147 unsigned long pr_val; /* predicate values */
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148 unsigned long pr_mask; /* predicate mask */
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149 long spill_offset; /* psp-relative offset for spill base */
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150 int region_start;
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151 int region_len;
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152 int epilogue_start;
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153 int epilogue_count;
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154 int when_target;
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155
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156 unsigned char gr_save_loc; /* next general register to use for saving */
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157 unsigned char return_link_reg; /* branch register for return link */
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158 unsigned short unwabi;
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159
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160 struct unw_labeled_state *labeled_states; /* list of all labeled states */
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161 struct unw_reg_state curr; /* current state */
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162
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163 _Unwind_Personality_Fn personality;
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164
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165 } _Unwind_FrameState;
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166
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167 enum unw_nat_type
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168 {
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169 UNW_NAT_NONE, /* NaT not represented */
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170 UNW_NAT_VAL, /* NaT represented by NaT value (fp reg) */
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171 UNW_NAT_MEMSTK, /* NaT value is in unat word at offset OFF */
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172 UNW_NAT_REGSTK /* NaT is in rnat */
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173 };
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174
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175 struct unw_stack
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176 {
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177 unsigned long limit;
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178 unsigned long top;
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179 };
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180
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181 struct _Unwind_Context
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182 {
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183 /* Initial frame info. */
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184 unsigned long rnat; /* rse nat collection */
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185 unsigned long regstk_top; /* lowest address of rbs stored register
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186 which uses context->rnat collection */
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187
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188 /* Current frame info. */
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189 unsigned long bsp; /* backing store pointer value
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190 corresponding to psp. */
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191 unsigned long sp; /* stack pointer value */
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192 unsigned long psp; /* previous sp value */
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193 unsigned long rp; /* return pointer */
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194 unsigned long pr; /* predicate collection */
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195
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196 unsigned long region_start; /* start of unwind region */
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197 unsigned long gp; /* global pointer value */
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198 void *lsda; /* language specific data area */
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199
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200 /* Preserved state. */
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201 unsigned long *bsp_loc; /* previous bsp save location
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202 Appears to be write-only? */
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203 unsigned long *bspstore_loc;
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204 unsigned long *pfs_loc; /* Save location for pfs in current
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205 (corr. to sp) frame. Target
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206 contains cfm for caller. */
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207 unsigned long *pri_unat_loc;
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208 unsigned long *unat_loc;
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209 unsigned long *lc_loc;
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210 unsigned long *fpsr_loc;
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211
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212 unsigned long eh_data[4];
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213
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214 struct unw_ireg
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215 {
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216 unsigned long *loc;
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217 struct unw_ireg_nat
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218 {
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219 enum unw_nat_type type : 3;
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220 signed long off : 61; /* NaT word is at loc+nat.off */
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221 } nat;
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222 } ireg[32 - 2]; /* Indexed by <register number> - 2 */
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223
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224 unsigned long *br_loc[8];
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225 void *fr_loc[32 - 2];
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226
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227 /* ??? We initially point pri_unat_loc here. The entire NAT bit
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228 logic needs work. */
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229 unsigned long initial_unat;
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230 };
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231
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232 typedef unsigned long unw_word;
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233
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234 /* Implicit register save order. See section 11.4.2.3 Rules for Using
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235 Unwind Descriptors, rule 3. */
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236
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237 static unsigned char const save_order[] =
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238 {
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239 UNW_REG_RP, UNW_REG_PFS, UNW_REG_PSP, UNW_REG_PR,
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240 UNW_REG_UNAT, UNW_REG_LC, UNW_REG_FPSR, UNW_REG_PRI_UNAT_GR
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241 };
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242
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243
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244 #define MIN(X, Y) ((X) < (Y) ? (X) : (Y))
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245
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246 /* MASK is a bitmap describing the allocation state of emergency buffers,
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247 with bit set indicating free. Return >= 0 if allocation is successful;
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248 < 0 if failure. */
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249
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250 static inline int
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251 atomic_alloc (unsigned int *mask)
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252 {
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253 unsigned int old = *mask, ret, new;
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254
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255 while (1)
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256 {
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257 if (old == 0)
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258 return -1;
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259 ret = old & -old;
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260 new = old & ~ret;
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261 new = __sync_val_compare_and_swap (mask, old, new);
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262 if (old == new)
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263 break;
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264 old = new;
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265 }
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266
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267 return __builtin_ffs (ret) - 1;
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268 }
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269
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270 /* Similarly, free an emergency buffer. */
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271
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272 static inline void
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273 atomic_free (unsigned int *mask, int bit)
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274 {
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275 __sync_xor_and_fetch (mask, 1 << bit);
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276 }
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277
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278
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279 #define SIZE(X) (sizeof(X) / sizeof(*(X)))
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280 #define MASK_FOR(X) ((2U << (SIZE (X) - 1)) - 1)
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281 #define PTR_IN(X, P) ((P) >= (X) && (P) < (X) + SIZE (X))
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282
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283 static struct unw_reg_state emergency_reg_state[32];
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284 static unsigned int emergency_reg_state_free = MASK_FOR (emergency_reg_state);
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285
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286 static struct unw_labeled_state emergency_labeled_state[8];
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287 static unsigned int emergency_labeled_state_free = MASK_FOR (emergency_labeled_state);
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288
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289 #ifdef ENABLE_MALLOC_CHECKING
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290 static int reg_state_alloced;
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291 static int labeled_state_alloced;
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292 #endif
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293
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294 /* Allocation and deallocation of structures. */
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295
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296 static struct unw_reg_state *
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297 alloc_reg_state (void)
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298 {
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299 struct unw_reg_state *rs;
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300
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301 #ifdef ENABLE_MALLOC_CHECKING
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302 reg_state_alloced++;
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303 #endif
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304
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305 rs = malloc (sizeof (struct unw_reg_state));
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306 if (!rs)
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307 {
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308 int n = atomic_alloc (&emergency_reg_state_free);
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309 if (n >= 0)
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310 rs = &emergency_reg_state[n];
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311 }
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312
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313 return rs;
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314 }
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315
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316 static void
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317 free_reg_state (struct unw_reg_state *rs)
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318 {
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319 #ifdef ENABLE_MALLOC_CHECKING
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320 reg_state_alloced--;
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321 #endif
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322
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323 if (PTR_IN (emergency_reg_state, rs))
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324 atomic_free (&emergency_reg_state_free, rs - emergency_reg_state);
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325 else
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326 free (rs);
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327 }
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328
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329 static struct unw_labeled_state *
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330 alloc_label_state (void)
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331 {
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332 struct unw_labeled_state *ls;
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333
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334 #ifdef ENABLE_MALLOC_CHECKING
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335 labeled_state_alloced++;
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336 #endif
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337
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338 ls = malloc(sizeof(struct unw_labeled_state));
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339 if (!ls)
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340 {
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341 int n = atomic_alloc (&emergency_labeled_state_free);
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342 if (n >= 0)
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343 ls = &emergency_labeled_state[n];
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344 }
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345
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346 return ls;
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347 }
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348
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349 static void
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350 free_label_state (struct unw_labeled_state *ls)
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351 {
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352 #ifdef ENABLE_MALLOC_CHECKING
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353 labeled_state_alloced--;
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354 #endif
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355
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356 if (PTR_IN (emergency_labeled_state, ls))
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357 atomic_free (&emergency_labeled_state_free, emergency_labeled_state - ls);
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358 else
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359 free (ls);
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360 }
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361
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362 /* Routines to manipulate the state stack. */
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363
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364 static void
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365 push (struct unw_state_record *sr)
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366 {
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367 struct unw_reg_state *rs = alloc_reg_state ();
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368 memcpy (rs, &sr->curr, sizeof (*rs));
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369 sr->curr.next = rs;
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370 }
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371
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372 static void
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373 pop (struct unw_state_record *sr)
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374 {
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375 struct unw_reg_state *rs = sr->curr.next;
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376
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377 if (!rs)
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378 abort ();
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379 memcpy (&sr->curr, rs, sizeof(*rs));
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380 free_reg_state (rs);
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381 }
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382
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383 /* Make a copy of the state stack. Non-recursive to avoid stack overflows. */
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384
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385 static struct unw_reg_state *
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386 dup_state_stack (struct unw_reg_state *rs)
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387 {
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388 struct unw_reg_state *copy, *prev = NULL, *first = NULL;
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389
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390 while (rs)
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391 {
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392 copy = alloc_reg_state ();
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393 memcpy (copy, rs, sizeof(*copy));
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394 if (first)
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395 prev->next = copy;
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396 else
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397 first = copy;
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398 rs = rs->next;
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399 prev = copy;
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400 }
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401
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402 return first;
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403 }
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404
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405 /* Free all stacked register states (but not RS itself). */
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406 static void
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407 free_state_stack (struct unw_reg_state *rs)
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408 {
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409 struct unw_reg_state *p, *next;
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410
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411 for (p = rs->next; p != NULL; p = next)
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412 {
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413 next = p->next;
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414 free_reg_state (p);
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415 }
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416 rs->next = NULL;
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417 }
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|
|
418
|
|
|
419 /* Free all labeled states. */
|
|
|
420
|
|
|
421 static void
|
|
|
422 free_label_states (struct unw_labeled_state *ls)
|
|
|
423 {
|
|
|
424 struct unw_labeled_state *next;
|
|
|
425
|
|
|
426 for (; ls ; ls = next)
|
|
|
427 {
|
|
|
428 next = ls->next;
|
|
|
429
|
|
|
430 free_state_stack (&ls->saved_state);
|
|
|
431 free_label_state (ls);
|
|
|
432 }
|
|
|
433 }
|
|
|
434
|
|
|
435 /* Unwind decoder routines */
|
|
|
436
|
|
|
437 static enum unw_register_index __attribute__((const))
|
|
|
438 decode_abreg (unsigned char abreg, int memory)
|
|
|
439 {
|
|
|
440 switch (abreg)
|
|
|
441 {
|
|
|
442 case 0x04 ... 0x07: return UNW_REG_R4 + (abreg - 0x04);
|
|
|
443 case 0x22 ... 0x25: return UNW_REG_F2 + (abreg - 0x22);
|
|
|
444 case 0x30 ... 0x3f: return UNW_REG_F16 + (abreg - 0x30);
|
|
|
445 case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41);
|
|
|
446 case 0x60: return UNW_REG_PR;
|
|
|
447 case 0x61: return UNW_REG_PSP;
|
|
|
448 case 0x62: return memory ? UNW_REG_PRI_UNAT_MEM : UNW_REG_PRI_UNAT_GR;
|
|
|
449 case 0x63: return UNW_REG_RP;
|
|
|
450 case 0x64: return UNW_REG_BSP;
|
|
|
451 case 0x65: return UNW_REG_BSPSTORE;
|
|
|
452 case 0x66: return UNW_REG_RNAT;
|
|
|
453 case 0x67: return UNW_REG_UNAT;
|
|
|
454 case 0x68: return UNW_REG_FPSR;
|
|
|
455 case 0x69: return UNW_REG_PFS;
|
|
|
456 case 0x6a: return UNW_REG_LC;
|
|
|
457 default:
|
|
|
458 abort ();
|
|
|
459 }
|
|
|
460 }
|
|
|
461
|
|
|
462 static void
|
|
|
463 set_reg (struct unw_reg_info *reg, enum unw_where where,
|
|
|
464 int when, unsigned long val)
|
|
|
465 {
|
|
|
466 reg->val = val;
|
|
|
467 reg->where = where;
|
|
|
468 if (reg->when == UNW_WHEN_NEVER)
|
|
|
469 reg->when = when;
|
|
|
470 }
|
|
|
471
|
|
|
472 static void
|
|
|
473 alloc_spill_area (unsigned long *offp, unsigned long regsize,
|
|
|
474 struct unw_reg_info *lo, struct unw_reg_info *hi)
|
|
|
475 {
|
|
|
476 struct unw_reg_info *reg;
|
|
|
477
|
|
|
478 for (reg = hi; reg >= lo; --reg)
|
|
|
479 {
|
|
|
480 if (reg->where == UNW_WHERE_SPILL_HOME)
|
|
|
481 {
|
|
|
482 reg->where = UNW_WHERE_PSPREL;
|
|
|
483 *offp -= regsize;
|
|
|
484 reg->val = *offp;
|
|
|
485 }
|
|
|
486 }
|
|
|
487 }
|
|
|
488
|
|
|
489 static inline void
|
|
|
490 spill_next_when (struct unw_reg_info **regp, struct unw_reg_info *lim,
|
|
|
491 unw_word t)
|
|
|
492 {
|
|
|
493 struct unw_reg_info *reg;
|
|
|
494
|
|
|
495 for (reg = *regp; reg <= lim; ++reg)
|
|
|
496 {
|
|
|
497 if (reg->where == UNW_WHERE_SPILL_HOME)
|
|
|
498 {
|
|
|
499 reg->when = t;
|
|
|
500 *regp = reg + 1;
|
|
|
501 return;
|
|
|
502 }
|
|
|
503 }
|
|
|
504 /* Excess spill. */
|
|
|
505 abort ();
|
|
|
506 }
|
|
|
507
|
|
|
508 static void
|
|
|
509 finish_prologue (struct unw_state_record *sr)
|
|
|
510 {
|
|
|
511 struct unw_reg_info *reg;
|
|
|
512 unsigned long off;
|
|
|
513 int i;
|
|
|
514
|
|
|
515 /* First, resolve implicit register save locations
|
|
|
516 (see Section "11.4.2.3 Rules for Using Unwind Descriptors", rule 3). */
|
|
|
517
|
|
|
518 for (i = 0; i < (int) sizeof (save_order); ++i)
|
|
|
519 {
|
|
|
520 reg = sr->curr.reg + save_order[i];
|
|
|
521 if (reg->where == UNW_WHERE_GR_SAVE)
|
|
|
522 {
|
|
|
523 reg->where = UNW_WHERE_GR;
|
|
|
524 reg->val = sr->gr_save_loc++;
|
|
|
525 }
|
|
|
526 }
|
|
|
527
|
|
|
528 /* Next, compute when the fp, general, and branch registers get saved.
|
|
|
529 This must come before alloc_spill_area() because we need to know
|
|
|
530 which registers are spilled to their home locations. */
|
|
|
531 if (sr->imask)
|
|
|
532 {
|
|
|
533 static unsigned char const limit[3] = {
|
|
|
534 UNW_REG_F31, UNW_REG_R7, UNW_REG_B5
|
|
|
535 };
|
|
|
536
|
|
|
537 unsigned char kind, mask = 0, *cp = sr->imask;
|
|
|
538 int t;
|
|
|
539 struct unw_reg_info *(regs[3]);
|
|
|
540
|
|
|
541 regs[0] = sr->curr.reg + UNW_REG_F2;
|
|
|
542 regs[1] = sr->curr.reg + UNW_REG_R4;
|
|
|
543 regs[2] = sr->curr.reg + UNW_REG_B1;
|
|
|
544
|
|
|
545 for (t = 0; t < sr->region_len; ++t)
|
|
|
546 {
|
|
|
547 if ((t & 3) == 0)
|
|
|
548 mask = *cp++;
|
|
|
549 kind = (mask >> 2*(3-(t & 3))) & 3;
|
|
|
550 if (kind > 0)
|
|
|
551 spill_next_when (®s[kind - 1], sr->curr.reg + limit[kind - 1],
|
|
|
552 sr->region_start + t);
|
|
|
553 }
|
|
|
554 }
|
|
|
555
|
|
|
556 /* Next, lay out the memory stack spill area. */
|
|
|
557 if (sr->any_spills)
|
|
|
558 {
|
|
|
559 off = sr->spill_offset;
|
|
|
560 alloc_spill_area (&off, 16, sr->curr.reg + UNW_REG_F2,
|
|
|
561 sr->curr.reg + UNW_REG_F31);
|
|
|
562 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_B1,
|
|
|
563 sr->curr.reg + UNW_REG_B5);
|
|
|
564 alloc_spill_area (&off, 8, sr->curr.reg + UNW_REG_R4,
|
|
|
565 sr->curr.reg + UNW_REG_R7);
|
|
|
566 }
|
|
|
567 }
|
|
|
568
|
|
|
569 /*
|
|
|
570 * Region header descriptors.
|
|
|
571 */
|
|
|
572
|
|
|
573 static void
|
|
|
574 desc_prologue (int body, unw_word rlen, unsigned char mask,
|
|
|
575 unsigned char grsave, struct unw_state_record *sr)
|
|
|
576 {
|
|
|
577 int i;
|
|
|
578
|
|
|
579 if (!(sr->in_body || sr->first_region))
|
|
|
580 finish_prologue (sr);
|
|
|
581 sr->first_region = 0;
|
|
|
582
|
|
|
583 /* Check if we're done. */
|
|
|
584 if (sr->when_target < sr->region_start + sr->region_len)
|
|
|
585 {
|
|
|
586 sr->done = 1;
|
|
|
587 return;
|
|
|
588 }
|
|
|
589
|
|
|
590 for (i = 0; i < sr->epilogue_count; ++i)
|
|
|
591 pop (sr);
|
|
|
592
|
|
|
593 sr->epilogue_count = 0;
|
|
|
594 sr->epilogue_start = UNW_WHEN_NEVER;
|
|
|
595
|
|
|
596 if (!body)
|
|
|
597 push (sr);
|
|
|
598
|
|
|
599 sr->region_start += sr->region_len;
|
|
|
600 sr->region_len = rlen;
|
|
|
601 sr->in_body = body;
|
|
|
602
|
|
|
603 if (!body)
|
|
|
604 {
|
|
|
605 for (i = 0; i < 4; ++i)
|
|
|
606 {
|
|
|
607 if (mask & 0x8)
|
|
|
608 set_reg (sr->curr.reg + save_order[i], UNW_WHERE_GR,
|
|
|
609 sr->region_start + sr->region_len - 1, grsave++);
|
|
|
610 mask <<= 1;
|
|
|
611 }
|
|
|
612 sr->gr_save_loc = grsave;
|
|
|
613 sr->any_spills = 0;
|
|
|
614 sr->imask = 0;
|
|
|
615 sr->spill_offset = 0x10; /* default to psp+16 */
|
|
|
616 }
|
|
|
617 }
|
|
|
618
|
|
|
619 /*
|
|
|
620 * Prologue descriptors.
|
|
|
621 */
|
|
|
622
|
|
|
623 static inline void
|
|
|
624 desc_abi (unsigned char abi,
|
|
|
625 unsigned char context,
|
|
|
626 struct unw_state_record *sr)
|
|
|
627 {
|
|
|
628 sr->unwabi = (abi << 8) | context;
|
|
|
629 }
|
|
|
630
|
|
|
631 static inline void
|
|
|
632 desc_br_gr (unsigned char brmask, unsigned char gr,
|
|
|
633 struct unw_state_record *sr)
|
|
|
634 {
|
|
|
635 int i;
|
|
|
636
|
|
|
637 for (i = 0; i < 5; ++i)
|
|
|
638 {
|
|
|
639 if (brmask & 1)
|
|
|
640 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR,
|
|
|
641 sr->region_start + sr->region_len - 1, gr++);
|
|
|
642 brmask >>= 1;
|
|
|
643 }
|
|
|
644 }
|
|
|
645
|
|
|
646 static inline void
|
|
|
647 desc_br_mem (unsigned char brmask, struct unw_state_record *sr)
|
|
|
648 {
|
|
|
649 int i;
|
|
|
650
|
|
|
651 for (i = 0; i < 5; ++i)
|
|
|
652 {
|
|
|
653 if (brmask & 1)
|
|
|
654 {
|
|
|
655 set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME,
|
|
|
656 sr->region_start + sr->region_len - 1, 0);
|
|
|
657 sr->any_spills = 1;
|
|
|
658 }
|
|
|
659 brmask >>= 1;
|
|
|
660 }
|
|
|
661 }
|
|
|
662
|
|
|
663 static inline void
|
|
|
664 desc_frgr_mem (unsigned char grmask, unw_word frmask,
|
|
|
665 struct unw_state_record *sr)
|
|
|
666 {
|
|
|
667 int i;
|
|
|
668
|
|
|
669 for (i = 0; i < 4; ++i)
|
|
|
670 {
|
|
|
671 if ((grmask & 1) != 0)
|
|
|
672 {
|
|
|
673 set_reg (sr->curr.reg + UNW_REG_R4 + i, UNW_WHERE_SPILL_HOME,
|
|
|
674 sr->region_start + sr->region_len - 1, 0);
|
|
|
675 sr->any_spills = 1;
|
|
|
676 }
|
|
|
677 grmask >>= 1;
|
|
|
678 }
|
|
|
679 for (i = 0; i < 20; ++i)
|
|
|
680 {
|
|
|
681 if ((frmask & 1) != 0)
|
|
|
682 {
|
|
|
683 enum unw_register_index base = i < 4 ? UNW_REG_F2 : UNW_REG_F16 - 4;
|
|
|
684 set_reg (sr->curr.reg + base + i, UNW_WHERE_SPILL_HOME,
|
|
|
685 sr->region_start + sr->region_len - 1, 0);
|
|
|
686 sr->any_spills = 1;
|
|
|
687 }
|
|
|
688 frmask >>= 1;
|
|
|
689 }
|
|
|
690 }
|
|
|
691
|
|
|
692 static inline void
|
|
|
693 desc_fr_mem (unsigned char frmask, struct unw_state_record *sr)
|
|
|
694 {
|
|
|
695 int i;
|
|
|
696
|
|
|
697 for (i = 0; i < 4; ++i)
|
|
|
698 {
|
|
|
699 if ((frmask & 1) != 0)
|
|
|
700 {
|
|
|
701 set_reg (sr->curr.reg + UNW_REG_F2 + i, UNW_WHERE_SPILL_HOME,
|
|
|
702 sr->region_start + sr->region_len - 1, 0);
|
|
|
703 sr->any_spills = 1;
|
|
|
704 }
|
|
|
705 frmask >>= 1;
|
|
|
706 }
|
|
|
707 }
|
|
|
708
|
|
|
709 static inline void
|
|
|
710 desc_gr_gr (unsigned char grmask, unsigned char gr,
|
|
|
711 struct unw_state_record *sr)
|
|
|
712 {
|
|
|
713 int i;
|
|
|
714
|
|
|
715 for (i = 0; i < 4; ++i)
|
|
|
716 {
|
|
|
717 if ((grmask & 1) != 0)
|
|
|
718 set_reg (sr->curr.reg + UNW_REG_R4 + i, UNW_WHERE_GR,
|
|
|
719 sr->region_start + sr->region_len - 1, gr++);
|
|
|
720 grmask >>= 1;
|
|
|
721 }
|
|
|
722 }
|
|
|
723
|
|
|
724 static inline void
|
|
|
725 desc_gr_mem (unsigned char grmask, struct unw_state_record *sr)
|
|
|
726 {
|
|
|
727 int i;
|
|
|
728
|
|
|
729 for (i = 0; i < 4; ++i)
|
|
|
730 {
|
|
|
731 if ((grmask & 1) != 0)
|
|
|
732 {
|
|
|
733 set_reg (sr->curr.reg + UNW_REG_R4 + i, UNW_WHERE_SPILL_HOME,
|
|
|
734 sr->region_start + sr->region_len - 1, 0);
|
|
|
735 sr->any_spills = 1;
|
|
|
736 }
|
|
|
737 grmask >>= 1;
|
|
|
738 }
|
|
|
739 }
|
|
|
740
|
|
|
741 static inline void
|
|
|
742 desc_mem_stack_f (unw_word t, unw_word size, struct unw_state_record *sr)
|
|
|
743 {
|
|
|
744 set_reg (sr->curr.reg + UNW_REG_PSP, UNW_WHERE_NONE,
|
|
|
745 sr->region_start + MIN ((int)t, sr->region_len - 1), 16*size);
|
|
|
746 }
|
|
|
747
|
|
|
748 static inline void
|
|
|
749 desc_mem_stack_v (unw_word t, struct unw_state_record *sr)
|
|
|
750 {
|
|
|
751 sr->curr.reg[UNW_REG_PSP].when
|
|
|
752 = sr->region_start + MIN ((int)t, sr->region_len - 1);
|
|
|
753 }
|
|
|
754
|
|
|
755 static inline void
|
|
|
756 desc_reg_gr (unsigned char reg, unsigned char dst, struct unw_state_record *sr)
|
|
|
757 {
|
|
|
758 set_reg (sr->curr.reg + reg, UNW_WHERE_GR,
|
|
|
759 sr->region_start + sr->region_len - 1, dst);
|
|
|
760 }
|
|
|
761
|
|
|
762 static inline void
|
|
|
763 desc_reg_psprel (unsigned char reg, unw_word pspoff,
|
|
|
764 struct unw_state_record *sr)
|
|
|
765 {
|
|
|
766 set_reg (sr->curr.reg + reg, UNW_WHERE_PSPREL,
|
|
|
767 sr->region_start + sr->region_len - 1,
|
|
|
768 0x10 - 4*pspoff);
|
|
|
769 }
|
|
|
770
|
|
|
771 static inline void
|
|
|
772 desc_reg_sprel (unsigned char reg, unw_word spoff, struct unw_state_record *sr)
|
|
|
773 {
|
|
|
774 set_reg (sr->curr.reg + reg, UNW_WHERE_SPREL,
|
|
|
775 sr->region_start + sr->region_len - 1,
|
|
|
776 4*spoff);
|
|
|
777 }
|
|
|
778
|
|
|
779 static inline void
|
|
|
780 desc_rp_br (unsigned char dst, struct unw_state_record *sr)
|
|
|
781 {
|
|
|
782 sr->return_link_reg = dst;
|
|
|
783 }
|
|
|
784
|
|
|
785 static inline void
|
|
|
786 desc_reg_when (unsigned char regnum, unw_word t, struct unw_state_record *sr)
|
|
|
787 {
|
|
|
788 struct unw_reg_info *reg = sr->curr.reg + regnum;
|
|
|
789
|
|
|
790 if (reg->where == UNW_WHERE_NONE)
|
|
|
791 reg->where = UNW_WHERE_GR_SAVE;
|
|
|
792 reg->when = sr->region_start + MIN ((int)t, sr->region_len - 1);
|
|
|
793 }
|
|
|
794
|
|
|
795 static inline void
|
|
|
796 desc_spill_base (unw_word pspoff, struct unw_state_record *sr)
|
|
|
797 {
|
|
|
798 sr->spill_offset = 0x10 - 4*pspoff;
|
|
|
799 }
|
|
|
800
|
|
|
801 static inline unsigned char *
|
|
|
802 desc_spill_mask (unsigned char *imaskp, struct unw_state_record *sr)
|
|
|
803 {
|
|
|
804 sr->imask = imaskp;
|
|
|
805 return imaskp + (2*sr->region_len + 7)/8;
|
|
|
806 }
|
|
|
807
|
|
|
808 /*
|
|
|
809 * Body descriptors.
|
|
|
810 */
|
|
|
811 static inline void
|
|
|
812 desc_epilogue (unw_word t, unw_word ecount, struct unw_state_record *sr)
|
|
|
813 {
|
|
|
814 sr->epilogue_start = sr->region_start + sr->region_len - 1 - t;
|
|
|
815 sr->epilogue_count = ecount + 1;
|
|
|
816 }
|
|
|
817
|
|
|
818 static inline void
|
|
|
819 desc_copy_state (unw_word label, struct unw_state_record *sr)
|
|
|
820 {
|
|
|
821 struct unw_labeled_state *ls;
|
|
|
822
|
|
|
823 for (ls = sr->labeled_states; ls; ls = ls->next)
|
|
|
824 {
|
|
|
825 if (ls->label == label)
|
|
|
826 {
|
|
|
827 free_state_stack (&sr->curr);
|
|
|
828 memcpy (&sr->curr, &ls->saved_state, sizeof (sr->curr));
|
|
|
829 sr->curr.next = dup_state_stack (ls->saved_state.next);
|
|
|
830 return;
|
|
|
831 }
|
|
|
832 }
|
|
|
833 abort ();
|
|
|
834 }
|
|
|
835
|
|
|
836 static inline void
|
|
|
837 desc_label_state (unw_word label, struct unw_state_record *sr)
|
|
|
838 {
|
|
|
839 struct unw_labeled_state *ls = alloc_label_state ();
|
|
|
840
|
|
|
841 ls->label = label;
|
|
|
842 memcpy (&ls->saved_state, &sr->curr, sizeof (ls->saved_state));
|
|
|
843 ls->saved_state.next = dup_state_stack (sr->curr.next);
|
|
|
844
|
|
|
845 /* Insert into list of labeled states. */
|
|
|
846 ls->next = sr->labeled_states;
|
|
|
847 sr->labeled_states = ls;
|
|
|
848 }
|
|
|
849
|
|
|
850 /*
|
|
|
851 * General descriptors.
|
|
|
852 */
|
|
|
853
|
|
|
854 static inline int
|
|
|
855 desc_is_active (unsigned char qp, unw_word t, struct unw_state_record *sr)
|
|
|
856 {
|
|
|
857 if (sr->when_target <= sr->region_start + MIN ((int)t, sr->region_len - 1))
|
|
|
858 return 0;
|
|
|
859 if (qp > 0)
|
|
|
860 {
|
|
|
861 if ((sr->pr_val & (1UL << qp)) == 0)
|
|
|
862 return 0;
|
|
|
863 sr->pr_mask |= (1UL << qp);
|
|
|
864 }
|
|
|
865 return 1;
|
|
|
866 }
|
|
|
867
|
|
|
868 static inline void
|
|
|
869 desc_restore_p (unsigned char qp, unw_word t, unsigned char abreg,
|
|
|
870 struct unw_state_record *sr)
|
|
|
871 {
|
|
|
872 struct unw_reg_info *r;
|
|
|
873
|
|
|
874 if (! desc_is_active (qp, t, sr))
|
|
|
875 return;
|
|
|
876
|
|
|
877 r = sr->curr.reg + decode_abreg (abreg, 0);
|
|
|
878 r->where = UNW_WHERE_NONE;
|
|
|
879 r->when = sr->region_start + MIN ((int)t, sr->region_len - 1);
|
|
|
880 r->val = 0;
|
|
|
881 }
|
|
|
882
|
|
|
883 static inline void
|
|
|
884 desc_spill_reg_p (unsigned char qp, unw_word t, unsigned char abreg,
|
|
|
885 unsigned char x, unsigned char ytreg,
|
|
|
886 struct unw_state_record *sr)
|
|
|
887 {
|
|
|
888 enum unw_where where = UNW_WHERE_GR;
|
|
|
889 struct unw_reg_info *r;
|
|
|
890
|
|
|
891 if (! desc_is_active (qp, t, sr))
|
|
|
892 return;
|
|
|
893
|
|
|
894 if (x)
|
|
|
895 where = UNW_WHERE_BR;
|
|
|
896 else if (ytreg & 0x80)
|
|
|
897 where = UNW_WHERE_FR;
|
|
|
898
|
|
|
899 r = sr->curr.reg + decode_abreg (abreg, 0);
|
|
|
900 r->where = where;
|
|
|
901 r->when = sr->region_start + MIN ((int)t, sr->region_len - 1);
|
|
|
902 r->val = ytreg & 0x7f;
|
|
|
903 }
|
|
|
904
|
|
|
905 static inline void
|
|
|
906 desc_spill_psprel_p (unsigned char qp, unw_word t, unsigned char abreg,
|
|
|
907 unw_word pspoff, struct unw_state_record *sr)
|
|
|
908 {
|
|
|
909 struct unw_reg_info *r;
|
|
|
910
|
|
|
911 if (! desc_is_active (qp, t, sr))
|
|
|
912 return;
|
|
|
913
|
|
|
914 r = sr->curr.reg + decode_abreg (abreg, 1);
|
|
|
915 r->where = UNW_WHERE_PSPREL;
|
|
|
916 r->when = sr->region_start + MIN((int)t, sr->region_len - 1);
|
|
|
917 r->val = 0x10 - 4*pspoff;
|
|
|
918 }
|
|
|
919
|
|
|
920 static inline void
|
|
|
921 desc_spill_sprel_p (unsigned char qp, unw_word t, unsigned char abreg,
|
|
|
922 unw_word spoff, struct unw_state_record *sr)
|
|
|
923 {
|
|
|
924 struct unw_reg_info *r;
|
|
|
925
|
|
|
926 if (! desc_is_active (qp, t, sr))
|
|
|
927 return;
|
|
|
928
|
|
|
929 r = sr->curr.reg + decode_abreg (abreg, 1);
|
|
|
930 r->where = UNW_WHERE_SPREL;
|
|
|
931 r->when = sr->region_start + MIN ((int)t, sr->region_len - 1);
|
|
|
932 r->val = 4*spoff;
|
|
|
933 }
|
|
|
934
|
|
|
935
|
|
|
936 #define UNW_DEC_BAD_CODE(code) abort ();
|
|
|
937
|
|
|
938 /* Region headers. */
|
|
|
939 #define UNW_DEC_PROLOGUE_GR(fmt,r,m,gr,arg) desc_prologue(0,r,m,gr,arg)
|
|
|
940 #define UNW_DEC_PROLOGUE(fmt,b,r,arg) desc_prologue(b,r,0,32,arg)
|
|
|
941
|
|
|
942 /* Prologue descriptors. */
|
|
|
943 #define UNW_DEC_ABI(fmt,a,c,arg) desc_abi(a,c,arg)
|
|
|
944 #define UNW_DEC_BR_GR(fmt,b,g,arg) desc_br_gr(b,g,arg)
|
|
|
945 #define UNW_DEC_BR_MEM(fmt,b,arg) desc_br_mem(b,arg)
|
|
|
946 #define UNW_DEC_FRGR_MEM(fmt,g,f,arg) desc_frgr_mem(g,f,arg)
|
|
|
947 #define UNW_DEC_FR_MEM(fmt,f,arg) desc_fr_mem(f,arg)
|
|
|
948 #define UNW_DEC_GR_GR(fmt,m,g,arg) desc_gr_gr(m,g,arg)
|
|
|
949 #define UNW_DEC_GR_MEM(fmt,m,arg) desc_gr_mem(m,arg)
|
|
|
950 #define UNW_DEC_MEM_STACK_F(fmt,t,s,arg) desc_mem_stack_f(t,s,arg)
|
|
|
951 #define UNW_DEC_MEM_STACK_V(fmt,t,arg) desc_mem_stack_v(t,arg)
|
|
|
952 #define UNW_DEC_REG_GR(fmt,r,d,arg) desc_reg_gr(r,d,arg)
|
|
|
953 #define UNW_DEC_REG_PSPREL(fmt,r,o,arg) desc_reg_psprel(r,o,arg)
|
|
|
954 #define UNW_DEC_REG_SPREL(fmt,r,o,arg) desc_reg_sprel(r,o,arg)
|
|
|
955 #define UNW_DEC_REG_WHEN(fmt,r,t,arg) desc_reg_when(r,t,arg)
|
|
|
956 #define UNW_DEC_PRIUNAT_WHEN_GR(fmt,t,arg) desc_reg_when(UNW_REG_PRI_UNAT_GR,t,arg)
|
|
|
957 #define UNW_DEC_PRIUNAT_WHEN_MEM(fmt,t,arg) desc_reg_when(UNW_REG_PRI_UNAT_MEM,t,arg)
|
|
|
958 #define UNW_DEC_PRIUNAT_GR(fmt,r,arg) desc_reg_gr(UNW_REG_PRI_UNAT_GR,r,arg)
|
|
|
959 #define UNW_DEC_PRIUNAT_PSPREL(fmt,o,arg) desc_reg_psprel(UNW_REG_PRI_UNAT_MEM,o,arg)
|
|
|
960 #define UNW_DEC_PRIUNAT_SPREL(fmt,o,arg) desc_reg_sprel(UNW_REG_PRI_UNAT_MEM,o,arg)
|
|
|
961 #define UNW_DEC_RP_BR(fmt,d,arg) desc_rp_br(d,arg)
|
|
|
962 #define UNW_DEC_SPILL_BASE(fmt,o,arg) desc_spill_base(o,arg)
|
|
|
963 #define UNW_DEC_SPILL_MASK(fmt,m,arg) (m = desc_spill_mask(m,arg))
|
|
|
964
|
|
|
965 /* Body descriptors. */
|
|
|
966 #define UNW_DEC_EPILOGUE(fmt,t,c,arg) desc_epilogue(t,c,arg)
|
|
|
967 #define UNW_DEC_COPY_STATE(fmt,l,arg) desc_copy_state(l,arg)
|
|
|
968 #define UNW_DEC_LABEL_STATE(fmt,l,arg) desc_label_state(l,arg)
|
|
|
969
|
|
|
970 /* General unwind descriptors. */
|
|
|
971 #define UNW_DEC_SPILL_REG_P(f,p,t,a,x,y,arg) desc_spill_reg_p(p,t,a,x,y,arg)
|
|
|
972 #define UNW_DEC_SPILL_REG(f,t,a,x,y,arg) desc_spill_reg_p(0,t,a,x,y,arg)
|
|
|
973 #define UNW_DEC_SPILL_PSPREL_P(f,p,t,a,o,arg) desc_spill_psprel_p(p,t,a,o,arg)
|
|
|
974 #define UNW_DEC_SPILL_PSPREL(f,t,a,o,arg) desc_spill_psprel_p(0,t,a,o,arg)
|
|
|
975 #define UNW_DEC_SPILL_SPREL_P(f,p,t,a,o,arg) desc_spill_sprel_p(p,t,a,o,arg)
|
|
|
976 #define UNW_DEC_SPILL_SPREL(f,t,a,o,arg) desc_spill_sprel_p(0,t,a,o,arg)
|
|
|
977 #define UNW_DEC_RESTORE_P(f,p,t,a,arg) desc_restore_p(p,t,a,arg)
|
|
|
978 #define UNW_DEC_RESTORE(f,t,a,arg) desc_restore_p(0,t,a,arg)
|
|
|
979
|
|
|
980
|
|
|
981 /*
|
|
|
982 * Generic IA-64 unwind info decoder.
|
|
|
983 *
|
|
|
984 * This file is used both by the Linux kernel and objdump. Please keep
|
|
|
985 * the copies of this file in sync.
|
|
|
986 *
|
|
|
987 * You need to customize the decoder by defining the following
|
|
|
988 * macros/constants before including this file:
|
|
|
989 *
|
|
|
990 * Types:
|
|
|
991 * unw_word Unsigned integer type with at least 64 bits
|
|
|
992 *
|
|
|
993 * Register names:
|
|
|
994 * UNW_REG_BSP
|
|
|
995 * UNW_REG_BSPSTORE
|
|
|
996 * UNW_REG_FPSR
|
|
|
997 * UNW_REG_LC
|
|
|
998 * UNW_REG_PFS
|
|
|
999 * UNW_REG_PR
|
|
|
1000 * UNW_REG_RNAT
|
|
|
1001 * UNW_REG_PSP
|
|
|
1002 * UNW_REG_RP
|
|
|
1003 * UNW_REG_UNAT
|
|
|
1004 *
|
|
|
1005 * Decoder action macros:
|
|
|
1006 * UNW_DEC_BAD_CODE(code)
|
|
|
1007 * UNW_DEC_ABI(fmt,abi,context,arg)
|
|
|
1008 * UNW_DEC_BR_GR(fmt,brmask,gr,arg)
|
|
|
1009 * UNW_DEC_BR_MEM(fmt,brmask,arg)
|
|
|
1010 * UNW_DEC_COPY_STATE(fmt,label,arg)
|
|
|
1011 * UNW_DEC_EPILOGUE(fmt,t,ecount,arg)
|
|
|
1012 * UNW_DEC_FRGR_MEM(fmt,grmask,frmask,arg)
|
|
|
1013 * UNW_DEC_FR_MEM(fmt,frmask,arg)
|
|
|
1014 * UNW_DEC_GR_GR(fmt,grmask,gr,arg)
|
|
|
1015 * UNW_DEC_GR_MEM(fmt,grmask,arg)
|
|
|
1016 * UNW_DEC_LABEL_STATE(fmt,label,arg)
|
|
|
1017 * UNW_DEC_MEM_STACK_F(fmt,t,size,arg)
|
|
|
1018 * UNW_DEC_MEM_STACK_V(fmt,t,arg)
|
|
|
1019 * UNW_DEC_PRIUNAT_GR(fmt,r,arg)
|
|
|
1020 * UNW_DEC_PRIUNAT_WHEN_GR(fmt,t,arg)
|
|
|
1021 * UNW_DEC_PRIUNAT_WHEN_MEM(fmt,t,arg)
|
|
|
1022 * UNW_DEC_PRIUNAT_WHEN_PSPREL(fmt,pspoff,arg)
|
|
|
1023 * UNW_DEC_PRIUNAT_WHEN_SPREL(fmt,spoff,arg)
|
|
|
1024 * UNW_DEC_PROLOGUE(fmt,body,rlen,arg)
|
|
|
1025 * UNW_DEC_PROLOGUE_GR(fmt,rlen,mask,grsave,arg)
|
|
|
1026 * UNW_DEC_REG_PSPREL(fmt,reg,pspoff,arg)
|
|
|
1027 * UNW_DEC_REG_REG(fmt,src,dst,arg)
|
|
|
1028 * UNW_DEC_REG_SPREL(fmt,reg,spoff,arg)
|
|
|
1029 * UNW_DEC_REG_WHEN(fmt,reg,t,arg)
|
|
|
1030 * UNW_DEC_RESTORE(fmt,t,abreg,arg)
|
|
|
1031 * UNW_DEC_RESTORE_P(fmt,qp,t,abreg,arg)
|
|
|
1032 * UNW_DEC_SPILL_BASE(fmt,pspoff,arg)
|
|
|
1033 * UNW_DEC_SPILL_MASK(fmt,imaskp,arg)
|
|
|
1034 * UNW_DEC_SPILL_PSPREL(fmt,t,abreg,pspoff,arg)
|
|
|
1035 * UNW_DEC_SPILL_PSPREL_P(fmt,qp,t,abreg,pspoff,arg)
|
|
|
1036 * UNW_DEC_SPILL_REG(fmt,t,abreg,x,ytreg,arg)
|
|
|
1037 * UNW_DEC_SPILL_REG_P(fmt,qp,t,abreg,x,ytreg,arg)
|
|
|
1038 * UNW_DEC_SPILL_SPREL(fmt,t,abreg,spoff,arg)
|
|
|
1039 * UNW_DEC_SPILL_SPREL_P(fmt,qp,t,abreg,pspoff,arg)
|
|
|
1040 */
|
|
|
1041
|
|
|
1042 static unw_word
|
|
|
1043 unw_decode_uleb128 (unsigned char **dpp)
|
|
|
1044 {
|
|
|
1045 unsigned shift = 0;
|
|
|
1046 unw_word byte, result = 0;
|
|
|
1047 unsigned char *bp = *dpp;
|
|
|
1048
|
|
|
1049 while (1)
|
|
|
1050 {
|
|
|
1051 byte = *bp++;
|
|
|
1052 result |= (byte & 0x7f) << shift;
|
|
|
1053 if ((byte & 0x80) == 0)
|
|
|
1054 break;
|
|
|
1055 shift += 7;
|
|
|
1056 }
|
|
|
1057 *dpp = bp;
|
|
|
1058 return result;
|
|
|
1059 }
|
|
|
1060
|
|
|
1061 static unsigned char *
|
|
|
1062 unw_decode_x1 (unsigned char *dp,
|
|
|
1063 unsigned char code __attribute__((unused)),
|
|
|
1064 void *arg)
|
|
|
1065 {
|
|
|
1066 unsigned char byte1, abreg;
|
|
|
1067 unw_word t, off;
|
|
|
1068
|
|
|
1069 byte1 = *dp++;
|
|
|
1070 t = unw_decode_uleb128 (&dp);
|
|
|
1071 off = unw_decode_uleb128 (&dp);
|
|
|
1072 abreg = (byte1 & 0x7f);
|
|
|
1073 if (byte1 & 0x80)
|
|
|
1074 UNW_DEC_SPILL_SPREL(X1, t, abreg, off, arg);
|
|
|
1075 else
|
|
|
1076 UNW_DEC_SPILL_PSPREL(X1, t, abreg, off, arg);
|
|
|
1077 return dp;
|
|
|
1078 }
|
|
|
1079
|
|
|
1080 static unsigned char *
|
|
|
1081 unw_decode_x2 (unsigned char *dp,
|
|
|
1082 unsigned char code __attribute__((unused)),
|
|
|
1083 void *arg)
|
|
|
1084 {
|
|
|
1085 unsigned char byte1, byte2, abreg, x, ytreg;
|
|
|
1086 unw_word t;
|
|
|
1087
|
|
|
1088 byte1 = *dp++; byte2 = *dp++;
|
|
|
1089 t = unw_decode_uleb128 (&dp);
|
|
|
1090 abreg = (byte1 & 0x7f);
|
|
|
1091 ytreg = byte2;
|
|
|
1092 x = (byte1 >> 7) & 1;
|
|
|
1093 if ((byte1 & 0x80) == 0 && ytreg == 0)
|
|
|
1094 UNW_DEC_RESTORE(X2, t, abreg, arg);
|
|
|
1095 else
|
|
|
1096 UNW_DEC_SPILL_REG(X2, t, abreg, x, ytreg, arg);
|
|
|
1097 return dp;
|
|
|
1098 }
|
|
|
1099
|
|
|
1100 static unsigned char *
|
|
|
1101 unw_decode_x3 (unsigned char *dp,
|
|
|
1102 unsigned char code __attribute__((unused)),
|
|
|
1103 void *arg)
|
|
|
1104 {
|
|
|
1105 unsigned char byte1, byte2, abreg, qp;
|
|
|
1106 unw_word t, off;
|
|
|
1107
|
|
|
1108 byte1 = *dp++; byte2 = *dp++;
|
|
|
1109 t = unw_decode_uleb128 (&dp);
|
|
|
1110 off = unw_decode_uleb128 (&dp);
|
|
|
1111
|
|
|
1112 qp = (byte1 & 0x3f);
|
|
|
1113 abreg = (byte2 & 0x7f);
|
|
|
1114
|
|
|
1115 if (byte1 & 0x80)
|
|
|
1116 UNW_DEC_SPILL_SPREL_P(X3, qp, t, abreg, off, arg);
|
|
|
1117 else
|
|
|
1118 UNW_DEC_SPILL_PSPREL_P(X3, qp, t, abreg, off, arg);
|
|
|
1119 return dp;
|
|
|
1120 }
|
|
|
1121
|
|
|
1122 static unsigned char *
|
|
|
1123 unw_decode_x4 (unsigned char *dp,
|
|
|
1124 unsigned char code __attribute__((unused)),
|
|
|
1125 void *arg)
|
|
|
1126 {
|
|
|
1127 unsigned char byte1, byte2, byte3, qp, abreg, x, ytreg;
|
|
|
1128 unw_word t;
|
|
|
1129
|
|
|
1130 byte1 = *dp++; byte2 = *dp++; byte3 = *dp++;
|
|
|
1131 t = unw_decode_uleb128 (&dp);
|
|
|
1132
|
|
|
1133 qp = (byte1 & 0x3f);
|
|
|
1134 abreg = (byte2 & 0x7f);
|
|
|
1135 x = (byte2 >> 7) & 1;
|
|
|
1136 ytreg = byte3;
|
|
|
1137
|
|
|
1138 if ((byte2 & 0x80) == 0 && byte3 == 0)
|
|
|
1139 UNW_DEC_RESTORE_P(X4, qp, t, abreg, arg);
|
|
|
1140 else
|
|
|
1141 UNW_DEC_SPILL_REG_P(X4, qp, t, abreg, x, ytreg, arg);
|
|
|
1142 return dp;
|
|
|
1143 }
|
|
|
1144
|
|
|
1145 static unsigned char *
|
|
|
1146 unw_decode_r1 (unsigned char *dp, unsigned char code, void *arg)
|
|
|
1147 {
|
|
|
1148 int body = (code & 0x20) != 0;
|
|
|
1149 unw_word rlen;
|
|
|
1150
|
|
|
1151 rlen = (code & 0x1f);
|
|
|
1152 UNW_DEC_PROLOGUE(R1, body, rlen, arg);
|
|
|
1153 return dp;
|
|
|
1154 }
|
|
|
1155
|
|
|
1156 static unsigned char *
|
|
|
1157 unw_decode_r2 (unsigned char *dp, unsigned char code, void *arg)
|
|
|
1158 {
|
|
|
1159 unsigned char byte1, mask, grsave;
|
|
|
1160 unw_word rlen;
|
|
|
1161
|
|
|
1162 byte1 = *dp++;
|
|
|
1163
|
|
|
1164 mask = ((code & 0x7) << 1) | ((byte1 >> 7) & 1);
|
|
|
1165 grsave = (byte1 & 0x7f);
|
|
|
1166 rlen = unw_decode_uleb128 (&dp);
|
|
|
1167 UNW_DEC_PROLOGUE_GR(R2, rlen, mask, grsave, arg);
|
|
|
1168 return dp;
|
|
|
1169 }
|
|
|
1170
|
|
|
1171 static unsigned char *
|
|
|
1172 unw_decode_r3 (unsigned char *dp, unsigned char code, void *arg)
|
|
|
1173 {
|
|
|
1174 unw_word rlen;
|
|
|
1175
|
|
|
1176 rlen = unw_decode_uleb128 (&dp);
|
|
|
1177 UNW_DEC_PROLOGUE(R3, ((code & 0x3) == 1), rlen, arg);
|
|
|
1178 return dp;
|
|
|
1179 }
|
|
|
1180
|
|
|
1181 static unsigned char *
|
|
|
1182 unw_decode_p1 (unsigned char *dp, unsigned char code, void *arg)
|
|
|
1183 {
|
|
|
1184 unsigned char brmask = (code & 0x1f);
|
|
|
1185
|
|
|
1186 UNW_DEC_BR_MEM(P1, brmask, arg);
|
|
|
1187 return dp;
|
|
|
1188 }
|
|
|
1189
|
|
|
1190 static unsigned char *
|
|
|
1191 unw_decode_p2_p5 (unsigned char *dp, unsigned char code, void *arg)
|
|
|
1192 {
|
|
|
1193 if ((code & 0x10) == 0)
|
|
|
1194 {
|
|
|
1195 unsigned char byte1 = *dp++;
|
|
|
1196
|
|
|
1197 UNW_DEC_BR_GR(P2, ((code & 0xf) << 1) | ((byte1 >> 7) & 1),
|
|
|
1198 (byte1 & 0x7f), arg);
|
|
|
1199 }
|
|
|
1200 else if ((code & 0x08) == 0)
|
|
|
1201 {
|
|
|
1202 unsigned char byte1 = *dp++, r, dst;
|
|
|
1203
|
|
|
1204 r = ((code & 0x7) << 1) | ((byte1 >> 7) & 1);
|
|
|
1205 dst = (byte1 & 0x7f);
|
|
|
1206 switch (r)
|
|
|
1207 {
|
|
|
1208 case 0: UNW_DEC_REG_GR(P3, UNW_REG_PSP, dst, arg); break;
|
|
|
1209 case 1: UNW_DEC_REG_GR(P3, UNW_REG_RP, dst, arg); break;
|
|
|
1210 case 2: UNW_DEC_REG_GR(P3, UNW_REG_PFS, dst, arg); break;
|
|
|
1211 case 3: UNW_DEC_REG_GR(P3, UNW_REG_PR, dst, arg); break;
|
|
|
1212 case 4: UNW_DEC_REG_GR(P3, UNW_REG_UNAT, dst, arg); break;
|
|
|
1213 case 5: UNW_DEC_REG_GR(P3, UNW_REG_LC, dst, arg); break;
|
|
|
1214 case 6: UNW_DEC_RP_BR(P3, dst, arg); break;
|
|
|
1215 case 7: UNW_DEC_REG_GR(P3, UNW_REG_RNAT, dst, arg); break;
|
|
|
1216 case 8: UNW_DEC_REG_GR(P3, UNW_REG_BSP, dst, arg); break;
|
|
|
1217 case 9: UNW_DEC_REG_GR(P3, UNW_REG_BSPSTORE, dst, arg); break;
|
|
|
1218 case 10: UNW_DEC_REG_GR(P3, UNW_REG_FPSR, dst, arg); break;
|
|
|
1219 case 11: UNW_DEC_PRIUNAT_GR(P3, dst, arg); break;
|
|
|
1220 default: UNW_DEC_BAD_CODE(r); break;
|
|
|
1221 }
|
|
|
1222 }
|
|
|
1223 else if ((code & 0x7) == 0)
|
|
|
1224 UNW_DEC_SPILL_MASK(P4, dp, arg);
|
|
|
1225 else if ((code & 0x7) == 1)
|
|
|
1226 {
|
|
|
1227 unw_word grmask, frmask, byte1, byte2, byte3;
|
|
|
1228
|
|
|
1229 byte1 = *dp++; byte2 = *dp++; byte3 = *dp++;
|
|
|
1230 grmask = ((byte1 >> 4) & 0xf);
|
|
|
1231 frmask = ((byte1 & 0xf) << 16) | (byte2 << 8) | byte3;
|
|
|
1232 UNW_DEC_FRGR_MEM(P5, grmask, frmask, arg);
|
|
|
1233 }
|
|
|
1234 else
|
|
|
1235 UNW_DEC_BAD_CODE(code);
|
|
|
1236 return dp;
|
|
|
1237 }
|
|
|
1238
|
|
|
1239 static unsigned char *
|
|
|
1240 unw_decode_p6 (unsigned char *dp, unsigned char code, void *arg)
|
|
|
1241 {
|
|
|
1242 int gregs = (code & 0x10) != 0;
|
|
|
1243 unsigned char mask = (code & 0x0f);
|
|
|
1244
|
|
|
1245 if (gregs)
|
|
|
1246 UNW_DEC_GR_MEM(P6, mask, arg);
|
|
|
1247 else
|
|
|
1248 UNW_DEC_FR_MEM(P6, mask, arg);
|
|
|
1249 return dp;
|
|
|
1250 }
|
|
|
1251
|
|
|
1252 static unsigned char *
|
|
|
1253 unw_decode_p7_p10 (unsigned char *dp, unsigned char code, void *arg)
|
|
|
1254 {
|
|
|
1255 unsigned char r, byte1, byte2;
|
|
|
1256 unw_word t, size;
|
|
|
1257
|
|
|
1258 if ((code & 0x10) == 0)
|
|
|
1259 {
|
|
|
1260 r = (code & 0xf);
|
|
|
1261 t = unw_decode_uleb128 (&dp);
|
|
|
1262 switch (r)
|
|
|
1263 {
|
|
|
1264 case 0:
|
|
|
1265 size = unw_decode_uleb128 (&dp);
|
|
|
1266 UNW_DEC_MEM_STACK_F(P7, t, size, arg);
|
|
|
1267 break;
|
|
|
1268
|
|
|
1269 case 1: UNW_DEC_MEM_STACK_V(P7, t, arg); break;
|
|
|
1270 case 2: UNW_DEC_SPILL_BASE(P7, t, arg); break;
|
|
|
1271 case 3: UNW_DEC_REG_SPREL(P7, UNW_REG_PSP, t, arg); break;
|
|
|
1272 case 4: UNW_DEC_REG_WHEN(P7, UNW_REG_RP, t, arg); break;
|
|
|
1273 case 5: UNW_DEC_REG_PSPREL(P7, UNW_REG_RP, t, arg); break;
|
|
|
1274 case 6: UNW_DEC_REG_WHEN(P7, UNW_REG_PFS, t, arg); break;
|
|
|
1275 case 7: UNW_DEC_REG_PSPREL(P7, UNW_REG_PFS, t, arg); break;
|
|
|
1276 case 8: UNW_DEC_REG_WHEN(P7, UNW_REG_PR, t, arg); break;
|
|
|
1277 case 9: UNW_DEC_REG_PSPREL(P7, UNW_REG_PR, t, arg); break;
|
|
|
1278 case 10: UNW_DEC_REG_WHEN(P7, UNW_REG_LC, t, arg); break;
|
|
|
1279 case 11: UNW_DEC_REG_PSPREL(P7, UNW_REG_LC, t, arg); break;
|
|
|
1280 case 12: UNW_DEC_REG_WHEN(P7, UNW_REG_UNAT, t, arg); break;
|
|
|
1281 case 13: UNW_DEC_REG_PSPREL(P7, UNW_REG_UNAT, t, arg); break;
|
|
|
1282 case 14: UNW_DEC_REG_WHEN(P7, UNW_REG_FPSR, t, arg); break;
|
|
|
1283 case 15: UNW_DEC_REG_PSPREL(P7, UNW_REG_FPSR, t, arg); break;
|
|
|
1284 default: UNW_DEC_BAD_CODE(r); break;
|
|
|
1285 }
|
|
|
1286 }
|
|
|
1287 else
|
|
|
1288 {
|
|
|
1289 switch (code & 0xf)
|
|
|
1290 {
|
|
|
1291 case 0x0: /* p8 */
|
|
|
1292 {
|
|
|
1293 r = *dp++;
|
|
|
1294 t = unw_decode_uleb128 (&dp);
|
|
|
1295 switch (r)
|
|
|
1296 {
|
|
|
1297 case 1: UNW_DEC_REG_SPREL(P8, UNW_REG_RP, t, arg); break;
|
|
|
1298 case 2: UNW_DEC_REG_SPREL(P8, UNW_REG_PFS, t, arg); break;
|
|
|
1299 case 3: UNW_DEC_REG_SPREL(P8, UNW_REG_PR, t, arg); break;
|
|
|
1300 case 4: UNW_DEC_REG_SPREL(P8, UNW_REG_LC, t, arg); break;
|
|
|
1301 case 5: UNW_DEC_REG_SPREL(P8, UNW_REG_UNAT, t, arg); break;
|
|
|
1302 case 6: UNW_DEC_REG_SPREL(P8, UNW_REG_FPSR, t, arg); break;
|
|
|
1303 case 7: UNW_DEC_REG_WHEN(P8, UNW_REG_BSP, t, arg); break;
|
|
|
1304 case 8: UNW_DEC_REG_PSPREL(P8, UNW_REG_BSP, t, arg); break;
|
|
|
1305 case 9: UNW_DEC_REG_SPREL(P8, UNW_REG_BSP, t, arg); break;
|
|
|
1306 case 10: UNW_DEC_REG_WHEN(P8, UNW_REG_BSPSTORE, t, arg); break;
|
|
|
1307 case 11: UNW_DEC_REG_PSPREL(P8, UNW_REG_BSPSTORE, t, arg); break;
|
|
|
1308 case 12: UNW_DEC_REG_SPREL(P8, UNW_REG_BSPSTORE, t, arg); break;
|
|
|
1309 case 13: UNW_DEC_REG_WHEN(P8, UNW_REG_RNAT, t, arg); break;
|
|
|
1310 case 14: UNW_DEC_REG_PSPREL(P8, UNW_REG_RNAT, t, arg); break;
|
|
|
1311 case 15: UNW_DEC_REG_SPREL(P8, UNW_REG_RNAT, t, arg); break;
|
|
|
1312 case 16: UNW_DEC_PRIUNAT_WHEN_GR(P8, t, arg); break;
|
|
|
1313 case 17: UNW_DEC_PRIUNAT_PSPREL(P8, t, arg); break;
|
|
|
1314 case 18: UNW_DEC_PRIUNAT_SPREL(P8, t, arg); break;
|
|
|
1315 case 19: UNW_DEC_PRIUNAT_WHEN_MEM(P8, t, arg); break;
|
|
|
1316 default: UNW_DEC_BAD_CODE(r); break;
|
|
|
1317 }
|
|
|
1318 }
|
|
|
1319 break;
|
|
|
1320
|
|
|
1321 case 0x1:
|
|
|
1322 byte1 = *dp++; byte2 = *dp++;
|
|
|
1323 UNW_DEC_GR_GR(P9, (byte1 & 0xf), (byte2 & 0x7f), arg);
|
|
|
1324 break;
|
|
|
1325
|
|
|
1326 case 0xf: /* p10 */
|
|
|
1327 byte1 = *dp++; byte2 = *dp++;
|
|
|
1328 UNW_DEC_ABI(P10, byte1, byte2, arg);
|
|
|
1329 break;
|
|
|
1330
|
|
|
1331 case 0x9:
|
|
|
1332 return unw_decode_x1 (dp, code, arg);
|
|
|
1333
|
|
|
1334 case 0xa:
|
|
|
1335 return unw_decode_x2 (dp, code, arg);
|
|
|
1336
|
|
|
1337 case 0xb:
|
|
|
1338 return unw_decode_x3 (dp, code, arg);
|
|
|
1339
|
|
|
1340 case 0xc:
|
|
|
1341 return unw_decode_x4 (dp, code, arg);
|
|
|
1342
|
|
|
1343 default:
|
|
|
1344 UNW_DEC_BAD_CODE(code);
|
|
|
1345 break;
|
|
|
1346 }
|
|
|
1347 }
|
|
|
1348 return dp;
|
|
|
1349 }
|
|
|
1350
|
|
|
1351 static unsigned char *
|
|
|
1352 unw_decode_b1 (unsigned char *dp, unsigned char code, void *arg)
|
|
|
1353 {
|
|
|
1354 unw_word label = (code & 0x1f);
|
|
|
1355
|
|
|
1356 if ((code & 0x20) != 0)
|
|
|
1357 UNW_DEC_COPY_STATE(B1, label, arg);
|
|
|
1358 else
|
|
|
1359 UNW_DEC_LABEL_STATE(B1, label, arg);
|
|
|
1360 return dp;
|
|
|
1361 }
|
|
|
1362
|
|
|
1363 static unsigned char *
|
|
|
1364 unw_decode_b2 (unsigned char *dp, unsigned char code, void *arg)
|
|
|
1365 {
|
|
|
1366 unw_word t;
|
|
|
1367
|
|
|
1368 t = unw_decode_uleb128 (&dp);
|
|
|
1369 UNW_DEC_EPILOGUE(B2, t, (code & 0x1f), arg);
|
|
|
1370 return dp;
|
|
|
1371 }
|
|
|
1372
|
|
|
1373 static unsigned char *
|
|
|
1374 unw_decode_b3_x4 (unsigned char *dp, unsigned char code, void *arg)
|
|
|
1375 {
|
|
|
1376 unw_word t, ecount, label;
|
|
|
1377
|
|
|
1378 if ((code & 0x10) == 0)
|
|
|
1379 {
|
|
|
1380 t = unw_decode_uleb128 (&dp);
|
|
|
1381 ecount = unw_decode_uleb128 (&dp);
|
|
|
1382 UNW_DEC_EPILOGUE(B3, t, ecount, arg);
|
|
|
1383 }
|
|
|
1384 else if ((code & 0x07) == 0)
|
|
|
1385 {
|
|
|
1386 label = unw_decode_uleb128 (&dp);
|
|
|
1387 if ((code & 0x08) != 0)
|
|
|
1388 UNW_DEC_COPY_STATE(B4, label, arg);
|
|
|
1389 else
|
|
|
1390 UNW_DEC_LABEL_STATE(B4, label, arg);
|
|
|
1391 }
|
|
|
1392 else
|
|
|
1393 switch (code & 0x7)
|
|
|
1394 {
|
|
|
1395 case 1: return unw_decode_x1 (dp, code, arg);
|
|
|
1396 case 2: return unw_decode_x2 (dp, code, arg);
|
|
|
1397 case 3: return unw_decode_x3 (dp, code, arg);
|
|
|
1398 case 4: return unw_decode_x4 (dp, code, arg);
|
|
|
1399 default: UNW_DEC_BAD_CODE(code); break;
|
|
|
1400 }
|
|
|
1401 return dp;
|
|
|
1402 }
|
|
|
1403
|
|
|
1404 typedef unsigned char *(*unw_decoder) (unsigned char *, unsigned char, void *);
|
|
|
1405
|
|
|
1406 static const unw_decoder unw_decode_table[2][8] =
|
|
|
1407 {
|
|
|
1408 /* prologue table: */
|
|
|
1409 {
|
|
|
1410 unw_decode_r1, /* 0 */
|
|
|
1411 unw_decode_r1,
|
|
|
1412 unw_decode_r2,
|
|
|
1413 unw_decode_r3,
|
|
|
1414 unw_decode_p1, /* 4 */
|
|
|
1415 unw_decode_p2_p5,
|
|
|
1416 unw_decode_p6,
|
|
|
1417 unw_decode_p7_p10
|
|
|
1418 },
|
|
|
1419 {
|
|
|
1420 unw_decode_r1, /* 0 */
|
|
|
1421 unw_decode_r1,
|
|
|
1422 unw_decode_r2,
|
|
|
1423 unw_decode_r3,
|
|
|
1424 unw_decode_b1, /* 4 */
|
|
|
1425 unw_decode_b1,
|
|
|
1426 unw_decode_b2,
|
|
|
1427 unw_decode_b3_x4
|
|
|
1428 }
|
|
|
1429 };
|
|
|
1430
|
|
|
1431 /*
|
|
|
1432 * Decode one descriptor and return address of next descriptor.
|
|
|
1433 */
|
|
|
1434 static inline unsigned char *
|
|
|
1435 unw_decode (unsigned char *dp, int inside_body, void *arg)
|
|
|
1436 {
|
|
|
1437 unw_decoder decoder;
|
|
|
1438 unsigned char code;
|
|
|
1439
|
|
|
1440 code = *dp++;
|
|
|
1441 decoder = unw_decode_table[inside_body][code >> 5];
|
|
|
1442 dp = (*decoder) (dp, code, arg);
|
|
|
1443 return dp;
|
|
|
1444 }
|
|
|
1445
|
|
|
1446
|
|
|
1447 /* RSE helper functions. */
|
|
|
1448
|
|
|
1449 static inline unsigned long
|
|
|
1450 ia64_rse_slot_num (unsigned long *addr)
|
|
|
1451 {
|
|
|
1452 return (((unsigned long) addr) >> 3) & 0x3f;
|
|
|
1453 }
|
|
|
1454
|
|
|
1455 /* Return TRUE if ADDR is the address of an RNAT slot. */
|
|
|
1456 static inline unsigned long
|
|
|
1457 ia64_rse_is_rnat_slot (unsigned long *addr)
|
|
|
1458 {
|
|
|
1459 return ia64_rse_slot_num (addr) == 0x3f;
|
|
|
1460 }
|
|
|
1461
|
|
|
1462 /* Returns the address of the RNAT slot that covers the slot at
|
|
|
1463 address SLOT_ADDR. */
|
|
|
1464 static inline unsigned long *
|
|
|
1465 ia64_rse_rnat_addr (unsigned long *slot_addr)
|
|
|
1466 {
|
|
|
1467 return (unsigned long *) ((unsigned long) slot_addr | (0x3f << 3));
|
|
|
1468 }
|
|
|
1469
|
|
|
1470 /* Calculate the number of registers in the dirty partition starting at
|
|
|
1471 BSPSTORE with a size of DIRTY bytes. This isn't simply DIRTY
|
|
|
1472 divided by eight because the 64th slot is used to store ar.rnat. */
|
|
|
1473 static inline unsigned long
|
|
|
1474 ia64_rse_num_regs (unsigned long *bspstore, unsigned long *bsp)
|
|
|
1475 {
|
|
|
1476 unsigned long slots = (bsp - bspstore);
|
|
|
1477
|
|
|
1478 return slots - (ia64_rse_slot_num (bspstore) + slots)/0x40;
|
|
|
1479 }
|
|
|
1480
|
|
|
1481 /* The inverse of the above: given bspstore and the number of
|
|
|
1482 registers, calculate ar.bsp. */
|
|
|
1483 static inline unsigned long *
|
|
|
1484 ia64_rse_skip_regs (unsigned long *addr, long num_regs)
|
|
|
1485 {
|
|
|
1486 long delta = ia64_rse_slot_num (addr) + num_regs;
|
|
|
1487
|
|
|
1488 if (num_regs < 0)
|
|
|
1489 delta -= 0x3e;
|
|
|
1490 return addr + num_regs + delta/0x3f;
|
|
|
1491 }
|
|
|
1492
|
|
|
1493
|
|
|
1494 /* Copy register backing store from SRC to DST, LEN words
|
|
|
1495 (which include both saved registers and nat collections).
|
|
|
1496 DST_RNAT is a partial nat collection for DST. SRC and DST
|
|
|
1497 don't have to be equal modulo 64 slots, so it cannot be
|
|
|
1498 done with a simple memcpy as the nat collections will be
|
|
|
1499 at different relative offsets and need to be combined together. */
|
|
|
1500 static void
|
|
|
1501 ia64_copy_rbs (struct _Unwind_Context *info, unsigned long dst,
|
|
|
1502 unsigned long src, long len, unsigned long dst_rnat)
|
|
|
1503 {
|
|
|
1504 long count;
|
|
|
1505 unsigned long src_rnat;
|
|
|
1506 unsigned long shift1, shift2;
|
|
|
1507
|
|
|
1508 len <<= 3;
|
|
|
1509 dst_rnat &= (1UL << ((dst >> 3) & 0x3f)) - 1;
|
|
|
1510 src_rnat = src >= info->regstk_top
|
|
|
1511 ? info->rnat : *(unsigned long *) (src | 0x1f8);
|
|
|
1512 src_rnat &= ~((1UL << ((src >> 3) & 0x3f)) - 1);
|
|
|
1513 /* Just to make sure. */
|
|
|
1514 src_rnat &= ~(1UL << 63);
|
|
|
1515 shift1 = ((dst - src) >> 3) & 0x3f;
|
|
|
1516 if ((dst & 0x1f8) < (src & 0x1f8))
|
|
|
1517 shift1--;
|
|
|
1518 shift2 = 0x3f - shift1;
|
|
|
1519 if ((dst & 0x1f8) >= (src & 0x1f8))
|
|
|
1520 {
|
|
|
1521 count = ~dst & 0x1f8;
|
|
|
1522 goto first;
|
|
|
1523 }
|
|
|
1524 count = ~src & 0x1f8;
|
|
|
1525 goto second;
|
|
|
1526 while (len > 0)
|
|
|
1527 {
|
|
|
1528 src_rnat = src >= info->regstk_top
|
|
|
1529 ? info->rnat : *(unsigned long *) (src | 0x1f8);
|
|
|
1530 /* Just to make sure. */
|
|
|
1531 src_rnat &= ~(1UL << 63);
|
|
|
1532 count = shift2 << 3;
|
|
|
1533 first:
|
|
|
1534 if (count > len)
|
|
|
1535 count = len;
|
|
|
1536 memcpy ((char *) dst, (char *) src, count);
|
|
|
1537 dst += count;
|
|
|
1538 src += count;
|
|
|
1539 len -= count;
|
|
|
1540 dst_rnat |= (src_rnat << shift1) & ~(1UL << 63);
|
|
|
1541 if (len <= 0)
|
|
|
1542 break;
|
|
|
1543 *(long *) dst = dst_rnat;
|
|
|
1544 dst += 8;
|
|
|
1545 dst_rnat = 0;
|
|
|
1546 count = shift1 << 3;
|
|
|
1547 second:
|
|
|
1548 if (count > len)
|
|
|
1549 count = len;
|
|
|
1550 memcpy ((char *) dst, (char *) src, count);
|
|
|
1551 dst += count;
|
|
|
1552 src += count + 8;
|
|
|
1553 len -= count + 8;
|
|
|
1554 dst_rnat |= (src_rnat >> shift2);
|
|
|
1555 }
|
|
|
1556 if ((dst & 0x1f8) == 0x1f8)
|
|
|
1557 {
|
|
|
1558 *(long *) dst = dst_rnat;
|
|
|
1559 dst += 8;
|
|
|
1560 dst_rnat = 0;
|
|
|
1561 }
|
|
|
1562 /* Set info->regstk_top to lowest rbs address which will use
|
|
|
1563 info->rnat collection. */
|
|
|
1564 info->regstk_top = dst & ~0x1ffUL;
|
|
|
1565 info->rnat = dst_rnat;
|
|
|
1566 }
|
|
|
1567
|
|
|
1568 /* Unwind accessors. */
|
|
|
1569
|
|
|
1570 static void
|
|
|
1571 unw_access_gr (struct _Unwind_Context *info, int regnum,
|
|
|
1572 unsigned long *val, char *nat, int write)
|
|
|
1573 {
|
|
|
1574 unsigned long *addr, *nat_addr = 0, nat_mask = 0, dummy_nat;
|
|
|
1575 struct unw_ireg *ireg;
|
|
|
1576
|
|
|
1577 if ((unsigned) regnum - 1 >= 127)
|
|
|
1578 abort ();
|
|
|
1579
|
|
|
1580 if (regnum < 1)
|
|
|
1581 {
|
|
|
1582 nat_addr = addr = &dummy_nat;
|
|
|
1583 dummy_nat = 0;
|
|
|
1584 }
|
|
|
1585 else if (regnum < 32)
|
|
|
1586 {
|
|
|
1587 /* Access a non-stacked register. */
|
|
|
1588 ireg = &info->ireg[regnum - 2];
|
|
|
1589 addr = ireg->loc;
|
|
|
1590 if (addr)
|
|
|
1591 {
|
|
|
1592 nat_addr = addr + ireg->nat.off;
|
|
|
1593 switch (ireg->nat.type)
|
|
|
1594 {
|
|
|
1595 case UNW_NAT_VAL:
|
|
|
1596 /* Simulate getf.sig/setf.sig. */
|
|
|
1597 if (write)
|
|
|
1598 {
|
|
|
1599 if (*nat)
|
|
|
1600 {
|
|
|
1601 /* Write NaTVal and be done with it. */
|
|
|
1602 addr[0] = 0;
|
|
|
1603 addr[1] = 0x1fffe;
|
|
|
1604 return;
|
|
|
1605 }
|
|
|
1606 addr[1] = 0x1003e;
|
|
|
1607 }
|
|
|
1608 else if (addr[0] == 0 && addr[1] == 0x1ffe)
|
|
|
1609 {
|
|
|
1610 /* Return NaT and be done with it. */
|
|
|
1611 *val = 0;
|
|
|
1612 *nat = 1;
|
|
|
1613 return;
|
|
|
1614 }
|
|
|
1615 /* FALLTHRU */
|
|
|
1616
|
|
|
1617 case UNW_NAT_NONE:
|
|
|
1618 dummy_nat = 0;
|
|
|
1619 nat_addr = &dummy_nat;
|
|
|
1620 break;
|
|
|
1621
|
|
|
1622 case UNW_NAT_MEMSTK:
|
|
|
1623 nat_mask = 1UL << ((long) addr & 0x1f8)/8;
|
|
|
1624 break;
|
|
|
1625
|
|
|
1626 case UNW_NAT_REGSTK:
|
|
|
1627 if ((unsigned long) addr >= info->regstk_top)
|
|
|
1628 nat_addr = &info->rnat;
|
|
|
1629 else
|
|
|
1630 nat_addr = ia64_rse_rnat_addr (addr);
|
|
|
1631 nat_mask = 1UL << ia64_rse_slot_num (addr);
|
|
|
1632 break;
|
|
|
1633 }
|
|
|
1634 }
|
|
|
1635 }
|
|
|
1636 else
|
|
|
1637 {
|
|
|
1638 /* Access a stacked register. */
|
|
|
1639 addr = ia64_rse_skip_regs ((unsigned long *) info->bsp, regnum - 32);
|
|
|
1640 if ((unsigned long) addr >= info->regstk_top)
|
|
|
1641 nat_addr = &info->rnat;
|
|
|
1642 else
|
|
|
1643 nat_addr = ia64_rse_rnat_addr (addr);
|
|
|
1644 nat_mask = 1UL << ia64_rse_slot_num (addr);
|
|
|
1645 }
|
|
|
1646
|
|
|
1647 if (write)
|
|
|
1648 {
|
|
|
1649 *addr = *val;
|
|
|
1650 if (*nat)
|
|
|
1651 *nat_addr |= nat_mask;
|
|
|
1652 else
|
|
|
1653 *nat_addr &= ~nat_mask;
|
|
|
1654 }
|
|
|
1655 else
|
|
|
1656 {
|
|
|
1657 *val = *addr;
|
|
|
1658 *nat = (*nat_addr & nat_mask) != 0;
|
|
|
1659 }
|
|
|
1660 }
|
|
|
1661
|
|
|
1662 /* Get the value of register REG as saved in CONTEXT. */
|
|
|
1663
|
|
|
1664 _Unwind_Word
|
|
|
1665 _Unwind_GetGR (struct _Unwind_Context *context, int index)
|
|
|
1666 {
|
|
|
1667 _Unwind_Word ret;
|
|
|
1668 char nat;
|
|
|
1669
|
|
|
1670 if (index == 1)
|
|
|
1671 return context->gp;
|
|
|
1672 else if (index >= 15 && index <= 18)
|
|
|
1673 return context->eh_data[index - 15];
|
|
|
1674 else
|
|
|
1675 unw_access_gr (context, index, &ret, &nat, 0);
|
|
|
1676
|
|
|
1677 return ret;
|
|
|
1678 }
|
|
|
1679
|
|
|
1680 /* Overwrite the saved value for register REG in CONTEXT with VAL. */
|
|
|
1681
|
|
|
1682 void
|
|
|
1683 _Unwind_SetGR (struct _Unwind_Context *context, int index, _Unwind_Word val)
|
|
|
1684 {
|
|
|
1685 char nat = 0;
|
|
|
1686
|
|
|
1687 if (index == 1)
|
|
|
1688 context->gp = val;
|
|
|
1689 else if (index >= 15 && index <= 18)
|
|
|
1690 context->eh_data[index - 15] = val;
|
|
|
1691 else
|
|
|
1692 unw_access_gr (context, index, &val, &nat, 1);
|
|
|
1693 }
|
|
|
1694
|
|
|
1695 /* Retrieve the return address for CONTEXT. */
|
|
|
1696
|
|
|
1697 inline _Unwind_Ptr
|
|
|
1698 _Unwind_GetIP (struct _Unwind_Context *context)
|
|
|
1699 {
|
|
|
1700 return context->rp;
|
|
|
1701 }
|
|
|
1702
|
|
|
1703 inline _Unwind_Ptr
|
|
|
1704 _Unwind_GetIPInfo (struct _Unwind_Context *context, int *ip_before_insn)
|
|
|
1705 {
|
|
|
1706 *ip_before_insn = 0;
|
|
|
1707 return context->rp;
|
|
|
1708 }
|
|
|
1709
|
|
|
1710 /* Overwrite the return address for CONTEXT with VAL. */
|
|
|
1711
|
|
|
1712 inline void
|
|
|
1713 _Unwind_SetIP (struct _Unwind_Context *context, _Unwind_Ptr val)
|
|
|
1714 {
|
|
|
1715 context->rp = val;
|
|
|
1716 }
|
|
|
1717
|
|
|
1718 void *
|
|
|
1719 _Unwind_GetLanguageSpecificData (struct _Unwind_Context *context)
|
|
|
1720 {
|
|
|
1721 return context->lsda;
|
|
|
1722 }
|
|
|
1723
|
|
|
1724 _Unwind_Ptr
|
|
|
1725 _Unwind_GetRegionStart (struct _Unwind_Context *context)
|
|
|
1726 {
|
|
|
1727 return context->region_start;
|
|
|
1728 }
|
|
|
1729
|
|
|
1730 void *
|
|
|
1731 _Unwind_FindEnclosingFunction (void *pc)
|
|
|
1732 {
|
|
|
1733 struct unw_table_entry *ent;
|
|
|
1734 unsigned long segment_base, gp;
|
|
|
1735
|
|
|
1736 ent = _Unwind_FindTableEntry (pc, &segment_base, &gp);
|
|
|
1737 if (ent == NULL)
|
|
|
1738 return NULL;
|
|
|
1739 else
|
|
|
1740 return (void *)(segment_base + ent->start_offset);
|
|
|
1741 }
|
|
|
1742
|
|
|
1743 /* Get the value of the CFA as saved in CONTEXT. In GCC/Dwarf2 parlance,
|
|
|
1744 the CFA is the value of the stack pointer on entry; In IA-64 unwind
|
|
|
1745 parlance, this is the PSP. */
|
|
|
1746
|
|
|
1747 _Unwind_Word
|
|
|
1748 _Unwind_GetCFA (struct _Unwind_Context *context)
|
|
|
1749 {
|
|
|
1750 return (_Unwind_Ptr) context->psp;
|
|
|
1751 }
|
|
|
1752
|
|
|
1753 /* Get the value of the Backing Store Pointer as saved in CONTEXT. */
|
|
|
1754
|
|
|
1755 _Unwind_Word
|
|
|
1756 _Unwind_GetBSP (struct _Unwind_Context *context)
|
|
|
1757 {
|
|
|
1758 return (_Unwind_Ptr) context->bsp;
|
|
|
1759 }
|
|
|
1760
|
|
|
1761 #ifdef MD_UNWIND_SUPPORT
|
|
|
1762 #include MD_UNWIND_SUPPORT
|
|
|
1763 #endif
|
|
|
1764
|
|
|
1765 static _Unwind_Reason_Code
|
|
|
1766 uw_frame_state_for (struct _Unwind_Context *context, _Unwind_FrameState *fs)
|
|
|
1767 {
|
|
|
1768 struct unw_table_entry *ent;
|
|
|
1769 unsigned long *unw, header, length;
|
|
|
1770 unsigned char *insn, *insn_end;
|
|
|
1771 unsigned long segment_base;
|
|
|
1772 struct unw_reg_info *r;
|
|
|
1773
|
|
|
1774 memset (fs, 0, sizeof (*fs));
|
|
|
1775 for (r = fs->curr.reg; r < fs->curr.reg + UNW_NUM_REGS; ++r)
|
|
|
1776 r->when = UNW_WHEN_NEVER;
|
|
|
1777 context->lsda = 0;
|
|
|
1778
|
|
|
1779 ent = _Unwind_FindTableEntry ((void *) context->rp,
|
|
|
1780 &segment_base, &context->gp);
|
|
|
1781 if (ent == NULL)
|
|
|
1782 {
|
|
|
1783 /* Couldn't find unwind info for this function. Try an
|
|
|
1784 os-specific fallback mechanism. This will necessarily
|
|
|
1785 not provide a personality routine or LSDA. */
|
|
|
1786 #ifdef MD_FALLBACK_FRAME_STATE_FOR
|
|
|
1787 if (MD_FALLBACK_FRAME_STATE_FOR (context, fs) == _URC_NO_REASON)
|
|
|
1788 return _URC_NO_REASON;
|
|
|
1789
|
|
|
1790 /* [SCRA 11.4.1] A leaf function with no memory stack, no exception
|
|
|
1791 handlers, and which keeps the return value in B0 does not need
|
|
|
1792 an unwind table entry.
|
|
|
1793
|
|
|
1794 This can only happen in the frame after unwinding through a signal
|
|
|
1795 handler. Avoid infinite looping by requiring that B0 != RP.
|
|
|
1796 RP == 0 terminates the chain. */
|
|
|
1797 if (context->br_loc[0] && *context->br_loc[0] != context->rp
|
|
|
1798 && context->rp != 0)
|
|
|
1799 {
|
|
|
1800 fs->curr.reg[UNW_REG_RP].where = UNW_WHERE_BR;
|
|
|
1801 fs->curr.reg[UNW_REG_RP].when = -1;
|
|
|
1802 fs->curr.reg[UNW_REG_RP].val = 0;
|
|
|
1803 return _URC_NO_REASON;
|
|
|
1804 }
|
|
|
1805 #endif
|
|
|
1806 return _URC_END_OF_STACK;
|
|
|
1807 }
|
|
|
1808
|
|
|
1809 context->region_start = ent->start_offset + segment_base;
|
|
|
1810 fs->when_target = ((context->rp & -16) - context->region_start) / 16 * 3
|
|
|
1811 + (context->rp & 15);
|
|
|
1812
|
|
|
1813 unw = (unsigned long *) (ent->info_offset + segment_base);
|
|
|
1814 header = *unw;
|
|
|
1815 length = UNW_LENGTH (header);
|
|
|
1816
|
|
|
1817 /* ??? Perhaps check UNW_VER / UNW_FLAG_OSMASK. */
|
|
|
1818
|
|
|
1819 if (UNW_FLAG_EHANDLER (header) | UNW_FLAG_UHANDLER (header))
|
|
|
1820 {
|
|
|
1821 fs->personality =
|
|
|
1822 *(_Unwind_Personality_Fn *) (unw[length + 1] + context->gp);
|
|
|
1823 context->lsda = unw + length + 2;
|
|
|
1824 }
|
|
|
1825
|
|
|
1826 insn = (unsigned char *) (unw + 1);
|
|
|
1827 insn_end = (unsigned char *) (unw + 1 + length);
|
|
|
1828 while (!fs->done && insn < insn_end)
|
|
|
1829 insn = unw_decode (insn, fs->in_body, fs);
|
|
|
1830
|
|
|
1831 free_label_states (fs->labeled_states);
|
|
|
1832 free_state_stack (&fs->curr);
|
|
|
1833
|
|
|
1834 #ifdef ENABLE_MALLOC_CHECKING
|
|
|
1835 if (reg_state_alloced || labeled_state_alloced)
|
|
|
1836 abort ();
|
|
|
1837 #endif
|
|
|
1838
|
|
|
1839 /* If we're in the epilogue, sp has been restored and all values
|
|
|
1840 on the memory stack below psp also have been restored. */
|
|
|
1841 if (fs->when_target > fs->epilogue_start)
|
|
|
1842 {
|
|
|
1843 struct unw_reg_info *r;
|
|
|
1844
|
|
|
1845 fs->curr.reg[UNW_REG_PSP].where = UNW_WHERE_NONE;
|
|
|
1846 fs->curr.reg[UNW_REG_PSP].val = 0;
|
|
|
1847 for (r = fs->curr.reg; r < fs->curr.reg + UNW_NUM_REGS; ++r)
|
|
|
1848 if ((r->where == UNW_WHERE_PSPREL && r->val <= 0x10)
|
|
|
1849 || r->where == UNW_WHERE_SPREL)
|
|
|
1850 r->where = UNW_WHERE_NONE;
|
|
|
1851 }
|
|
|
1852
|
|
|
1853 /* If RP did't get saved, generate entry for the return link register. */
|
|
|
1854 if (fs->curr.reg[UNW_REG_RP].when >= fs->when_target)
|
|
|
1855 {
|
|
|
1856 fs->curr.reg[UNW_REG_RP].where = UNW_WHERE_BR;
|
|
|
1857 fs->curr.reg[UNW_REG_RP].when = -1;
|
|
|
1858 fs->curr.reg[UNW_REG_RP].val = fs->return_link_reg;
|
|
|
1859 }
|
|
|
1860
|
|
|
1861 return _URC_NO_REASON;
|
|
|
1862 }
|
|
|
1863
|
|
|
1864 static void
|
|
|
1865 uw_update_reg_address (struct _Unwind_Context *context,
|
|
|
1866 _Unwind_FrameState *fs,
|
|
|
1867 enum unw_register_index regno)
|
|
|
1868 {
|
|
|
1869 struct unw_reg_info *r = fs->curr.reg + regno;
|
|
|
1870 void *addr;
|
|
|
1871 unsigned long rval;
|
|
|
1872
|
|
|
1873 if (r->where == UNW_WHERE_NONE || r->when >= fs->when_target)
|
|
|
1874 return;
|
|
|
1875
|
|
|
1876 rval = r->val;
|
|
|
1877 switch (r->where)
|
|
|
1878 {
|
|
|
1879 case UNW_WHERE_GR:
|
|
|
1880 if (rval >= 32)
|
|
|
1881 addr = ia64_rse_skip_regs ((unsigned long *) context->bsp, rval - 32);
|
|
|
1882 else if (rval >= 2)
|
|
|
1883 addr = context->ireg[rval - 2].loc;
|
|
|
1884 else if (rval == 0)
|
|
|
1885 {
|
|
|
1886 static const unsigned long dummy;
|
|
|
1887 addr = (void *) &dummy;
|
|
|
1888 }
|
|
|
1889 else
|
|
|
1890 abort ();
|
|
|
1891 break;
|
|
|
1892
|
|
|
1893 case UNW_WHERE_FR:
|
|
|
1894 if (rval >= 2 && rval < 32)
|
|
|
1895 addr = context->fr_loc[rval - 2];
|
|
|
1896 else
|
|
|
1897 abort ();
|
|
|
1898 break;
|
|
|
1899
|
|
|
1900 case UNW_WHERE_BR:
|
|
|
1901 /* Note that while RVAL can only be 1-5 from normal descriptors,
|
|
|
1902 we can want to look at B0, B6 and B7 due to having manually unwound a
|
|
|
1903 signal frame. */
|
|
|
1904 if (rval < 8)
|
|
|
1905 addr = context->br_loc[rval];
|
|
|
1906 else
|
|
|
1907 abort ();
|
|
|
1908 break;
|
|
|
1909
|
|
|
1910 case UNW_WHERE_SPREL:
|
|
|
1911 addr = (void *)(context->sp + rval);
|
|
|
1912 break;
|
|
|
1913
|
|
|
1914 case UNW_WHERE_PSPREL:
|
|
|
1915 addr = (void *)(context->psp + rval);
|
|
|
1916 break;
|
|
|
1917
|
|
|
1918 default:
|
|
|
1919 abort ();
|
|
|
1920 }
|
|
|
1921
|
|
|
1922 switch (regno)
|
|
|
1923 {
|
|
|
1924 case UNW_REG_R2 ... UNW_REG_R31:
|
|
|
1925 context->ireg[regno - UNW_REG_R2].loc = addr;
|
|
|
1926 switch (r->where)
|
|
|
1927 {
|
|
|
1928 case UNW_WHERE_GR:
|
|
|
1929 if (rval >= 32)
|
|
|
1930 {
|
|
|
1931 context->ireg[regno - UNW_REG_R2].nat.type = UNW_NAT_MEMSTK;
|
|
|
1932 context->ireg[regno - UNW_REG_R2].nat.off
|
|
|
1933 = context->pri_unat_loc - (unsigned long *) addr;
|
|
|
1934 }
|
|
|
1935 else if (rval >= 2)
|
|
|
1936 {
|
|
|
1937 context->ireg[regno - UNW_REG_R2].nat
|
|
|
1938 = context->ireg[rval - 2].nat;
|
|
|
1939 }
|
|
|
1940 else if (rval == 0)
|
|
|
1941 {
|
|
|
1942 context->ireg[regno - UNW_REG_R2].nat.type = UNW_NAT_NONE;
|
|
|
1943 context->ireg[regno - UNW_REG_R2].nat.off = 0;
|
|
|
1944 }
|
|
|
1945 else
|
|
|
1946 abort ();
|
|
|
1947 break;
|
|
|
1948
|
|
|
1949 case UNW_WHERE_FR:
|
|
|
1950 context->ireg[regno - UNW_REG_R2].nat.type = UNW_NAT_VAL;
|
|
|
1951 context->ireg[regno - UNW_REG_R2].nat.off = 0;
|
|
|
1952 break;
|
|
|
1953
|
|
|
1954 case UNW_WHERE_BR:
|
|
|
1955 context->ireg[regno - UNW_REG_R2].nat.type = UNW_NAT_NONE;
|
|
|
1956 context->ireg[regno - UNW_REG_R2].nat.off = 0;
|
|
|
1957 break;
|
|
|
1958
|
|
|
1959 case UNW_WHERE_PSPREL:
|
|
|
1960 case UNW_WHERE_SPREL:
|
|
|
1961 context->ireg[regno - UNW_REG_R2].nat.type = UNW_NAT_MEMSTK;
|
|
|
1962 context->ireg[regno - UNW_REG_R2].nat.off
|
|
|
1963 = context->pri_unat_loc - (unsigned long *) addr;
|
|
|
1964 break;
|
|
|
1965
|
|
|
1966 default:
|
|
|
1967 abort ();
|
|
|
1968 }
|
|
|
1969 break;
|
|
|
1970
|
|
|
1971 case UNW_REG_F2 ... UNW_REG_F31:
|
|
|
1972 context->fr_loc[regno - UNW_REG_F2] = addr;
|
|
|
1973 break;
|
|
|
1974
|
|
|
1975 case UNW_REG_B1 ... UNW_REG_B5:
|
|
|
1976 context->br_loc[regno - UNW_REG_B0] = addr;
|
|
|
1977 break;
|
|
|
1978
|
|
|
1979 case UNW_REG_BSP:
|
|
|
1980 context->bsp_loc = addr;
|
|
|
1981 break;
|
|
|
1982 case UNW_REG_BSPSTORE:
|
|
|
1983 context->bspstore_loc = addr;
|
|
|
1984 break;
|
|
|
1985 case UNW_REG_PFS:
|
|
|
1986 context->pfs_loc = addr;
|
|
|
1987 break;
|
|
|
1988 case UNW_REG_RP:
|
|
|
1989 context->rp = *(unsigned long *)addr;
|
|
|
1990 break;
|
|
|
1991 case UNW_REG_UNAT:
|
|
|
1992 context->unat_loc = addr;
|
|
|
1993 break;
|
|
|
1994 case UNW_REG_PR:
|
|
|
1995 context->pr = *(unsigned long *) addr;
|
|
|
1996 break;
|
|
|
1997 case UNW_REG_LC:
|
|
|
1998 context->lc_loc = addr;
|
|
|
1999 break;
|
|
|
2000 case UNW_REG_FPSR:
|
|
|
2001 context->fpsr_loc = addr;
|
|
|
2002 break;
|
|
|
2003
|
|
|
2004 case UNW_REG_PSP:
|
|
|
2005 context->psp = *(unsigned long *)addr;
|
|
|
2006 break;
|
|
|
2007
|
|
|
2008 default:
|
|
|
2009 abort ();
|
|
|
2010 }
|
|
|
2011 }
|
|
|
2012
|
|
|
2013 static void
|
|
|
2014 uw_update_context (struct _Unwind_Context *context, _Unwind_FrameState *fs)
|
|
|
2015 {
|
|
|
2016 long i;
|
|
|
2017
|
|
|
2018 #ifdef MD_HANDLE_UNWABI
|
|
|
2019 MD_HANDLE_UNWABI (context, fs);
|
|
|
2020 #endif
|
|
|
2021
|
|
|
2022 context->sp = context->psp;
|
|
|
2023
|
|
|
2024 /* First, set PSP. Subsequent instructions may depend on this value. */
|
|
|
2025 if (fs->when_target > fs->curr.reg[UNW_REG_PSP].when)
|
|
|
2026 {
|
|
|
2027 if (fs->curr.reg[UNW_REG_PSP].where == UNW_WHERE_NONE)
|
|
|
2028 context->psp = context->psp + fs->curr.reg[UNW_REG_PSP].val;
|
|
|
2029 else
|
|
|
2030 uw_update_reg_address (context, fs, UNW_REG_PSP);
|
|
|
2031 }
|
|
|
2032
|
|
|
2033 /* Determine the location of the primary UNaT. */
|
|
|
2034 {
|
|
|
2035 int i;
|
|
|
2036 if (fs->when_target < fs->curr.reg[UNW_REG_PRI_UNAT_GR].when)
|
|
|
2037 i = UNW_REG_PRI_UNAT_MEM;
|
|
|
2038 else if (fs->when_target < fs->curr.reg[UNW_REG_PRI_UNAT_MEM].when)
|
|
|
2039 i = UNW_REG_PRI_UNAT_GR;
|
|
|
2040 else if (fs->curr.reg[UNW_REG_PRI_UNAT_MEM].when
|
|
|
2041 > fs->curr.reg[UNW_REG_PRI_UNAT_GR].when)
|
|
|
2042 i = UNW_REG_PRI_UNAT_MEM;
|
|
|
2043 else
|
|
|
2044 i = UNW_REG_PRI_UNAT_GR;
|
|
|
2045 uw_update_reg_address (context, fs, i);
|
|
|
2046 }
|
|
|
2047
|
|
|
2048 /* Compute the addresses of all registers saved in this frame. */
|
|
|
2049 for (i = UNW_REG_BSP; i < UNW_NUM_REGS; ++i)
|
|
|
2050 uw_update_reg_address (context, fs, i);
|
|
|
2051
|
|
|
2052 /* Unwind BSP for the local registers allocated this frame. */
|
|
|
2053 /* ??? What to do with stored BSP or BSPSTORE registers. */
|
|
|
2054 /* We assert that we are either at a call site, or we have
|
|
|
2055 just unwound through a signal frame. In either case
|
|
|
2056 pfs_loc is valid. */
|
|
|
2057 if (!(fs -> no_reg_stack_frame))
|
|
|
2058 {
|
|
|
2059 unsigned long pfs = *context->pfs_loc;
|
|
|
2060 unsigned long sol = (pfs >> 7) & 0x7f;
|
|
|
2061 context->bsp = (unsigned long)
|
|
|
2062 ia64_rse_skip_regs ((unsigned long *) context->bsp, -sol);
|
|
|
2063 }
|
|
|
2064 }
|
|
|
2065
|
|
|
2066 static void
|
|
|
2067 uw_advance_context (struct _Unwind_Context *context, _Unwind_FrameState *fs)
|
|
|
2068 {
|
|
|
2069 uw_update_context (context, fs);
|
|
|
2070 }
|
|
|
2071
|
|
|
2072 /* Fill in CONTEXT for top-of-stack. The only valid registers at this
|
|
|
2073 level will be the return address and the CFA. Note that CFA = SP+16. */
|
|
|
2074
|
|
|
2075 #define uw_init_context(CONTEXT) \
|
|
|
2076 do { \
|
|
|
2077 /* ??? There is a whole lot o code in uw_install_context that \
|
|
|
2078 tries to avoid spilling the entire machine state here. We \
|
|
|
2079 should try to make that work again. */ \
|
|
|
2080 __builtin_unwind_init(); \
|
|
|
2081 uw_init_context_1 (CONTEXT, __builtin_ia64_bsp ()); \
|
|
|
2082 } while (0)
|
|
|
2083
|
|
|
2084 static void
|
|
|
2085 uw_init_context_1 (struct _Unwind_Context *context, void *bsp)
|
|
|
2086 {
|
|
|
2087 void *rp = __builtin_extract_return_addr (__builtin_return_address (0));
|
|
|
2088 /* Set psp to the caller's stack pointer. */
|
|
|
2089 void *psp = __builtin_dwarf_cfa () - 16;
|
|
|
2090 _Unwind_FrameState fs;
|
|
|
2091 unsigned long rnat, tmp1, tmp2;
|
|
|
2092
|
|
|
2093 /* Flush the register stack to memory so that we can access it.
|
|
|
2094 Get rse nat collection for the last incomplete rbs chunk of
|
|
|
2095 registers at the same time. For this RSE needs to be turned
|
|
|
2096 into the mandatory only mode. */
|
|
|
2097 asm ("mov.m %1 = ar.rsc;;\n\t"
|
|
|
2098 "and %2 = 0x1c, %1;;\n\t"
|
|
|
2099 "mov.m ar.rsc = %2;;\n\t"
|
|
|
2100 "flushrs;;\n\t"
|
|
|
2101 "mov.m %0 = ar.rnat;;\n\t"
|
|
|
2102 "mov.m ar.rsc = %1\n\t"
|
|
|
2103 : "=r" (rnat), "=r" (tmp1), "=r" (tmp2));
|
|
|
2104
|
|
|
2105 memset (context, 0, sizeof (struct _Unwind_Context));
|
|
|
2106 context->bsp = (unsigned long) bsp;
|
|
|
2107 /* Set context->regstk_top to lowest rbs address which will use
|
|
|
2108 context->rnat collection. */
|
|
|
2109 context->regstk_top = context->bsp & ~0x1ffULL;
|
|
|
2110 context->rnat = rnat;
|
|
|
2111 context->psp = (unsigned long) psp;
|
|
|
2112 context->rp = (unsigned long) rp;
|
|
|
2113 asm ("mov %0 = sp" : "=r" (context->sp));
|
|
|
2114 asm ("mov %0 = pr" : "=r" (context->pr));
|
|
|
2115 context->pri_unat_loc = &context->initial_unat; /* ??? */
|
|
|
2116
|
|
|
2117 if (uw_frame_state_for (context, &fs) != _URC_NO_REASON)
|
|
|
2118 abort ();
|
|
|
2119
|
|
|
2120 uw_update_context (context, &fs);
|
|
|
2121 }
|
|
|
2122
|
|
|
2123 /* Install (i.e. longjmp to) the contents of TARGET. */
|
|
|
2124
|
|
|
2125 static void __attribute__((noreturn))
|
|
|
2126 uw_install_context (struct _Unwind_Context *current __attribute__((unused)),
|
|
|
2127 struct _Unwind_Context *target)
|
|
|
2128 {
|
|
|
2129 unsigned long ireg_buf[4], ireg_nat = 0, ireg_pr = 0;
|
|
|
2130 long i;
|
|
|
2131
|
|
|
2132 /* Copy integer register data from the target context to a
|
|
|
2133 temporary buffer. Do this so that we can frob AR.UNAT
|
|
|
2134 to get the NaT bits for these registers set properly. */
|
|
|
2135 for (i = 4; i <= 7; ++i)
|
|
|
2136 {
|
|
|
2137 char nat;
|
|
|
2138 void *t = target->ireg[i - 2].loc;
|
|
|
2139 if (t)
|
|
|
2140 {
|
|
|
2141 unw_access_gr (target, i, &ireg_buf[i - 4], &nat, 0);
|
|
|
2142 ireg_nat |= (long)nat << (((size_t)&ireg_buf[i - 4] >> 3) & 0x3f);
|
|
|
2143 /* Set p6 - p9. */
|
|
|
2144 ireg_pr |= 4L << i;
|
|
|
2145 }
|
|
|
2146 }
|
|
|
2147
|
|
|
2148 /* The value in uc_bsp that we've computed is that for the
|
|
|
2149 target function. The value that we install below will be
|
|
|
2150 adjusted by the BR.RET instruction based on the contents
|
|
|
2151 of AR.PFS. So we must unadjust that here. */
|
|
|
2152 target->bsp = (unsigned long)
|
|
|
2153 ia64_rse_skip_regs ((unsigned long *)target->bsp,
|
|
|
2154 (*target->pfs_loc >> 7) & 0x7f);
|
|
|
2155
|
|
|
2156 if (target->bsp < target->regstk_top)
|
|
|
2157 target->rnat = *ia64_rse_rnat_addr ((unsigned long *) target->bsp);
|
|
|
2158
|
|
|
2159 /* Provide assembly with the offsets into the _Unwind_Context. */
|
|
|
2160 asm volatile ("uc_rnat = %0"
|
|
|
2161 : : "i"(offsetof (struct _Unwind_Context, rnat)));
|
|
|
2162 asm volatile ("uc_bsp = %0"
|
|
|
2163 : : "i"(offsetof (struct _Unwind_Context, bsp)));
|
|
|
2164 asm volatile ("uc_psp = %0"
|
|
|
2165 : : "i"(offsetof (struct _Unwind_Context, psp)));
|
|
|
2166 asm volatile ("uc_rp = %0"
|
|
|
2167 : : "i"(offsetof (struct _Unwind_Context, rp)));
|
|
|
2168 asm volatile ("uc_pr = %0"
|
|
|
2169 : : "i"(offsetof (struct _Unwind_Context, pr)));
|
|
|
2170 asm volatile ("uc_gp = %0"
|
|
|
2171 : : "i"(offsetof (struct _Unwind_Context, gp)));
|
|
|
2172 asm volatile ("uc_pfs_loc = %0"
|
|
|
2173 : : "i"(offsetof (struct _Unwind_Context, pfs_loc)));
|
|
|
2174 asm volatile ("uc_unat_loc = %0"
|
|
|
2175 : : "i"(offsetof (struct _Unwind_Context, unat_loc)));
|
|
|
2176 asm volatile ("uc_lc_loc = %0"
|
|
|
2177 : : "i"(offsetof (struct _Unwind_Context, lc_loc)));
|
|
|
2178 asm volatile ("uc_fpsr_loc = %0"
|
|
|
2179 : : "i"(offsetof (struct _Unwind_Context, fpsr_loc)));
|
|
|
2180 asm volatile ("uc_eh_data = %0"
|
|
|
2181 : : "i"(offsetof (struct _Unwind_Context, eh_data)));
|
|
|
2182 asm volatile ("uc_br_loc = %0"
|
|
|
2183 : : "i"(offsetof (struct _Unwind_Context, br_loc)));
|
|
|
2184 asm volatile ("uc_fr_loc = %0"
|
|
|
2185 : : "i"(offsetof (struct _Unwind_Context, fr_loc)));
|
|
|
2186
|
|
|
2187 asm volatile (
|
|
|
2188 /* Load up call-saved non-window integer registers from ireg_buf. */
|
|
|
2189 "add r20 = 8, %1 \n\t"
|
|
|
2190 "mov ar.unat = %2 \n\t"
|
|
|
2191 "mov pr = %3, 0x3c0 \n\t"
|
|
|
2192 ";; \n\t"
|
|
|
2193 "(p6) ld8.fill r4 = [%1] \n\t"
|
|
|
2194 "(p7) ld8.fill r5 = [r20] \n\t"
|
|
|
2195 "add r21 = uc_br_loc + 16, %0 \n\t"
|
|
|
2196 "adds %1 = 16, %1 \n\t"
|
|
|
2197 "adds r20 = 16, r20 \n\t"
|
|
|
2198 ";; \n\t"
|
|
|
2199 "(p8) ld8.fill r6 = [%1] \n\t"
|
|
|
2200 "(p9) ld8.fill r7 = [r20] \n\t"
|
|
|
2201 "add r20 = uc_br_loc + 8, %0 \n\t"
|
|
|
2202 ";; \n\t"
|
|
|
2203 /* Load up call-saved branch registers. */
|
|
|
2204 "ld8 r22 = [r20], 16 \n\t"
|
|
|
2205 "ld8 r23 = [r21], 16 \n\t"
|
|
|
2206 ";; \n\t"
|
|
|
2207 "ld8 r24 = [r20], 16 \n\t"
|
|
|
2208 "ld8 r25 = [r21], uc_fr_loc - (uc_br_loc + 32)\n\t"
|
|
|
2209 ";; \n\t"
|
|
|
2210 "ld8 r26 = [r20], uc_fr_loc + 8 - (uc_br_loc + 40)\n\t"
|
|
|
2211 "ld8 r27 = [r21], 24 \n\t"
|
|
|
2212 "cmp.ne p6, p0 = r0, r22 \n\t"
|
|
|
2213 ";; \n\t"
|
|
|
2214 "ld8 r28 = [r20], 8 \n\t"
|
|
|
2215 "(p6) ld8 r22 = [r22] \n\t"
|
|
|
2216 "cmp.ne p7, p0 = r0, r23 \n\t"
|
|
|
2217 ";; \n\t"
|
|
|
2218 "(p7) ld8 r23 = [r23] \n\t"
|
|
|
2219 "cmp.ne p8, p0 = r0, r24 \n\t"
|
|
|
2220 ";; \n\t"
|
|
|
2221 "(p8) ld8 r24 = [r24] \n\t"
|
|
|
2222 "(p6) mov b1 = r22 \n\t"
|
|
|
2223 "cmp.ne p9, p0 = r0, r25 \n\t"
|
|
|
2224 ";; \n\t"
|
|
|
2225 "(p9) ld8 r25 = [r25] \n\t"
|
|
|
2226 "(p7) mov b2 = r23 \n\t"
|
|
|
2227 "cmp.ne p6, p0 = r0, r26 \n\t"
|
|
|
2228 ";; \n\t"
|
|
|
2229 "(p6) ld8 r26 = [r26] \n\t"
|
|
|
2230 "(p8) mov b3 = r24 \n\t"
|
|
|
2231 "cmp.ne p7, p0 = r0, r27 \n\t"
|
|
|
2232 ";; \n\t"
|
|
|
2233 /* Load up call-saved fp registers. */
|
|
|
2234 "(p7) ldf.fill f2 = [r27] \n\t"
|
|
|
2235 "(p9) mov b4 = r25 \n\t"
|
|
|
2236 "cmp.ne p8, p0 = r0, r28 \n\t"
|
|
|
2237 ";; \n\t"
|
|
|
2238 "(p8) ldf.fill f3 = [r28] \n\t"
|
|
|
2239 "(p6) mov b5 = r26 \n\t"
|
|
|
2240 ";; \n\t"
|
|
|
2241 "ld8 r29 = [r20], 16*8 - 4*8 \n\t"
|
|
|
2242 "ld8 r30 = [r21], 17*8 - 5*8 \n\t"
|
|
|
2243 ";; \n\t"
|
|
|
2244 "ld8 r22 = [r20], 16 \n\t"
|
|
|
2245 "ld8 r23 = [r21], 16 \n\t"
|
|
|
2246 ";; \n\t"
|
|
|
2247 "ld8 r24 = [r20], 16 \n\t"
|
|
|
2248 "ld8 r25 = [r21] \n\t"
|
|
|
2249 "cmp.ne p6, p0 = r0, r29 \n\t"
|
|
|
2250 ";; \n\t"
|
|
|
2251 "ld8 r26 = [r20], 8 \n\t"
|
|
|
2252 "(p6) ldf.fill f4 = [r29] \n\t"
|
|
|
2253 "cmp.ne p7, p0 = r0, r30 \n\t"
|
|
|
2254 ";; \n\t"
|
|
|
2255 "ld8 r27 = [r20], 8 \n\t"
|
|
|
2256 "(p7) ldf.fill f5 = [r30] \n\t"
|
|
|
2257 "cmp.ne p6, p0 = r0, r22 \n\t"
|
|
|
2258 ";; \n\t"
|
|
|
2259 "ld8 r28 = [r20], 8 \n\t"
|
|
|
2260 "(p6) ldf.fill f16 = [r22] \n\t"
|
|
|
2261 "cmp.ne p7, p0 = r0, r23 \n\t"
|
|
|
2262 ";; \n\t"
|
|
|
2263 "ld8 r29 = [r20], 8 \n\t"
|
|
|
2264 "(p7) ldf.fill f17 = [r23] \n\t"
|
|
|
2265 "cmp.ne p6, p0 = r0, r24 \n\t"
|
|
|
2266 ";; \n\t"
|
|
|
2267 "ld8 r22 = [r20], 8 \n\t"
|
|
|
2268 "(p6) ldf.fill f18 = [r24] \n\t"
|
|
|
2269 "cmp.ne p7, p0 = r0, r25 \n\t"
|
|
|
2270 ";; \n\t"
|
|
|
2271 "ld8 r23 = [r20], 8 \n\t"
|
|
|
2272 "(p7) ldf.fill f19 = [r25] \n\t"
|
|
|
2273 "cmp.ne p6, p0 = r0, r26 \n\t"
|
|
|
2274 ";; \n\t"
|
|
|
2275 "ld8 r24 = [r20], 8 \n\t"
|
|
|
2276 "(p6) ldf.fill f20 = [r26] \n\t"
|
|
|
2277 "cmp.ne p7, p0 = r0, r27 \n\t"
|
|
|
2278 ";; \n\t"
|
|
|
2279 "ld8 r25 = [r20], 8 \n\t"
|
|
|
2280 "(p7) ldf.fill f21 = [r27] \n\t"
|
|
|
2281 "cmp.ne p6, p0 = r0, r28 \n\t"
|
|
|
2282 ";; \n\t"
|
|
|
2283 "ld8 r26 = [r20], 8 \n\t"
|
|
|
2284 "(p6) ldf.fill f22 = [r28] \n\t"
|
|
|
2285 "cmp.ne p7, p0 = r0, r29 \n\t"
|
|
|
2286 ";; \n\t"
|
|
|
2287 "ld8 r27 = [r20], 8 \n\t"
|
|
|
2288 ";; \n\t"
|
|
|
2289 "ld8 r28 = [r20], 8 \n\t"
|
|
|
2290 "(p7) ldf.fill f23 = [r29] \n\t"
|
|
|
2291 "cmp.ne p6, p0 = r0, r22 \n\t"
|
|
|
2292 ";; \n\t"
|
|
|
2293 "ld8 r29 = [r20], 8 \n\t"
|
|
|
2294 "(p6) ldf.fill f24 = [r22] \n\t"
|
|
|
2295 "cmp.ne p7, p0 = r0, r23 \n\t"
|
|
|
2296 ";; \n\t"
|
|
|
2297 "(p7) ldf.fill f25 = [r23] \n\t"
|
|
|
2298 "cmp.ne p6, p0 = r0, r24 \n\t"
|
|
|
2299 "cmp.ne p7, p0 = r0, r25 \n\t"
|
|
|
2300 ";; \n\t"
|
|
|
2301 "(p6) ldf.fill f26 = [r24] \n\t"
|
|
|
2302 "(p7) ldf.fill f27 = [r25] \n\t"
|
|
|
2303 "cmp.ne p6, p0 = r0, r26 \n\t"
|
|
|
2304 ";; \n\t"
|
|
|
2305 "(p6) ldf.fill f28 = [r26] \n\t"
|
|
|
2306 "cmp.ne p7, p0 = r0, r27 \n\t"
|
|
|
2307 "cmp.ne p6, p0 = r0, r28 \n\t"
|
|
|
2308 ";; \n\t"
|
|
|
2309 "(p7) ldf.fill f29 = [r27] \n\t"
|
|
|
2310 "(p6) ldf.fill f30 = [r28] \n\t"
|
|
|
2311 "cmp.ne p7, p0 = r0, r29 \n\t"
|
|
|
2312 ";; \n\t"
|
|
|
2313 "(p7) ldf.fill f31 = [r29] \n\t"
|
|
|
2314 "add r20 = uc_rnat, %0 \n\t"
|
|
|
2315 "add r21 = uc_bsp, %0 \n\t"
|
|
|
2316 ";; \n\t"
|
|
|
2317 /* Load the balance of the thread state from the context. */
|
|
|
2318 "ld8 r22 = [r20], uc_psp - uc_rnat \n\t"
|
|
|
2319 "ld8 r23 = [r21], uc_gp - uc_bsp \n\t"
|
|
|
2320 ";; \n\t"
|
|
|
2321 "ld8 r24 = [r20], uc_pfs_loc - uc_psp \n\t"
|
|
|
2322 "ld8 r1 = [r21], uc_rp - uc_gp \n\t"
|
|
|
2323 ";; \n\t"
|
|
|
2324 "ld8 r25 = [r20], uc_unat_loc - uc_pfs_loc\n\t"
|
|
|
2325 "ld8 r26 = [r21], uc_pr - uc_rp \n\t"
|
|
|
2326 ";; \n\t"
|
|
|
2327 "ld8 r27 = [r20], uc_lc_loc - uc_unat_loc\n\t"
|
|
|
2328 "ld8 r28 = [r21], uc_fpsr_loc - uc_pr \n\t"
|
|
|
2329 ";; \n\t"
|
|
|
2330 "ld8 r29 = [r20], uc_eh_data - uc_lc_loc\n\t"
|
|
|
2331 "ld8 r30 = [r21], uc_eh_data + 8 - uc_fpsr_loc\n\t"
|
|
|
2332 ";; \n\t"
|
|
|
2333 /* Load data for the exception handler. */
|
|
|
2334 "ld8 r15 = [r20], 16 \n\t"
|
|
|
2335 "ld8 r16 = [r21], 16 \n\t"
|
|
|
2336 ";; \n\t"
|
|
|
2337 "ld8 r17 = [r20] \n\t"
|
|
|
2338 "ld8 r18 = [r21] \n\t"
|
|
|
2339 ";; \n\t"
|
|
|
2340 /* Install the balance of the thread state loaded above. */
|
|
|
2341 "cmp.ne p6, p0 = r0, r25 \n\t"
|
|
|
2342 "cmp.ne p7, p0 = r0, r27 \n\t"
|
|
|
2343 ";; \n\t"
|
|
|
2344 "(p6) ld8 r25 = [r25] \n\t"
|
|
|
2345 "(p7) ld8 r27 = [r27] \n\t"
|
|
|
2346 ";; \n\t"
|
|
|
2347 "(p7) mov.m ar.unat = r27 \n\t"
|
|
|
2348 "(p6) mov.i ar.pfs = r25 \n\t"
|
|
|
2349 "cmp.ne p9, p0 = r0, r29 \n\t"
|
|
|
2350 ";; \n\t"
|
|
|
2351 "(p9) ld8 r29 = [r29] \n\t"
|
|
|
2352 "cmp.ne p6, p0 = r0, r30 \n\t"
|
|
|
2353 ";; \n\t"
|
|
|
2354 "(p6) ld8 r30 = [r30] \n\t"
|
|
|
2355 /* Don't clobber p6-p9, which are in use at present. */
|
|
|
2356 "mov pr = r28, ~0x3c0 \n\t"
|
|
|
2357 "(p9) mov.i ar.lc = r29 \n\t"
|
|
|
2358 ";; \n\t"
|
|
|
2359 "mov.m r25 = ar.rsc \n\t"
|
|
|
2360 "(p6) mov.m ar.fpsr = r30 \n\t"
|
|
|
2361 ";; \n\t"
|
|
|
2362 "and r29 = 0x1c, r25 \n\t"
|
|
|
2363 "mov b0 = r26 \n\t"
|
|
|
2364 ";; \n\t"
|
|
|
2365 "mov.m ar.rsc = r29 \n\t"
|
|
|
2366 ";; \n\t"
|
|
|
2367 /* This must be done before setting AR.BSPSTORE, otherwise
|
|
|
2368 AR.BSP will be initialized with a random displacement
|
|
|
2369 below the value we want, based on the current number of
|
|
|
2370 dirty stacked registers. */
|
|
|
2371 "loadrs \n\t"
|
|
|
2372 "invala \n\t"
|
|
|
2373 ";; \n\t"
|
|
|
2374 "mov.m ar.bspstore = r23 \n\t"
|
|
|
2375 ";; \n\t"
|
|
|
2376 "mov.m ar.rnat = r22 \n\t"
|
|
|
2377 ";; \n\t"
|
|
|
2378 "mov.m ar.rsc = r25 \n\t"
|
|
|
2379 "mov sp = r24 \n\t"
|
|
|
2380 "br.ret.sptk.few b0"
|
|
|
2381 : : "r"(target), "r"(ireg_buf), "r"(ireg_nat), "r"(ireg_pr)
|
|
|
2382 : "r15", "r16", "r17", "r18", "r20", "r21", "r22",
|
|
|
2383 "r23", "r24", "r25", "r26", "r27", "r28", "r29",
|
|
|
2384 "r30", "r31");
|
|
|
2385 /* NOTREACHED */
|
|
|
2386 while (1);
|
|
|
2387 }
|
|
|
2388
|
|
|
2389 static inline _Unwind_Ptr
|
|
|
2390 uw_identify_context (struct _Unwind_Context *context)
|
|
|
2391 {
|
|
|
2392 return _Unwind_GetIP (context);
|
|
|
2393 }
|
|
|
2394
|
|
|
2395 #include "unwind.inc"
|
|
|
2396
|
|
|
2397 #if defined (USE_GAS_SYMVER) && defined (SHARED) && defined (USE_LIBUNWIND_EXCEPTIONS)
|
|
|
2398 alias (_Unwind_Backtrace);
|
|
|
2399 alias (_Unwind_DeleteException);
|
|
|
2400 alias (_Unwind_FindEnclosingFunction);
|
|
|
2401 alias (_Unwind_ForcedUnwind);
|
|
|
2402 alias (_Unwind_GetBSP);
|
|
|
2403 alias (_Unwind_GetCFA);
|
|
|
2404 alias (_Unwind_GetGR);
|
|
|
2405 alias (_Unwind_GetIP);
|
|
|
2406 alias (_Unwind_GetLanguageSpecificData);
|
|
|
2407 alias (_Unwind_GetRegionStart);
|
|
|
2408 alias (_Unwind_RaiseException);
|
|
|
2409 alias (_Unwind_Resume);
|
|
|
2410 alias (_Unwind_Resume_or_Rethrow);
|
|
|
2411 alias (_Unwind_SetGR);
|
|
|
2412 alias (_Unwind_SetIP);
|
|
|
2413 #endif
|
|
|
2414
|
|
|
2415 #endif
|
