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1 ;; DFA-based pipeline description for the RM9000.
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2 ;; Copyright (C) 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
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3 ;;
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4 ;; This file is part of GCC.
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5
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6 ;; GCC is free software; you can redistribute it and/or modify it
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7 ;; under the terms of the GNU General Public License as published
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8 ;; by the Free Software Foundation; either version 3, or (at your
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9 ;; option) any later version.
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10
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11 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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12 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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13 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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14 ;; License for more details.
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15
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16 ;; You should have received a copy of the GNU General Public License
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17 ;; along with GCC; see the file COPYING3. If not see
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18 ;; <http://www.gnu.org/licenses/>.
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19
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20 (define_automaton "rm9k_main, rm9k_imul, rm9k_fdiv")
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21
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22 ;; These units are for insns that can issue in either pipe. We don't
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23 ;; want to use constructs like "rm9k_m | rm9k_f_int" since that would
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24 ;; needlessly make an insn prefer the M pipe.
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25 (define_cpu_unit "rm9k_any1" "rm9k_main")
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26 (define_cpu_unit "rm9k_any2" "rm9k_main")
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27
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28 ;; F and M pipe units, for instructions that must be issued by a
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29 ;; particular pipe. Split the F pipe into two units so that integer
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30 ;; instructions can issue while the FPU is busy. We don't need to
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31 ;; split M because it is only ever reserved for a single cycle.
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32 (define_cpu_unit "rm9k_m" "rm9k_main")
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33 (define_cpu_unit "rm9k_f_int" "rm9k_main")
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34 (define_cpu_unit "rm9k_f_float" "rm9k_main")
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35
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36 (exclusion_set "rm9k_f_int" "rm9k_f_float")
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37
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38 ;; Multiply/divide units.
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39 (define_cpu_unit "rm9k_imul" "rm9k_imul")
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40 (define_cpu_unit "rm9k_fdiv" "rm9k_fdiv")
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41
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42 (define_insn_reservation "rm9k_load" 3
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43 (and (eq_attr "cpu" "r9000")
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44 (eq_attr "type" "load,fpload,fpidxload"))
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45 "rm9k_m")
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46
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47 (define_insn_reservation "rm9k_store" 1
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48 (and (eq_attr "cpu" "r9000")
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49 (eq_attr "type" "store,fpstore,fpidxstore"))
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50 "rm9k_m")
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51
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52 (define_insn_reservation "rm9k_int" 1
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53 (and (eq_attr "cpu" "r9000")
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54 (eq_attr "type" "arith,shift,signext,slt,clz,const,logical,move,nop,trap"))
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55 "rm9k_any1 | rm9k_any2")
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56
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57 (define_insn_reservation "rm9k_int_cmove" 2
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58 (and (eq_attr "cpu" "r9000")
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59 (and (eq_attr "type" "condmove")
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60 (eq_attr "mode" "SI,DI")))
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61 "rm9k_any1 | rm9k_any2")
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62
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63 ;; This applies to both 'mul' and 'mult'.
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64 (define_insn_reservation "rm9k_mulsi" 3
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65 (and (eq_attr "cpu" "r9000")
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66 (and (eq_attr "type" "imul,imul3,imadd")
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67 (eq_attr "mode" "!DI")))
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68 "rm9k_f_int")
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69
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70 (define_insn_reservation "rm9k_muldi" 7
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71 (and (eq_attr "cpu" "r9000")
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72 (and (eq_attr "type" "imul,imul3,imadd")
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73 (eq_attr "mode" "DI")))
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74 "rm9k_f_int + rm9k_imul * 7")
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75
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76 (define_insn_reservation "rm9k_divsi" 38
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77 (and (eq_attr "cpu" "r9000")
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78 (and (eq_attr "type" "idiv")
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79 (eq_attr "mode" "!DI")))
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80 "rm9k_f_int + rm9k_imul * 38")
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81
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82 (define_insn_reservation "rm9k_divdi" 70
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83 (and (eq_attr "cpu" "r9000")
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84 (and (eq_attr "type" "idiv")
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85 (eq_attr "mode" "DI")))
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86 "rm9k_f_int + rm9k_imul * 70")
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87
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88 (define_insn_reservation "rm9k_mfhilo" 1
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89 (and (eq_attr "cpu" "r9000")
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90 (eq_attr "type" "mfhilo"))
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91 "rm9k_f_int")
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92
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93 (define_insn_reservation "rm9k_mthilo" 5
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94 (and (eq_attr "cpu" "r9000")
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95 (eq_attr "type" "mthilo"))
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96 "rm9k_f_int")
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97
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98 (define_insn_reservation "rm9k_xfer" 2
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99 (and (eq_attr "cpu" "r9000")
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100 (eq_attr "type" "mfc,mtc"))
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101 "rm9k_m")
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102
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103 (define_insn_reservation "rm9k_fquick" 2
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104 (and (eq_attr "cpu" "r9000")
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105 (eq_attr "type" "fabs,fneg,fcmp,fmove"))
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106 "rm9k_f_float")
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107
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108 (define_insn_reservation "rm9k_fcmove" 2
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109 (and (eq_attr "cpu" "r9000")
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110 (and (eq_attr "type" "condmove")
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111 (eq_attr "mode" "SF,DF")))
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112 "rm9k_m")
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113
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114 (define_insn_reservation "rm9k_fadd" 6
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115 (and (eq_attr "cpu" "r9000")
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116 (eq_attr "type" "fadd,fcvt"))
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117 "rm9k_f_float")
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118
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119 (define_insn_reservation "rm9k_fmuls" 6
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120 (and (eq_attr "cpu" "r9000")
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121 (and (eq_attr "type" "fmul,fmadd")
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122 (eq_attr "mode" "SF")))
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123 "rm9k_f_float")
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124
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125 (define_insn_reservation "rm9k_fmuld" 9
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126 (and (eq_attr "cpu" "r9000")
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127 (and (eq_attr "type" "fmul,fmadd")
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128 (eq_attr "mode" "DF")))
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129 "rm9k_f_float * 3")
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130
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131 (define_insn_reservation "rm9k_fdivs" 22
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132 (and (eq_attr "cpu" "r9000")
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133 (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt")
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134 (eq_attr "mode" "SF")))
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135 "rm9k_f_float + rm9k_fdiv * 22")
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136
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137 (define_insn_reservation "rm9k_fdivd" 37
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138 (and (eq_attr "cpu" "r9000")
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139 (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt")
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140 (eq_attr "mode" "DF")))
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141 "rm9k_f_float + rm9k_fdiv * 37")
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142
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143 (define_insn_reservation "rm9k_branch" 2
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144 (and (eq_attr "cpu" "r9000")
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145 (eq_attr "type" "branch,jump,call"))
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146 "rm9k_any1 | rm9k_any2")
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147
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148 (define_insn_reservation "rm9k_unknown" 1
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149 (and (eq_attr "cpu" "r9000")
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150 (eq_attr "type" "unknown,multi"))
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151 "rm9k_m + rm9k_f_int + rm9k_any1 + rm9k_any2")
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