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1 ;; Constraint definitions for pa
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2 ;; Copyright (C) 2007 Free Software Foundation, Inc.
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3
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4 ;; This file is part of GCC.
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5
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6 ;; GCC is free software; you can redistribute it and/or modify it
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7 ;; under the terms of the GNU General Public License as published
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8 ;; by the Free Software Foundation; either version 3, or (at your
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9 ;; option) any later version.
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10
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11 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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12 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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13 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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14 ;; License for more details.
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15
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16 ;; You should have received a copy of the GNU General Public License
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17 ;; along with GCC; see the file COPYING3. If not see
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18 ;; <http://www.gnu.org/licenses/>.
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19
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20 ;;; Unused letters:
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21 ;;; ABCDEF H V Y
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22 ;;; bcde ghijklmnop stuvw z
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23
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24 ;; Register constraints.
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25 (define_register_constraint "a" "R1_REGS"
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26 "General register 1.")
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27
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28 (define_register_constraint "f" "FP_REGS"
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29 "Floating-point register.")
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30
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31 (define_register_constraint "q" "SHIFT_REGS"
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32 "Shift amount register.")
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33
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34 ;; Keep 'x' for backward compatibility with user asm.
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35 (define_register_constraint "x" "FP_REGS"
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36 "Floating-point register.")
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37
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38 (define_register_constraint "y" "TARGET_64BIT ? FP_REGS : FPUPPER_REGS"
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39 "Upper floating-point register.")
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40
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41 (define_register_constraint "Z" "ALL_REGS"
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42 "Any register.")
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43
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44 ;; Integer constant constraints.
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45 (define_constraint "I"
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46 "Signed 11-bit integer constant."
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47 (and (match_code "const_int")
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48 (match_test "VAL_11_BITS_P (ival)")))
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49
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50 (define_constraint "J"
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51 "Signed 14-bit integer constant."
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52 (and (match_code "const_int")
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53 (match_test "VAL_14_BITS_P (ival)")))
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54
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55 (define_constraint "K"
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56 "Integer constant that can be deposited with a zdepi instruction."
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57 (and (match_code "const_int")
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58 (match_test "zdepi_cint_p (ival)")))
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59
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60 (define_constraint "L"
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61 "Signed 5-bit integer constant."
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62 (and (match_code "const_int")
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63 (match_test "VAL_5_BITS_P (ival)")))
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64
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65 (define_constraint "M"
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66 "Integer constant 0."
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67 (and (match_code "const_int")
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68 (match_test "ival == 0")))
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69
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70 (define_constraint "N"
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71 "Integer constant that can be loaded with a ldil instruction."
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72 (and (match_code "const_int")
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73 (match_test "ldil_cint_p (ival)")))
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74
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75 (define_constraint "O"
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76 "Integer constant such that ival+1 is a power of 2."
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77 (and (match_code "const_int")
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78 (match_test "(ival & (ival + 1)) == 0")))
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79
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80 (define_constraint "P"
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81 "Integer constant that can be used as an and mask in depi and
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82 extru instructions."
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83 (and (match_code "const_int")
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84 (match_test "and_mask_p (ival)")))
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85
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86 (define_constraint "S"
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87 "Integer constant 31."
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88 (and (match_code "const_int")
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89 (match_test "ival == 31")))
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90
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91 (define_constraint "U"
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92 "Integer constant 63."
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93 (and (match_code "const_int")
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94 (match_test "ival == 63")))
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95
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96 ;; Floating-point constant constraints.
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97 (define_constraint "G"
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98 "Floating-point constant 0."
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99 (and (match_code "const_double")
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100 (match_test "GET_MODE_CLASS (mode) == MODE_FLOAT
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101 && op == CONST0_RTX (mode)")))
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102
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103 ;; Extra constraints.
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104 (define_constraint "A"
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105 "A LO_SUM DLT memory operand."
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106 (and (match_code "mem")
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107 (match_test "IS_LO_SUM_DLT_ADDR_P (XEXP (op, 0))")))
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108
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109 (define_constraint "Q"
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110 "A memory operand that can be used as the destination operand of an
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111 integer store, or the source operand of an integer load. That is
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112 any memory operand that isn't a symbolic, indexed or lo_sum memory
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113 operand. Note that an unassigned pseudo register is such a memory
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114 operand. We accept unassigned pseudo registers because reload
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115 generates them and then doesn't re-recognize the insn, causing
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116 constrain_operands to fail."
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117 (match_test "integer_store_memory_operand (op, mode)"))
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118
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119 (define_constraint "R"
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120 "A scaled or unscaled indexed memory operand that can be used as the
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121 source address in integer and floating-point loads."
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122 (and (match_code "mem")
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123 (match_test "IS_INDEX_ADDR_P (XEXP (op, 0))")))
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124
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125 (define_constraint "T"
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126 "A memory operand for floating-point loads and stores."
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127 (and (match_code "mem")
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128 (match_test "!IS_LO_SUM_DLT_ADDR_P (XEXP (op, 0))
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129 && !IS_INDEX_ADDR_P (XEXP (op, 0))
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130 && memory_address_p ((GET_MODE_SIZE (mode) == 4
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131 ? SFmode : DFmode),
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132 XEXP (op, 0))")))
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133
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134 ;; We could allow short displacements but GO_IF_LEGITIMATE_ADDRESS
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135 ;; can't tell when a long displacement is valid.
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136 (define_constraint "W"
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137 "A register indirect memory operand."
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138 (and (match_code "mem")
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139 (match_test "REG_P (XEXP (op, 0))
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140 && REG_OK_FOR_BASE_P (XEXP (op, 0))")))
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