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1 /* Definitions of target machine for GNU compiler, for IBM S/390
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2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
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3 2007, 2008 Free Software Foundation, Inc.
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4 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
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5 Ulrich Weigand (uweigand@de.ibm.com).
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6 Andreas Krebbel (Andreas.Krebbel@de.ibm.com)
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7
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8 This file is part of GCC.
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9
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10 GCC is free software; you can redistribute it and/or modify it under
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11 the terms of the GNU General Public License as published by the Free
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12 Software Foundation; either version 3, or (at your option) any later
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13 version.
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14
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15 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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16 WARRANTY; without even the implied warranty of MERCHANTABILITY or
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17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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18 for more details.
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19
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20 You should have received a copy of the GNU General Public License
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21 along with GCC; see the file COPYING3. If not see
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22 <http://www.gnu.org/licenses/>. */
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23
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24 #ifndef _S390_H
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25 #define _S390_H
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26
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27 /* Override the __fixdfdi etc. routines when building libgcc2.
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28 ??? This should be done in a cleaner way ... */
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29 #if defined (IN_LIBGCC2) && !defined (__s390x__)
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30 #include <config/s390/fixdfdi.h>
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31 #endif
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32
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33 /* Which processor to generate code or schedule for. The cpu attribute
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34 defines a list that mirrors this list, so changes to s390.md must be
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35 made at the same time. */
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36
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37 enum processor_type
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38 {
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39 PROCESSOR_9672_G5,
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40 PROCESSOR_9672_G6,
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41 PROCESSOR_2064_Z900,
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42 PROCESSOR_2084_Z990,
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43 PROCESSOR_2094_Z9_109,
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44 PROCESSOR_2097_Z10,
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45 PROCESSOR_max
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46 };
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47
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48 /* Optional architectural facilities supported by the processor. */
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49
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50 enum processor_flags
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51 {
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52 PF_IEEE_FLOAT = 1,
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53 PF_ZARCH = 2,
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54 PF_LONG_DISPLACEMENT = 4,
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55 PF_EXTIMM = 8,
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56 PF_DFP = 16,
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57 PF_Z10 = 32
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58 };
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59
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60 extern enum processor_type s390_tune;
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61 extern enum processor_flags s390_tune_flags;
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62
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63 extern enum processor_type s390_arch;
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64 extern enum processor_flags s390_arch_flags;
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65
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66 /* These flags indicate that the generated code should run on a cpu
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67 providing the respective hardware facility regardless of the
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68 current cpu mode (ESA or z/Architecture). */
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69
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70 #define TARGET_CPU_IEEE_FLOAT \
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71 (s390_arch_flags & PF_IEEE_FLOAT)
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72 #define TARGET_CPU_ZARCH \
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73 (s390_arch_flags & PF_ZARCH)
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74 #define TARGET_CPU_LONG_DISPLACEMENT \
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75 (s390_arch_flags & PF_LONG_DISPLACEMENT)
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76 #define TARGET_CPU_EXTIMM \
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77 (s390_arch_flags & PF_EXTIMM)
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78 #define TARGET_CPU_DFP \
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79 (s390_arch_flags & PF_DFP)
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80 #define TARGET_CPU_Z10 \
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81 (s390_arch_flags & PF_Z10)
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82
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83 /* These flags indicate that the generated code should run on a cpu
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84 providing the respective hardware facility when run in
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85 z/Architecture mode. */
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86
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87 #define TARGET_LONG_DISPLACEMENT \
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88 (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
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89 #define TARGET_EXTIMM \
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90 (TARGET_ZARCH && TARGET_CPU_EXTIMM)
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91 #define TARGET_DFP \
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92 (TARGET_ZARCH && TARGET_CPU_DFP && TARGET_HARD_FLOAT)
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93 #define TARGET_Z10 \
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94 (TARGET_ZARCH && TARGET_CPU_Z10)
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95
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96 /* Run-time target specification. */
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97
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98 /* Defaults for option flags defined only on some subtargets. */
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99 #ifndef TARGET_TPF_PROFILING
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100 #define TARGET_TPF_PROFILING 0
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101 #endif
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102
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103 /* This will be overridden by OS headers. */
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104 #define TARGET_TPF 0
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105
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106 /* Target CPU builtins. */
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107 #define TARGET_CPU_CPP_BUILTINS() \
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108 do \
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109 { \
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110 builtin_assert ("cpu=s390"); \
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111 builtin_assert ("machine=s390"); \
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112 builtin_define ("__s390__"); \
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113 if (TARGET_64BIT) \
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114 builtin_define ("__s390x__"); \
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115 if (TARGET_LONG_DOUBLE_128) \
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116 builtin_define ("__LONG_DOUBLE_128__"); \
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117 } \
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118 while (0)
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119
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120 #ifdef DEFAULT_TARGET_64BIT
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121 #define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP)
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122 #else
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123 #define TARGET_DEFAULT 0
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124 #endif
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125
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126 /* Support for configure-time defaults. */
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127 #define OPTION_DEFAULT_SPECS \
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128 { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" }, \
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129 { "arch", "%{!march=*:-march=%(VALUE)}" }, \
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130 { "tune", "%{!mtune=*:-mtune=%(VALUE)}" }
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131
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132 /* Defaulting rules. */
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133 #ifdef DEFAULT_TARGET_64BIT
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134 #define DRIVER_SELF_SPECS \
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135 "%{!m31:%{!m64:-m64}}", \
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136 "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
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137 "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
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138 #else
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139 #define DRIVER_SELF_SPECS \
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140 "%{!m31:%{!m64:-m31}}", \
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141 "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
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142 "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
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143 #endif
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144
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145 /* Target version string. Overridden by the OS header. */
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146 #ifdef DEFAULT_TARGET_64BIT
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147 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
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148 #else
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149 #define TARGET_VERSION fprintf (stderr, " (S/390)");
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150 #endif
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151
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152 /* Hooks to override options. */
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153 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
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154 #define OVERRIDE_OPTIONS override_options ()
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155
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156 /* Frame pointer is not used for debugging. */
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157 #define CAN_DEBUG_WITHOUT_FP
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158
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159 /* Constants needed to control the TEST DATA CLASS (TDC) instruction. */
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160 #define S390_TDC_POSITIVE_ZERO (1 << 11)
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161 #define S390_TDC_NEGATIVE_ZERO (1 << 10)
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162 #define S390_TDC_POSITIVE_NORMALIZED_BFP_NUMBER (1 << 9)
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163 #define S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER (1 << 8)
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164 #define S390_TDC_POSITIVE_DENORMALIZED_BFP_NUMBER (1 << 7)
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165 #define S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER (1 << 6)
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166 #define S390_TDC_POSITIVE_INFINITY (1 << 5)
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167 #define S390_TDC_NEGATIVE_INFINITY (1 << 4)
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168 #define S390_TDC_POSITIVE_QUIET_NAN (1 << 3)
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169 #define S390_TDC_NEGATIVE_QUIET_NAN (1 << 2)
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170 #define S390_TDC_POSITIVE_SIGNALING_NAN (1 << 1)
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171 #define S390_TDC_NEGATIVE_SIGNALING_NAN (1 << 0)
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172
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173 /* The following values are different for DFP. */
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174 #define S390_TDC_POSITIVE_DENORMALIZED_DFP_NUMBER (1 << 9)
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175 #define S390_TDC_NEGATIVE_DENORMALIZED_DFP_NUMBER (1 << 8)
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176 #define S390_TDC_POSITIVE_NORMALIZED_DFP_NUMBER (1 << 7)
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177 #define S390_TDC_NEGATIVE_NORMALIZED_DFP_NUMBER (1 << 6)
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178
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179 /* For signbit, the BFP-DFP-difference makes no difference. */
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180 #define S390_TDC_SIGNBIT_SET (S390_TDC_NEGATIVE_ZERO \
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181 | S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER \
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182 | S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER\
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183 | S390_TDC_NEGATIVE_INFINITY \
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184 | S390_TDC_NEGATIVE_QUIET_NAN \
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185 | S390_TDC_NEGATIVE_SIGNALING_NAN )
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186
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187 #define S390_TDC_INFINITY (S390_TDC_POSITIVE_INFINITY \
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188 | S390_TDC_NEGATIVE_INFINITY )
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189
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190 /* In libgcc2, determine target settings as compile-time constants. */
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191 #ifdef IN_LIBGCC2
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192 #undef TARGET_64BIT
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193 #ifdef __s390x__
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194 #define TARGET_64BIT 1
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195 #else
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196 #define TARGET_64BIT 0
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197 #endif
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198 #endif
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199
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200
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201 /* Target machine storage layout. */
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202
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203 /* Everything is big-endian. */
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204 #define BITS_BIG_ENDIAN 1
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205 #define BYTES_BIG_ENDIAN 1
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206 #define WORDS_BIG_ENDIAN 1
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207
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208 /* Width of a word, in units (bytes). */
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209 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
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210 #ifndef IN_LIBGCC2
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211 #define MIN_UNITS_PER_WORD 4
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212 #endif
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213 #define MAX_BITS_PER_WORD 64
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214
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215 /* Function arguments and return values are promoted to word size. */
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216 #define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE) \
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217 if (INTEGRAL_MODE_P (MODE) && \
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218 GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
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219 (MODE) = Pmode; \
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220 }
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221
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222 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
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223 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
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224
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225 /* Boundary (in *bits*) on which stack pointer should be aligned. */
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226 #define STACK_BOUNDARY 64
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227
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228 /* Allocation boundary (in *bits*) for the code of a function. */
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229 #define FUNCTION_BOUNDARY 32
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230
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231 /* There is no point aligning anything to a rounder boundary than this. */
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232 #define BIGGEST_ALIGNMENT 64
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233
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234 /* Alignment of field after `int : 0' in a structure. */
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235 #define EMPTY_FIELD_BOUNDARY 32
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236
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237 /* Alignment on even addresses for LARL instruction. */
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238 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
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239 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
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240
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241 /* Alignment is not required by the hardware. */
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242 #define STRICT_ALIGNMENT 0
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243
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244 /* Mode of stack savearea.
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245 FUNCTION is VOIDmode because calling convention maintains SP.
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246 BLOCK needs Pmode for SP.
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247 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
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248 #define STACK_SAVEAREA_MODE(LEVEL) \
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249 (LEVEL == SAVE_FUNCTION ? VOIDmode \
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250 : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
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251
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252
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253 /* Type layout. */
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254
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255 /* Sizes in bits of the source language data types. */
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256 #define SHORT_TYPE_SIZE 16
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257 #define INT_TYPE_SIZE 32
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258 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
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259 #define LONG_LONG_TYPE_SIZE 64
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260 #define FLOAT_TYPE_SIZE 32
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261 #define DOUBLE_TYPE_SIZE 64
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262 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
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263
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264 /* Define this to set long double type size to use in libgcc2.c, which can
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265 not depend on target_flags. */
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266 #ifdef __LONG_DOUBLE_128__
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267 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
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268 #else
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269 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
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270 #endif
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271
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272 /* Work around target_flags dependency in ada/targtyps.c. */
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273 #define WIDEST_HARDWARE_FP_SIZE 64
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274
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275 /* We use "unsigned char" as default. */
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276 #define DEFAULT_SIGNED_CHAR 0
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277
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278
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279 /* Register usage. */
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280
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281 /* We have 16 general purpose registers (registers 0-15),
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282 and 16 floating point registers (registers 16-31).
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283 (On non-IEEE machines, we have only 4 fp registers.)
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284
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285 Amongst the general purpose registers, some are used
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286 for specific purposes:
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287 GPR 11: Hard frame pointer (if needed)
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288 GPR 12: Global offset table pointer (if needed)
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289 GPR 13: Literal pool base register
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290 GPR 14: Return address register
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291 GPR 15: Stack pointer
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292
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293 Registers 32-35 are 'fake' hard registers that do not
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294 correspond to actual hardware:
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295 Reg 32: Argument pointer
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296 Reg 33: Condition code
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297 Reg 34: Frame pointer
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298 Reg 35: Return address pointer
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299
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300 Registers 36 and 37 are mapped to access registers
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301 0 and 1, used to implement thread-local storage. */
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302
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303 #define FIRST_PSEUDO_REGISTER 38
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304
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305 /* Standard register usage. */
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306 #define GENERAL_REGNO_P(N) ((int)(N) >= 0 && (N) < 16)
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307 #define ADDR_REGNO_P(N) ((N) >= 1 && (N) < 16)
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308 #define FP_REGNO_P(N) ((N) >= 16 && (N) < 32)
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309 #define CC_REGNO_P(N) ((N) == 33)
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310 #define FRAME_REGNO_P(N) ((N) == 32 || (N) == 34 || (N) == 35)
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311 #define ACCESS_REGNO_P(N) ((N) == 36 || (N) == 37)
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312
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313 #define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
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314 #define ADDR_REG_P(X) (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
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315 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
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316 #define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
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317 #define FRAME_REG_P(X) (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
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318 #define ACCESS_REG_P(X) (REG_P (X) && ACCESS_REGNO_P (REGNO (X)))
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319
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320 /* Set up fixed registers and calling convention:
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321
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322 GPRs 0-5 are always call-clobbered,
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323 GPRs 6-15 are always call-saved.
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324 GPR 12 is fixed if used as GOT pointer.
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325 GPR 13 is always fixed (as literal pool pointer).
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326 GPR 14 is always fixed on S/390 machines (as return address).
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327 GPR 15 is always fixed (as stack pointer).
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328 The 'fake' hard registers are call-clobbered and fixed.
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329 The access registers are call-saved and fixed.
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330
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331 On 31-bit, FPRs 18-19 are call-clobbered;
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332 on 64-bit, FPRs 24-31 are call-clobbered.
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333 The remaining FPRs are call-saved. */
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334
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335 #define FIXED_REGISTERS \
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336 { 0, 0, 0, 0, \
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337 0, 0, 0, 0, \
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338 0, 0, 0, 0, \
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339 0, 1, 1, 1, \
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340 0, 0, 0, 0, \
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341 0, 0, 0, 0, \
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342 0, 0, 0, 0, \
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343 0, 0, 0, 0, \
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344 1, 1, 1, 1, \
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345 1, 1 }
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346
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347 #define CALL_USED_REGISTERS \
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348 { 1, 1, 1, 1, \
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349 1, 1, 0, 0, \
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350 0, 0, 0, 0, \
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351 0, 1, 1, 1, \
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352 1, 1, 1, 1, \
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353 1, 1, 1, 1, \
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354 1, 1, 1, 1, \
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355 1, 1, 1, 1, \
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356 1, 1, 1, 1, \
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357 1, 1 }
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358
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359 #define CALL_REALLY_USED_REGISTERS \
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360 { 1, 1, 1, 1, \
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361 1, 1, 0, 0, \
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362 0, 0, 0, 0, \
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363 0, 0, 0, 0, \
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364 1, 1, 1, 1, \
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365 1, 1, 1, 1, \
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366 1, 1, 1, 1, \
|
|
|
367 1, 1, 1, 1, \
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|
|
368 1, 1, 1, 1, \
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|
|
369 0, 0 }
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|
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370
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|
|
371 #define CONDITIONAL_REGISTER_USAGE s390_conditional_register_usage ()
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|
|
372
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|
|
373 /* Preferred register allocation order. */
|
|
|
374 #define REG_ALLOC_ORDER \
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|
|
375 { 1, 2, 3, 4, 5, 0, 12, 11, 10, 9, 8, 7, 6, 14, 13, \
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|
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376 16, 17, 18, 19, 20, 21, 22, 23, \
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|
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377 24, 25, 26, 27, 28, 29, 30, 31, \
|
|
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378 15, 32, 33, 34, 35, 36, 37 }
|
|
|
379
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|
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380
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|
|
381 /* Fitting values into registers. */
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382
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|
383 /* Integer modes <= word size fit into any GPR.
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|
|
384 Integer modes > word size fit into successive GPRs, starting with
|
|
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385 an even-numbered register.
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|
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386 SImode and DImode fit into FPRs as well.
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387
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388 Floating point modes <= word size fit into any FPR or GPR.
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389 Floating point modes > word size (i.e. DFmode on 32-bit) fit
|
|
|
390 into any FPR, or an even-odd GPR pair.
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|
|
391 TFmode fits only into an even-odd FPR pair.
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392
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|
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393 Complex floating point modes fit either into two FPRs, or into
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394 successive GPRs (again starting with an even number).
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395 TCmode fits only into two successive even-odd FPR pairs.
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396
|
|
|
397 Condition code modes fit only into the CC register. */
|
|
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398
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|
|
399 /* Because all registers in a class have the same size HARD_REGNO_NREGS
|
|
|
400 is equivalent to CLASS_MAX_NREGS. */
|
|
|
401 #define HARD_REGNO_NREGS(REGNO, MODE) \
|
|
|
402 s390_class_max_nregs (REGNO_REG_CLASS (REGNO), (MODE))
|
|
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403
|
|
|
404 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
|
|
|
405 s390_hard_regno_mode_ok ((REGNO), (MODE))
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|
|
406
|
|
|
407 #define HARD_REGNO_RENAME_OK(FROM, TO) \
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|
|
408 s390_hard_regno_rename_ok (FROM, TO)
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|
|
409
|
|
|
410 #define MODES_TIEABLE_P(MODE1, MODE2) \
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|
|
411 (((MODE1) == SFmode || (MODE1) == DFmode) \
|
|
|
412 == ((MODE2) == SFmode || (MODE2) == DFmode))
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|
|
413
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|
|
414 /* Maximum number of registers to represent a value of mode MODE
|
|
|
415 in a register of class CLASS. */
|
|
|
416 #define CLASS_MAX_NREGS(CLASS, MODE) \
|
|
|
417 s390_class_max_nregs ((CLASS), (MODE))
|
|
|
418
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|
|
419 /* If a 4-byte value is loaded into a FPR, it is placed into the
|
|
|
420 *upper* half of the register, not the lower. Therefore, we
|
|
|
421 cannot use SUBREGs to switch between modes in FP registers.
|
|
|
422 Likewise for access registers, since they have only half the
|
|
|
423 word size on 64-bit. */
|
|
|
424 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
|
|
|
425 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
|
|
|
426 ? ((reg_classes_intersect_p (FP_REGS, CLASS) \
|
|
|
427 && (GET_MODE_SIZE (FROM) < 8 || GET_MODE_SIZE (TO) < 8)) \
|
|
|
428 || reg_classes_intersect_p (ACCESS_REGS, CLASS)) : 0)
|
|
|
429
|
|
|
430 /* Register classes. */
|
|
|
431
|
|
|
432 /* We use the following register classes:
|
|
|
433 GENERAL_REGS All general purpose registers
|
|
|
434 ADDR_REGS All general purpose registers except %r0
|
|
|
435 (These registers can be used in address generation)
|
|
|
436 FP_REGS All floating point registers
|
|
|
437 CC_REGS The condition code register
|
|
|
438 ACCESS_REGS The access registers
|
|
|
439
|
|
|
440 GENERAL_FP_REGS Union of GENERAL_REGS and FP_REGS
|
|
|
441 ADDR_FP_REGS Union of ADDR_REGS and FP_REGS
|
|
|
442 GENERAL_CC_REGS Union of GENERAL_REGS and CC_REGS
|
|
|
443 ADDR_CC_REGS Union of ADDR_REGS and CC_REGS
|
|
|
444
|
|
|
445 NO_REGS No registers
|
|
|
446 ALL_REGS All registers
|
|
|
447
|
|
|
448 Note that the 'fake' frame pointer and argument pointer registers
|
|
|
449 are included amongst the address registers here. */
|
|
|
450
|
|
|
451 enum reg_class
|
|
|
452 {
|
|
|
453 NO_REGS, CC_REGS, ADDR_REGS, GENERAL_REGS, ACCESS_REGS,
|
|
|
454 ADDR_CC_REGS, GENERAL_CC_REGS,
|
|
|
455 FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
|
|
|
456 ALL_REGS, LIM_REG_CLASSES
|
|
|
457 };
|
|
|
458 #define N_REG_CLASSES (int) LIM_REG_CLASSES
|
|
|
459
|
|
|
460 #define REG_CLASS_NAMES \
|
|
|
461 { "NO_REGS", "CC_REGS", "ADDR_REGS", "GENERAL_REGS", "ACCESS_REGS", \
|
|
|
462 "ADDR_CC_REGS", "GENERAL_CC_REGS", \
|
|
|
463 "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
|
|
|
464
|
|
|
465 /* Class -> register mapping. */
|
|
|
466 #define REG_CLASS_CONTENTS \
|
|
|
467 { \
|
|
|
468 { 0x00000000, 0x00000000 }, /* NO_REGS */ \
|
|
|
469 { 0x00000000, 0x00000002 }, /* CC_REGS */ \
|
|
|
470 { 0x0000fffe, 0x0000000d }, /* ADDR_REGS */ \
|
|
|
471 { 0x0000ffff, 0x0000000d }, /* GENERAL_REGS */ \
|
|
|
472 { 0x00000000, 0x00000030 }, /* ACCESS_REGS */ \
|
|
|
473 { 0x0000fffe, 0x0000000f }, /* ADDR_CC_REGS */ \
|
|
|
474 { 0x0000ffff, 0x0000000f }, /* GENERAL_CC_REGS */ \
|
|
|
475 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \
|
|
|
476 { 0xfffffffe, 0x0000000d }, /* ADDR_FP_REGS */ \
|
|
|
477 { 0xffffffff, 0x0000000d }, /* GENERAL_FP_REGS */ \
|
|
|
478 { 0xffffffff, 0x0000003f }, /* ALL_REGS */ \
|
|
|
479 }
|
|
|
480
|
|
|
481 /* The following macro defines cover classes for Integrated Register
|
|
|
482 Allocator. Cover classes is a set of non-intersected register
|
|
|
483 classes covering all hard registers used for register allocation
|
|
|
484 purpose. Any move between two registers of a cover class should be
|
|
|
485 cheaper than load or store of the registers. The macro value is
|
|
|
486 array of register classes with LIM_REG_CLASSES used as the end
|
|
|
487 marker. */
|
|
|
488
|
|
|
489 #define IRA_COVER_CLASSES \
|
|
|
490 { \
|
|
|
491 GENERAL_REGS, FP_REGS, CC_REGS, ACCESS_REGS, LIM_REG_CLASSES \
|
|
|
492 }
|
|
|
493
|
|
|
494 /* In some case register allocation order is not enough for IRA to
|
|
|
495 generate a good code. The following macro (if defined) increases
|
|
|
496 cost of REGNO for a pseudo approximately by pseudo usage frequency
|
|
|
497 multiplied by the macro value.
|
|
|
498
|
|
|
499 We avoid usage of BASE_REGNUM by nonzero macro value because the
|
|
|
500 reload can decide not to use the hard register because some
|
|
|
501 constant was forced to be in memory. */
|
|
|
502 #define IRA_HARD_REGNO_ADD_COST_MULTIPLIER(regno) \
|
|
|
503 (regno == BASE_REGNUM ? 0.0 : 0.5)
|
|
|
504
|
|
|
505 /* Register -> class mapping. */
|
|
|
506 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
|
|
|
507 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
|
|
|
508
|
|
|
509 /* ADDR_REGS can be used as base or index register. */
|
|
|
510 #define INDEX_REG_CLASS ADDR_REGS
|
|
|
511 #define BASE_REG_CLASS ADDR_REGS
|
|
|
512
|
|
|
513 /* Check whether REGNO is a hard register of the suitable class
|
|
|
514 or a pseudo register currently allocated to one such. */
|
|
|
515 #define REGNO_OK_FOR_INDEX_P(REGNO) \
|
|
|
516 (((REGNO) < FIRST_PSEUDO_REGISTER \
|
|
|
517 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
|
|
|
518 || ADDR_REGNO_P (reg_renumber[REGNO]))
|
|
|
519 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
|
|
|
520
|
|
|
521
|
|
|
522 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
|
|
|
523 return the class of reg to actually use. */
|
|
|
524 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
|
|
|
525 s390_preferred_reload_class ((X), (CLASS))
|
|
|
526
|
|
|
527 /* We need secondary memory to move data between GPRs and FPRs. With
|
|
|
528 DFP the ldgr lgdr instructions are available. But these
|
|
|
529 instructions do not handle GPR pairs so it is not possible for 31
|
|
|
530 bit. */
|
|
|
531 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
|
|
|
532 ((CLASS1) != (CLASS2) \
|
|
|
533 && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS) \
|
|
|
534 && (!TARGET_DFP || !TARGET_64BIT || GET_MODE_SIZE (MODE) != 8))
|
|
|
535
|
|
|
536 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
|
|
|
537 because the movsi and movsf patterns don't handle r/f moves. */
|
|
|
538 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
|
|
|
539 (GET_MODE_BITSIZE (MODE) < 32 \
|
|
|
540 ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
|
|
|
541 : MODE)
|
|
|
542
|
|
|
543
|
|
|
544 /* Stack layout and calling conventions. */
|
|
|
545
|
|
|
546 /* Our stack grows from higher to lower addresses. However, local variables
|
|
|
547 are accessed by positive offsets, and function arguments are stored at
|
|
|
548 increasing addresses. */
|
|
|
549 #define STACK_GROWS_DOWNWARD
|
|
|
550 #define FRAME_GROWS_DOWNWARD 1
|
|
|
551 /* #undef ARGS_GROW_DOWNWARD */
|
|
|
552
|
|
|
553 /* The basic stack layout looks like this: the stack pointer points
|
|
|
554 to the register save area for called functions. Above that area
|
|
|
555 is the location to place outgoing arguments. Above those follow
|
|
|
556 dynamic allocations (alloca), and finally the local variables. */
|
|
|
557
|
|
|
558 /* Offset from stack-pointer to first location of outgoing args. */
|
|
|
559 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
|
|
|
560
|
|
|
561 /* Offset within stack frame to start allocating local variables at. */
|
|
|
562 #define STARTING_FRAME_OFFSET 0
|
|
|
563
|
|
|
564 /* Offset from the stack pointer register to an item dynamically
|
|
|
565 allocated on the stack, e.g., by `alloca'. */
|
|
|
566 #define STACK_DYNAMIC_OFFSET(FUNDECL) \
|
|
|
567 (STACK_POINTER_OFFSET + crtl->outgoing_args_size)
|
|
|
568
|
|
|
569 /* Offset of first parameter from the argument pointer register value.
|
|
|
570 We have a fake argument pointer register that points directly to
|
|
|
571 the argument area. */
|
|
|
572 #define FIRST_PARM_OFFSET(FNDECL) 0
|
|
|
573
|
|
|
574 /* Defining this macro makes __builtin_frame_address(0) and
|
|
|
575 __builtin_return_address(0) work with -fomit-frame-pointer. */
|
|
|
576 #define INITIAL_FRAME_ADDRESS_RTX \
|
|
|
577 (plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
|
|
|
578
|
|
|
579 /* The return address of the current frame is retrieved
|
|
|
580 from the initial value of register RETURN_REGNUM.
|
|
|
581 For frames farther back, we use the stack slot where
|
|
|
582 the corresponding RETURN_REGNUM register was saved. */
|
|
|
583 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \
|
|
|
584 (TARGET_PACKED_STACK ? \
|
|
|
585 plus_constant ((FRAME), STACK_POINTER_OFFSET - UNITS_PER_WORD) : (FRAME))
|
|
|
586
|
|
|
587 /* For -mpacked-stack this adds 160 - 8 (96 - 4) to the output of
|
|
|
588 builtin_frame_address. Otherwise arg pointer -
|
|
|
589 STACK_POINTER_OFFSET would be returned for
|
|
|
590 __builtin_frame_address(0) what might result in an address pointing
|
|
|
591 somewhere into the middle of the local variables since the packed
|
|
|
592 stack layout generally does not need all the bytes in the register
|
|
|
593 save area. */
|
|
|
594 #define FRAME_ADDR_RTX(FRAME) \
|
|
|
595 DYNAMIC_CHAIN_ADDRESS ((FRAME))
|
|
|
596
|
|
|
597 #define RETURN_ADDR_RTX(COUNT, FRAME) \
|
|
|
598 s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
|
|
|
599
|
|
|
600 /* In 31-bit mode, we need to mask off the high bit of return addresses. */
|
|
|
601 #define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
|
|
|
602
|
|
|
603
|
|
|
604 /* Exception handling. */
|
|
|
605
|
|
|
606 /* Describe calling conventions for DWARF-2 exception handling. */
|
|
|
607 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
|
|
|
608 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
|
|
|
609 #define DWARF_FRAME_RETURN_COLUMN 14
|
|
|
610
|
|
|
611 /* Describe how we implement __builtin_eh_return. */
|
|
|
612 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
|
|
|
613 #define EH_RETURN_HANDLER_RTX gen_rtx_MEM (Pmode, return_address_pointer_rtx)
|
|
|
614
|
|
|
615 /* Select a format to encode pointers in exception handling data. */
|
|
|
616 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
|
|
|
617 (flag_pic \
|
|
|
618 ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
|
|
|
619 : DW_EH_PE_absptr)
|
|
|
620
|
|
|
621
|
|
|
622 /* Frame registers. */
|
|
|
623
|
|
|
624 #define STACK_POINTER_REGNUM 15
|
|
|
625 #define FRAME_POINTER_REGNUM 34
|
|
|
626 #define HARD_FRAME_POINTER_REGNUM 11
|
|
|
627 #define ARG_POINTER_REGNUM 32
|
|
|
628 #define RETURN_ADDRESS_POINTER_REGNUM 35
|
|
|
629
|
|
|
630 /* The static chain must be call-clobbered, but not used for
|
|
|
631 function argument passing. As register 1 is clobbered by
|
|
|
632 the trampoline code, we only have one option. */
|
|
|
633 #define STATIC_CHAIN_REGNUM 0
|
|
|
634
|
|
|
635 /* Number of hardware registers that go into the DWARF-2 unwind info.
|
|
|
636 To avoid ABI incompatibility, this number must not change even as
|
|
|
637 'fake' hard registers are added or removed. */
|
|
|
638 #define DWARF_FRAME_REGISTERS 34
|
|
|
639
|
|
|
640
|
|
|
641 /* Frame pointer and argument pointer elimination. */
|
|
|
642
|
|
|
643 #define FRAME_POINTER_REQUIRED 0
|
|
|
644
|
|
|
645 #define ELIMINABLE_REGS \
|
|
|
646 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
|
|
|
647 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
|
|
|
648 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
|
|
|
649 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
|
|
|
650 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
|
|
|
651 { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
|
|
|
652 { BASE_REGNUM, BASE_REGNUM }}
|
|
|
653
|
|
|
654 #define CAN_ELIMINATE(FROM, TO) \
|
|
|
655 s390_can_eliminate ((FROM), (TO))
|
|
|
656
|
|
|
657 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
|
|
|
658 (OFFSET) = s390_initial_elimination_offset ((FROM), (TO))
|
|
|
659
|
|
|
660
|
|
|
661 /* Stack arguments. */
|
|
|
662
|
|
|
663 /* We need current_function_outgoing_args to be valid. */
|
|
|
664 #define ACCUMULATE_OUTGOING_ARGS 1
|
|
|
665
|
|
|
666 /* Return doesn't modify the stack. */
|
|
|
667 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
|
|
|
668
|
|
|
669
|
|
|
670 /* Register arguments. */
|
|
|
671
|
|
|
672 typedef struct s390_arg_structure
|
|
|
673 {
|
|
|
674 int gprs; /* gpr so far */
|
|
|
675 int fprs; /* fpr so far */
|
|
|
676 }
|
|
|
677 CUMULATIVE_ARGS;
|
|
|
678
|
|
|
679 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \
|
|
|
680 ((CUM).gprs=0, (CUM).fprs=0)
|
|
|
681
|
|
|
682 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
|
|
|
683 s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
|
|
|
684
|
|
|
685 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
|
|
|
686 s390_function_arg (&CUM, MODE, TYPE, NAMED)
|
|
|
687
|
|
|
688 /* Arguments can be placed in general registers 2 to 6, or in floating
|
|
|
689 point registers 0 and 2 for 31 bit and fprs 0, 2, 4 and 6 for 64
|
|
|
690 bit. */
|
|
|
691 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
|
|
|
692 (N) == 16 || (N) == 17 || (TARGET_64BIT && ((N) == 18 || (N) == 19)))
|
|
|
693
|
|
|
694
|
|
|
695 /* Scalar return values. */
|
|
|
696
|
|
|
697 #define FUNCTION_VALUE(VALTYPE, FUNC) \
|
|
|
698 s390_function_value ((VALTYPE), VOIDmode)
|
|
|
699
|
|
|
700 #define LIBCALL_VALUE(MODE) \
|
|
|
701 s390_function_value (NULL, (MODE))
|
|
|
702
|
|
|
703 /* Only gpr 2 and fpr 0 are ever used as return registers. */
|
|
|
704 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
|
|
|
705
|
|
|
706
|
|
|
707 /* Function entry and exit. */
|
|
|
708
|
|
|
709 /* When returning from a function, the stack pointer does not matter. */
|
|
|
710 #define EXIT_IGNORE_STACK 1
|
|
|
711
|
|
|
712
|
|
|
713 /* Profiling. */
|
|
|
714
|
|
|
715 #define FUNCTION_PROFILER(FILE, LABELNO) \
|
|
|
716 s390_function_profiler ((FILE), ((LABELNO)))
|
|
|
717
|
|
|
718 #define PROFILE_BEFORE_PROLOGUE 1
|
|
|
719
|
|
|
720
|
|
|
721 /* Trampolines for nested functions. */
|
|
|
722
|
|
|
723 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 32 : 16)
|
|
|
724
|
|
|
725 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
|
|
|
726 s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
|
|
|
727
|
|
|
728 #define TRAMPOLINE_TEMPLATE(FILE) \
|
|
|
729 s390_trampoline_template (FILE)
|
|
|
730
|
|
|
731
|
|
|
732 /* Addressing modes, and classification of registers for them. */
|
|
|
733
|
|
|
734 /* Recognize any constant value that is a valid address. */
|
|
|
735 #define CONSTANT_ADDRESS_P(X) 0
|
|
|
736
|
|
|
737 /* Maximum number of registers that can appear in a valid memory address. */
|
|
|
738 #define MAX_REGS_PER_ADDRESS 2
|
|
|
739
|
|
|
740 /* This definition replaces the formerly used 'm' constraint with a
|
|
|
741 different constraint letter in order to avoid changing semantics of
|
|
|
742 the 'm' constraint when accepting new address formats in
|
|
|
743 legitimate_address_p. The constraint letter defined here must not be
|
|
|
744 used in insn definitions or inline assemblies. */
|
|
|
745 #define TARGET_MEM_CONSTRAINT 'e'
|
|
|
746
|
|
|
747 /* S/390 has no mode dependent addresses. */
|
|
|
748 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
|
|
|
749
|
|
|
750 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
|
|
|
751 valid memory address for an instruction.
|
|
|
752 The MODE argument is the machine mode for the MEM expression
|
|
|
753 that wants to use this address. */
|
|
|
754 #ifdef REG_OK_STRICT
|
|
|
755 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
|
|
|
756 { \
|
|
|
757 if (legitimate_address_p (MODE, X, 1)) \
|
|
|
758 goto ADDR; \
|
|
|
759 }
|
|
|
760 #else
|
|
|
761 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
|
|
|
762 { \
|
|
|
763 if (legitimate_address_p (MODE, X, 0)) \
|
|
|
764 goto ADDR; \
|
|
|
765 }
|
|
|
766 #endif
|
|
|
767
|
|
|
768 /* Try machine-dependent ways of modifying an illegitimate address
|
|
|
769 to be legitimate. If we find one, return the new, valid address.
|
|
|
770 This macro is used in only one place: `memory_address' in explow.c. */
|
|
|
771 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
|
|
|
772 { \
|
|
|
773 (X) = legitimize_address (X, OLDX, MODE); \
|
|
|
774 if (memory_address_p (MODE, X)) \
|
|
|
775 goto WIN; \
|
|
|
776 }
|
|
|
777
|
|
|
778 /* Try a machine-dependent way of reloading an illegitimate address
|
|
|
779 operand. If we find one, push the reload and jump to WIN. This
|
|
|
780 macro is used in only one place: `find_reloads_address' in reload.c. */
|
|
|
781 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
|
|
|
782 do { \
|
|
|
783 rtx new_rtx = legitimize_reload_address (AD, MODE, OPNUM, (int)(TYPE)); \
|
|
|
784 if (new_rtx) \
|
|
|
785 { \
|
|
|
786 (AD) = new_rtx; \
|
|
|
787 goto WIN; \
|
|
|
788 } \
|
|
|
789 } while (0)
|
|
|
790
|
|
|
791 /* Nonzero if the constant value X is a legitimate general operand.
|
|
|
792 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
|
|
|
793 #define LEGITIMATE_CONSTANT_P(X) \
|
|
|
794 legitimate_constant_p (X)
|
|
|
795
|
|
|
796 /* Helper macro for s390.c and s390.md to check for symbolic constants. */
|
|
|
797 #define SYMBOLIC_CONST(X) \
|
|
|
798 (GET_CODE (X) == SYMBOL_REF \
|
|
|
799 || GET_CODE (X) == LABEL_REF \
|
|
|
800 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
|
|
|
801
|
|
|
802 #define TLS_SYMBOLIC_CONST(X) \
|
|
|
803 ((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X)) \
|
|
|
804 || (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X)))
|
|
|
805
|
|
|
806
|
|
|
807 /* Condition codes. */
|
|
|
808
|
|
|
809 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
|
|
|
810 return the mode to be used for the comparison. */
|
|
|
811 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
|
|
|
812
|
|
|
813 /* Canonicalize a comparison from one we don't have to one we do have. */
|
|
|
814 #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) \
|
|
|
815 s390_canonicalize_comparison (&(CODE), &(OP0), &(OP1))
|
|
|
816
|
|
|
817 /* Define the information needed to generate branch and scc insns. This is
|
|
|
818 stored from the compare operation. Note that we can't use "rtx" here
|
|
|
819 since it hasn't been defined! */
|
|
|
820 extern struct rtx_def *s390_compare_op0, *s390_compare_op1, *s390_compare_emitted;
|
|
|
821
|
|
|
822
|
|
|
823 /* Relative costs of operations. */
|
|
|
824
|
|
|
825 /* On s390, copy between fprs and gprs is expensive. */
|
|
|
826 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
|
|
|
827 (( ( reg_classes_intersect_p ((CLASS1), GENERAL_REGS) \
|
|
|
828 && reg_classes_intersect_p ((CLASS2), FP_REGS)) \
|
|
|
829 || ( reg_classes_intersect_p ((CLASS1), FP_REGS) \
|
|
|
830 && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
|
|
|
831
|
|
|
832 /* A C expression for the cost of moving data of mode M between a
|
|
|
833 register and memory. A value of 2 is the default; this cost is
|
|
|
834 relative to those in `REGISTER_MOVE_COST'. */
|
|
|
835 #define MEMORY_MOVE_COST(M, C, I) 1
|
|
|
836
|
|
|
837 /* A C expression for the cost of a branch instruction. A value of 1
|
|
|
838 is the default; other values are interpreted relative to that. */
|
|
|
839 #define BRANCH_COST(speed_p, predictable_p) 1
|
|
|
840
|
|
|
841 /* Nonzero if access to memory by bytes is slow and undesirable. */
|
|
|
842 #define SLOW_BYTE_ACCESS 1
|
|
|
843
|
|
|
844 /* An integer expression for the size in bits of the largest integer machine
|
|
|
845 mode that should actually be used. We allow pairs of registers. */
|
|
|
846 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode)
|
|
|
847
|
|
|
848 /* The maximum number of bytes that a single instruction can move quickly
|
|
|
849 between memory and registers or between two memory locations. */
|
|
|
850 #define MOVE_MAX (TARGET_64BIT ? 16 : 8)
|
|
|
851 #define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4)
|
|
|
852 #define MAX_MOVE_MAX 16
|
|
|
853
|
|
|
854 /* Determine whether to use move_by_pieces or block move insn. */
|
|
|
855 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
|
|
|
856 ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4 \
|
|
|
857 || (TARGET_64BIT && (SIZE) == 8) )
|
|
|
858
|
|
|
859 /* Determine whether to use clear_by_pieces or block clear insn. */
|
|
|
860 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
|
|
|
861 ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4 \
|
|
|
862 || (TARGET_64BIT && (SIZE) == 8) )
|
|
|
863
|
|
|
864 /* This macro is used to determine whether store_by_pieces should be
|
|
|
865 called to "memcpy" storage when the source is a constant string. */
|
|
|
866 #define STORE_BY_PIECES_P(SIZE, ALIGN) MOVE_BY_PIECES_P (SIZE, ALIGN)
|
|
|
867
|
|
|
868 /* Likewise to decide whether to "memset" storage with byte values
|
|
|
869 other than zero. */
|
|
|
870 #define SET_BY_PIECES_P(SIZE, ALIGN) STORE_BY_PIECES_P (SIZE, ALIGN)
|
|
|
871
|
|
|
872 /* Don't perform CSE on function addresses. */
|
|
|
873 #define NO_FUNCTION_CSE
|
|
|
874
|
|
|
875 /* This value is used in tree-sra to decide whether it might benefical
|
|
|
876 to split a struct move into several word-size moves. For S/390
|
|
|
877 only small values make sense here since struct moves are relatively
|
|
|
878 cheap thanks to mvc so the small default value choosen for archs
|
|
|
879 with memmove patterns should be ok. But this value is multiplied
|
|
|
880 in tree-sra with UNITS_PER_WORD to make a decision so we adjust it
|
|
|
881 here to compensate for that factor since mvc costs exactly the same
|
|
|
882 on 31 and 64 bit. */
|
|
|
883 #define MOVE_RATIO(speed) (TARGET_64BIT? 2 : 4)
|
|
|
884
|
|
|
885
|
|
|
886 /* Sections. */
|
|
|
887
|
|
|
888 /* Output before read-only data. */
|
|
|
889 #define TEXT_SECTION_ASM_OP ".text"
|
|
|
890
|
|
|
891 /* Output before writable (initialized) data. */
|
|
|
892 #define DATA_SECTION_ASM_OP ".data"
|
|
|
893
|
|
|
894 /* Output before writable (uninitialized) data. */
|
|
|
895 #define BSS_SECTION_ASM_OP ".bss"
|
|
|
896
|
|
|
897 /* S/390 constant pool breaks the devices in crtstuff.c to control section
|
|
|
898 in where code resides. We have to write it as asm code. */
|
|
|
899 #ifndef __s390x__
|
|
|
900 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
|
|
|
901 asm (SECTION_OP "\n\
|
|
|
902 bras\t%r2,1f\n\
|
|
|
903 0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
|
|
|
904 1: l\t%r3,0(%r2)\n\
|
|
|
905 bas\t%r14,0(%r3,%r2)\n\
|
|
|
906 .previous");
|
|
|
907 #endif
|
|
|
908
|
|
|
909
|
|
|
910 /* Position independent code. */
|
|
|
911
|
|
|
912 extern int flag_pic;
|
|
|
913
|
|
|
914 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
|
|
|
915
|
|
|
916 #define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X)
|
|
|
917
|
|
|
918
|
|
|
919 /* Assembler file format. */
|
|
|
920
|
|
|
921 /* Character to start a comment. */
|
|
|
922 #define ASM_COMMENT_START "#"
|
|
|
923
|
|
|
924 /* Declare an uninitialized external linkage data object. */
|
|
|
925 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
|
|
|
926 asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
|
|
|
927
|
|
|
928 /* Globalizing directive for a label. */
|
|
|
929 #define GLOBAL_ASM_OP ".globl "
|
|
|
930
|
|
|
931 /* Advance the location counter to a multiple of 2**LOG bytes. */
|
|
|
932 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
|
|
|
933 if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
|
|
|
934
|
|
|
935 /* Advance the location counter by SIZE bytes. */
|
|
|
936 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
|
|
|
937 fprintf ((FILE), "\t.set\t.,.+"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
|
|
|
938
|
|
|
939 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h. */
|
|
|
940 #define LOCAL_LABEL_PREFIX "."
|
|
|
941
|
|
|
942 /* How to refer to registers in assembler output. This sequence is
|
|
|
943 indexed by compiler's hard-register-number (see above). */
|
|
|
944 #define REGISTER_NAMES \
|
|
|
945 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
|
|
|
946 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
|
|
|
947 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
|
|
|
948 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
|
|
|
949 "%ap", "%cc", "%fp", "%rp", "%a0", "%a1" \
|
|
|
950 }
|
|
|
951
|
|
|
952 /* Print operand X (an rtx) in assembler syntax to file FILE. */
|
|
|
953 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
|
|
|
954 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
|
|
|
955
|
|
|
956 /* Output machine-dependent UNSPECs in address constants. */
|
|
|
957 #define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \
|
|
|
958 do { \
|
|
|
959 if (!s390_output_addr_const_extra (FILE, (X))) \
|
|
|
960 goto FAIL; \
|
|
|
961 } while (0);
|
|
|
962
|
|
|
963 /* Output an element of a case-vector that is absolute. */
|
|
|
964 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
|
|
|
965 do { \
|
|
|
966 char buf[32]; \
|
|
|
967 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
|
|
|
968 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
|
|
|
969 assemble_name ((FILE), buf); \
|
|
|
970 fputc ('\n', (FILE)); \
|
|
|
971 } while (0)
|
|
|
972
|
|
|
973 /* Output an element of a case-vector that is relative. */
|
|
|
974 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
|
|
|
975 do { \
|
|
|
976 char buf[32]; \
|
|
|
977 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
|
|
|
978 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
|
|
|
979 assemble_name ((FILE), buf); \
|
|
|
980 fputc ('-', (FILE)); \
|
|
|
981 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL)); \
|
|
|
982 assemble_name ((FILE), buf); \
|
|
|
983 fputc ('\n', (FILE)); \
|
|
|
984 } while (0)
|
|
|
985
|
|
|
986
|
|
|
987 /* Miscellaneous parameters. */
|
|
|
988
|
|
|
989 /* Specify the machine mode that this machine uses for the index in the
|
|
|
990 tablejump instruction. */
|
|
|
991 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
|
|
|
992
|
|
|
993 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
|
|
|
994 is done just by pretending it is already truncated. */
|
|
|
995 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
|
|
|
996
|
|
|
997 /* Specify the machine mode that pointers have.
|
|
|
998 After generation of rtl, the compiler makes no further distinction
|
|
|
999 between pointers and any other objects of this machine mode. */
|
|
|
1000 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
|
|
|
1001
|
|
|
1002 /* This is -1 for "pointer mode" extend. See ptr_extend in s390.md. */
|
|
|
1003 #define POINTERS_EXTEND_UNSIGNED -1
|
|
|
1004
|
|
|
1005 /* A function address in a call instruction is a byte address (for
|
|
|
1006 indexing purposes) so give the MEM rtx a byte's mode. */
|
|
|
1007 #define FUNCTION_MODE QImode
|
|
|
1008
|
|
|
1009 /* Specify the value which is used when clz operand is zero. */
|
|
|
1010 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
|
|
|
1011
|
|
|
1012 /* Machine-specific symbol_ref flags. */
|
|
|
1013 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
|
|
|
1014 #define SYMBOL_REF_ALIGN1_P(X) \
|
|
|
1015 ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ALIGN1))
|
|
|
1016 #define SYMBOL_FLAG_NOT_NATURALLY_ALIGNED (SYMBOL_FLAG_MACH_DEP << 1)
|
|
|
1017 #define SYMBOL_REF_NOT_NATURALLY_ALIGNED_P(X) \
|
|
|
1018 ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_NOT_NATURALLY_ALIGNED))
|
|
|
1019
|
|
|
1020 /* Check whether integer displacement is in range. */
|
|
|
1021 #define DISP_IN_RANGE(d) \
|
|
|
1022 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
|
|
|
1023 : ((d) >= 0 && (d) <= 4095))
|
|
|
1024
|
|
|
1025 #endif
|
