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1 /* DWARF2 EH unwinding support for SPARC Linux.
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2 Copyright 2004, 2005, 2009 Free Software Foundation, Inc.
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3
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4 This file is part of GCC.
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5
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6 GCC is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 3, or (at your option)
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9 any later version.
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10
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11 GCC is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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15
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16 Under Section 7 of GPL version 3, you are granted additional
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17 permissions described in the GCC Runtime Library Exception, version
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18 3.1, as published by the Free Software Foundation.
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19
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20 You should have received a copy of the GNU General Public License and
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21 a copy of the GCC Runtime Library Exception along with this program;
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22 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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23 <http://www.gnu.org/licenses/>. */
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24
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25
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26 /* Do code reading to identify a signal frame, and set the frame
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27 state data appropriately. See unwind-dw2.c for the structs. */
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28
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29 /* Handle multilib correctly. */
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30 #if defined(__arch64__)
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31
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32 /* 64-bit SPARC version */
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33 #define MD_FALLBACK_FRAME_STATE_FOR sparc64_fallback_frame_state
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34
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35 static _Unwind_Reason_Code
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36 sparc64_fallback_frame_state (struct _Unwind_Context *context,
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37 _Unwind_FrameState *fs)
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38 {
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39 unsigned int *pc = context->ra;
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40 long new_cfa, i;
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41 long regs_off, fpu_save_off;
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42 long this_cfa, fpu_save;
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43
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44 if (pc[0] != 0x82102065 /* mov NR_rt_sigreturn, %g1 */
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45 || pc[1] != 0x91d0206d) /* ta 0x6d */
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46 return _URC_END_OF_STACK;
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47 regs_off = 192 + 128;
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48 fpu_save_off = regs_off + (16 * 8) + (3 * 8) + (2 * 4);
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49 this_cfa = (long) context->cfa;
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50 new_cfa = *(long *)((context->cfa) + (regs_off + (14 * 8)));
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51 new_cfa += 2047; /* Stack bias */
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52 fpu_save = *(long *)((this_cfa) + (fpu_save_off));
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53 fs->regs.cfa_how = CFA_REG_OFFSET;
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54 fs->regs.cfa_reg = 14;
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55 fs->regs.cfa_offset = new_cfa - (long) context->cfa;
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56 for (i = 1; i < 16; ++i)
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57 {
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58 fs->regs.reg[i].how = REG_SAVED_OFFSET;
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59 fs->regs.reg[i].loc.offset =
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60 this_cfa + (regs_off + (i * 8)) - new_cfa;
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61 }
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62 for (i = 0; i < 16; ++i)
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63 {
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64 fs->regs.reg[i + 16].how = REG_SAVED_OFFSET;
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65 fs->regs.reg[i + 16].loc.offset =
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66 this_cfa + (i * 8) - new_cfa;
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67 }
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68 if (fpu_save)
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69 {
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70 for (i = 0; i < 64; ++i)
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71 {
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72 if (i > 32 && (i & 0x1))
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73 continue;
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74 fs->regs.reg[i + 32].how = REG_SAVED_OFFSET;
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75 fs->regs.reg[i + 32].loc.offset =
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76 (fpu_save + (i * 4)) - new_cfa;
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77 }
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78 }
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79 /* Stick return address into %g0, same trick Alpha uses. */
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80 fs->regs.reg[0].how = REG_SAVED_OFFSET;
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81 fs->regs.reg[0].loc.offset =
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82 this_cfa + (regs_off + (16 * 8) + 8) - new_cfa;
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83 fs->retaddr_column = 0;
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84 return _URC_NO_REASON;
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85 }
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86
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87 #else
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88
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89 /* 32-bit SPARC version */
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90 #define MD_FALLBACK_FRAME_STATE_FOR sparc_fallback_frame_state
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91
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92 static _Unwind_Reason_Code
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93 sparc_fallback_frame_state (struct _Unwind_Context *context,
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94 _Unwind_FrameState *fs)
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95 {
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96 unsigned int *pc = context->ra;
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97 int new_cfa, i, oldstyle;
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98 int regs_off, fpu_save_off;
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99 int fpu_save, this_cfa;
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100
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101 if (pc[1] != 0x91d02010) /* ta 0x10 */
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102 return _URC_END_OF_STACK;
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103 if (pc[0] == 0x821020d8) /* mov NR_sigreturn, %g1 */
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104 oldstyle = 1;
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105 else if (pc[0] == 0x82102065) /* mov NR_rt_sigreturn, %g1 */
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106 oldstyle = 0;
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107 else
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108 return _URC_END_OF_STACK;
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109 if (oldstyle)
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110 {
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111 regs_off = 96;
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112 fpu_save_off = regs_off + (4 * 4) + (16 * 4);
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113 }
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114 else
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115 {
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116 regs_off = 96 + 128;
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117 fpu_save_off = regs_off + (4 * 4) + (16 * 4) + (2 * 4);
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118 }
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119 this_cfa = (int) context->cfa;
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120 new_cfa = *(int *)((context->cfa) + (regs_off+(4*4)+(14 * 4)));
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121 fpu_save = *(int *)((this_cfa) + (fpu_save_off));
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122 fs->regs.cfa_how = CFA_REG_OFFSET;
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123 fs->regs.cfa_reg = 14;
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124 fs->regs.cfa_offset = new_cfa - (int) context->cfa;
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125 for (i = 1; i < 16; ++i)
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126 {
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127 if (i == 14)
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128 continue;
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129 fs->regs.reg[i].how = REG_SAVED_OFFSET;
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130 fs->regs.reg[i].loc.offset =
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131 this_cfa + (regs_off+(4 * 4)+(i * 4)) - new_cfa;
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132 }
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133 for (i = 0; i < 16; ++i)
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134 {
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135 fs->regs.reg[i + 16].how = REG_SAVED_OFFSET;
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136 fs->regs.reg[i + 16].loc.offset =
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137 this_cfa + (i * 4) - new_cfa;
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138 }
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139 if (fpu_save)
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140 {
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141 for (i = 0; i < 32; ++i)
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142 {
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143 fs->regs.reg[i + 32].how = REG_SAVED_OFFSET;
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144 fs->regs.reg[i + 32].loc.offset =
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145 (fpu_save + (i * 4)) - new_cfa;
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146 }
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147 }
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148 /* Stick return address into %g0, same trick Alpha uses. */
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149 fs->regs.reg[0].how = REG_SAVED_OFFSET;
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150 fs->regs.reg[0].loc.offset = this_cfa+(regs_off+4)-new_cfa;
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151 fs->retaddr_column = 0;
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152 return _URC_NO_REASON;
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153 }
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154
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155 #endif
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