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1 /* Definitions of target machine for GCC, for Sun SPARC.
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2 Copyright (C) 2002, 2004, 2007 Free Software Foundation, Inc.
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3 Contributed by Michael Tiemann (tiemann@cygnus.com).
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4 64 bit SPARC V9 support by Michael Tiemann, Jim Wilson, and Doug Evans,
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5 at Cygnus Support.
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6
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7 This file is part of GCC.
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8
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9 GCC is free software; you can redistribute it and/or modify
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10 it under the terms of the GNU General Public License as published by
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11 the Free Software Foundation; either version 3, or (at your option)
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12 any later version.
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13
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14 GCC is distributed in the hope that it will be useful,
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15 but WITHOUT ANY WARRANTY; without even the implied warranty of
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16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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17 GNU General Public License for more details.
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18
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19 You should have received a copy of the GNU General Public License
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20 along with GCC; see the file COPYING3. If not see
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21 <http://www.gnu.org/licenses/>. */
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22
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23 /* 128-bit floating point */
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24 FLOAT_MODE (TF, 16, ieee_quad_format);
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25
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26 /* Add any extra modes needed to represent the condition code.
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27
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28 On the SPARC, we have a "no-overflow" mode which is used when an add or
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29 subtract insn is used to set the condition code. Different branches are
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30 used in this case for some operations.
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31
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32 We also have two modes to indicate that the relevant condition code is
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33 in the floating-point condition code register. One for comparisons which
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34 will generate an exception if the result is unordered (CCFPEmode) and
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35 one for comparisons which will never trap (CCFPmode).
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36
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37 CCXmode and CCX_NOOVmode are only used by v9. */
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38
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39 CC_MODE (CCX);
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40 CC_MODE (CC_NOOV);
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41 CC_MODE (CCX_NOOV);
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42 CC_MODE (CCFP);
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43 CC_MODE (CCFPE);
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44
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45 /* Vector modes. */
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46 VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */
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47 VECTOR_MODES (INT, 4); /* V4QI V2HI */
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