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1 ;; Constraint definitions for Xtensa.
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2 ;; Copyright (C) 2006, 2007 Free Software Foundation, Inc.
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3 ;;
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4 ;; This file is part of GCC.
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5 ;;
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6 ;; GCC is free software; you can redistribute it and/or modify
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7 ;; it under the terms of the GNU General Public License as published by
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8 ;; the Free Software Foundation; either version 3, or (at your option)
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9 ;; any later version.
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10 ;;
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11 ;; GCC is distributed in the hope that it will be useful,
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12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 ;; GNU General Public License for more details.
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15 ;;
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16 ;; You should have received a copy of the GNU General Public License
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17 ;; along with GCC; see the file COPYING3. If not see
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18 ;; <http://www.gnu.org/licenses/>.
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19
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20 ;; Register constraints.
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21
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22 (define_register_constraint "a" "GR_REGS"
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23 "General-purpose AR registers @code{a0}-@code{a15},
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24 except @code{a1} (@code{sp}).")
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25
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26 (define_register_constraint "b" "TARGET_BOOLEANS ? BR_REGS : NO_REGS"
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27 "Boolean registers @code{b0}-@code{b15}; only available if the Xtensa
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28 Boolean Option is configured.")
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29
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30 (define_register_constraint "d" "TARGET_DENSITY ? AR_REGS: NO_REGS"
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31 "@internal
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32 All AR registers, including sp, but only if the Xtensa Code Density
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33 Option is configured.")
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34
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35 (define_register_constraint "f" "TARGET_HARD_FLOAT ? FP_REGS : NO_REGS"
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36 "Floating-point registers @code{f0}-@code{f15}; only available if the
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37 Xtensa Floating-Pointer Coprocessor is configured.")
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38
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39 (define_register_constraint "q" "SP_REG"
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40 "@internal
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41 The stack pointer (register @code{a1}).")
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42
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43 (define_register_constraint "A" "TARGET_MAC16 ? ACC_REG : NO_REGS"
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44 "The low 32 bits of the accumulator from the Xtensa MAC16 Option.")
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45
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46 (define_register_constraint "B" "TARGET_SEXT ? GR_REGS : NO_REGS"
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47 "@internal
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48 General-purpose AR registers, but only if the Xtensa Sign Extend
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49 Option is configured.")
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50
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51 (define_register_constraint "C" "TARGET_MUL16 ? GR_REGS: NO_REGS"
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52 "@internal
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53 General-purpose AR registers, but only if the Xtensa 16-Bit Integer
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54 Multiply Option is configured.")
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55
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56 (define_register_constraint "D" "TARGET_DENSITY ? GR_REGS: NO_REGS"
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57 "@internal
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58 General-purpose AR registers, but only if the Xtensa Code Density
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59 Option is configured.")
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60
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61 (define_register_constraint "W" "TARGET_CONST16 ? GR_REGS: NO_REGS"
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62 "@internal
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63 General-purpose AR registers, but only if the Xtensa Const16
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64 Option is configured.")
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65
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66 ;; Integer constant constraints.
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67
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68 (define_constraint "I"
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69 "A signed 12-bit integer constant for use with MOVI instructions."
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70 (and (match_code "const_int")
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71 (match_test "xtensa_simm12b (ival)")))
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72
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73 (define_constraint "J"
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74 "A signed 8-bit integer constant for use with ADDI instructions."
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75 (and (match_code "const_int")
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76 (match_test "xtensa_simm8 (ival)")))
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77
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78 (define_constraint "K"
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79 "A constant integer that can be an immediate operand of an Xtensa
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80 conditional branch instruction that performs a signed comparison or
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81 a comparison against zero."
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82 (and (match_code "const_int")
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83 (match_test "xtensa_b4const_or_zero (ival)")))
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84
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85 (define_constraint "L"
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86 "A constant integer that can be an immediate operand of an Xtensa
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87 conditional branch instruction that performs an unsigned comparison."
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88 (and (match_code "const_int")
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89 (match_test "xtensa_b4constu (ival)")))
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90
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91 (define_constraint "M"
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92 "An integer constant in the range @minus{}32-95 for use with MOVI.N
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93 instructions."
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94 (and (match_code "const_int")
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95 (match_test "ival >= -32 && ival <= 95")))
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96
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97 (define_constraint "N"
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98 "An unsigned 8-bit integer constant shifted left by 8 bits for use
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99 with ADDMI instructions."
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100 (and (match_code "const_int")
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101 (match_test "xtensa_simm8x256 (ival)")))
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102
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103 (define_constraint "O"
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104 "An integer constant that can be used in ADDI.N instructions."
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105 (and (match_code "const_int")
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106 (match_test "ival == -1 || (ival >= 1 && ival <= 15)")))
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107
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108 (define_constraint "P"
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109 "An integer constant that can be used as a mask value in an EXTUI
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110 instruction."
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111 (and (match_code "const_int")
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112 (match_test "xtensa_mask_immediate (ival)")))
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113
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114 ;; Memory constraints. Do not use define_memory_constraint here. Doing so
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115 ;; causes reload to force some constants into the constant pool, but since
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116 ;; the Xtensa constant pool can only be accessed with L32R instructions, it
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117 ;; is always better to just copy a constant into a register. Instead, use
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118 ;; regular constraints but add a check to allow pseudos during reload.
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119
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120 (define_constraint "R"
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121 "Memory that can be accessed with a 4-bit unsigned offset from a register."
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122 (ior (and (match_code "mem")
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123 (match_test "smalloffset_mem_p (op)"))
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124 (and (match_code "reg")
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125 (match_test "reload_in_progress
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126 && REGNO (op) >= FIRST_PSEUDO_REGISTER"))))
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127
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128 (define_constraint "T"
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129 "Memory in a literal pool (addressable with an L32R instruction)."
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130 (and (match_code "mem")
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131 (match_test "!TARGET_CONST16 && constantpool_mem_p (op)")))
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132
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133 (define_constraint "U"
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134 "Memory that is not in a literal pool."
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135 (ior (and (match_code "mem")
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136 (match_test "! constantpool_mem_p (op)"))
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137 (and (match_code "reg")
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138 (match_test "reload_in_progress
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139 && REGNO (op) >= FIRST_PSEUDO_REGISTER"))))
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