Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/avr/avr.h @ 63:b7f97abdc517 gcc-4.6-20100522
update gcc from gcc-4.5.0 to gcc-4.6
author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
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date | Mon, 24 May 2010 12:47:05 +0900 |
parents | 77e2b8dfacca |
children | f6334be47118 |
rev | line source |
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0 | 1 /* Definitions of target machine for GNU compiler, |
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers. | |
3 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, | |
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4 2008, 2009, 2010 |
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5 Free Software Foundation, Inc. |
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6 Contributed by Denis Chertykov (chertykov@gmail.com) |
0 | 7 |
8 This file is part of GCC. | |
9 | |
10 GCC is free software; you can redistribute it and/or modify | |
11 it under the terms of the GNU General Public License as published by | |
12 the Free Software Foundation; either version 3, or (at your option) | |
13 any later version. | |
14 | |
15 GCC is distributed in the hope that it will be useful, | |
16 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 GNU General Public License for more details. | |
19 | |
20 You should have received a copy of the GNU General Public License | |
21 along with GCC; see the file COPYING3. If not see | |
22 <http://www.gnu.org/licenses/>. */ | |
23 | |
24 /* Names to predefine in the preprocessor for this target machine. */ | |
25 | |
26 struct base_arch_s { | |
27 /* Assembler only. */ | |
28 int asm_only; | |
29 | |
30 /* Core have 'MUL*' instructions. */ | |
31 int have_mul; | |
32 | |
33 /* Core have 'CALL' and 'JMP' instructions. */ | |
34 int have_jmp_call; | |
35 | |
36 /* Core have 'MOVW' and 'LPM Rx,Z' instructions. */ | |
37 int have_movw_lpmx; | |
38 | |
39 /* Core have 'ELPM' instructions. */ | |
40 int have_elpm; | |
41 | |
42 /* Core have 'ELPM Rx,Z' instructions. */ | |
43 int have_elpmx; | |
44 | |
45 /* Core have 'EICALL' and 'EIJMP' instructions. */ | |
46 int have_eijmp_eicall; | |
47 | |
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48 /* Reserved for xmega architecture. */ |
0 | 49 int reserved; |
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50 |
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51 /* Reserved for xmega architecture. */ |
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52 int reserved2; |
0 | 53 |
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54 /* Default start of data section address for architecture. */ |
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55 int default_data_section_start; |
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56 |
0 | 57 const char *const macro; |
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58 |
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59 /* Architecture name. */ |
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60 const char *const arch_name; |
0 | 61 }; |
62 | |
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63 /* These names are used as the index into the avr_arch_types[] table |
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64 above. */ |
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65 |
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66 enum avr_arch |
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67 { |
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68 ARCH_UNKNOWN, |
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69 ARCH_AVR1, |
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70 ARCH_AVR2, |
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71 ARCH_AVR25, |
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72 ARCH_AVR3, |
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73 ARCH_AVR31, |
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74 ARCH_AVR35, |
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75 ARCH_AVR4, |
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76 ARCH_AVR5, |
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77 ARCH_AVR51, |
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78 ARCH_AVR6 |
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79 }; |
0 | 80 |
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81 struct mcu_type_s { |
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82 /* Device name. */ |
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83 const char *const name; |
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84 |
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85 /* Index in avr_arch_types[]. */ |
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86 int arch; |
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87 |
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88 /* Must lie outside user's namespace. NULL == no macro. */ |
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89 const char *const macro; |
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90 |
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91 /* Stack pointer have 8 bits width. */ |
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92 int short_sp; |
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93 |
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94 /* Start of data section. */ |
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95 int data_section_start; |
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96 |
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97 /* Name of device library. */ |
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98 const char *const library_name; |
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99 }; |
0 | 100 |
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101 /* Preprocessor macros to define depending on MCU type. */ |
0 | 102 extern const char *avr_extra_arch_macro; |
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103 extern const struct base_arch_s *avr_current_arch; |
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104 extern const struct mcu_type_s *avr_current_device; |
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105 extern const struct mcu_type_s avr_mcu_types[]; |
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106 extern const struct base_arch_s avr_arch_types[]; |
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107 |
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108 #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile) |
0 | 109 |
110 #if !defined(IN_LIBGCC2) && !defined(IN_TARGET_LIBS) | |
111 extern GTY(()) section *progmem_section; | |
112 #endif | |
113 | |
114 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS) | |
115 #define AVR_HAVE_MUL (avr_current_arch->have_mul) | |
116 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx) | |
117 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx) | |
118 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm) | |
119 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall) | |
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120 #define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK) |
0 | 121 |
122 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL) | |
123 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL) | |
124 | |
125 #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)"); | |
126 | |
127 #define OVERRIDE_OPTIONS avr_override_options () | |
128 | |
129 #define CAN_DEBUG_WITHOUT_FP | |
130 | |
131 #define BITS_BIG_ENDIAN 0 | |
132 #define BYTES_BIG_ENDIAN 0 | |
133 #define WORDS_BIG_ENDIAN 0 | |
134 | |
135 #ifdef IN_LIBGCC2 | |
136 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */ | |
137 #define UNITS_PER_WORD 4 | |
138 #else | |
139 /* Width of a word, in units (bytes). */ | |
140 #define UNITS_PER_WORD 1 | |
141 #endif | |
142 | |
143 #define POINTER_SIZE 16 | |
144 | |
145 | |
146 /* Maximum sized of reasonable data type | |
147 DImode or Dfmode ... */ | |
148 #define MAX_FIXED_MODE_SIZE 32 | |
149 | |
150 #define PARM_BOUNDARY 8 | |
151 | |
152 #define FUNCTION_BOUNDARY 8 | |
153 | |
154 #define EMPTY_FIELD_BOUNDARY 8 | |
155 | |
156 /* No data type wants to be aligned rounder than this. */ | |
157 #define BIGGEST_ALIGNMENT 8 | |
158 | |
159 #define MAX_OFILE_ALIGNMENT (32768 * 8) | |
160 | |
161 #define TARGET_VTABLE_ENTRY_ALIGN 8 | |
162 | |
163 #define STRICT_ALIGNMENT 0 | |
164 | |
165 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16) | |
166 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16) | |
167 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32) | |
168 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64) | |
169 #define FLOAT_TYPE_SIZE 32 | |
170 #define DOUBLE_TYPE_SIZE 32 | |
171 #define LONG_DOUBLE_TYPE_SIZE 32 | |
172 | |
173 #define DEFAULT_SIGNED_CHAR 1 | |
174 | |
175 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int") | |
176 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int") | |
177 | |
178 #define WCHAR_TYPE_SIZE 16 | |
179 | |
180 #define FIRST_PSEUDO_REGISTER 36 | |
181 | |
182 #define FIXED_REGISTERS {\ | |
183 1,1,/* r0 r1 */\ | |
184 0,0,/* r2 r3 */\ | |
185 0,0,/* r4 r5 */\ | |
186 0,0,/* r6 r7 */\ | |
187 0,0,/* r8 r9 */\ | |
188 0,0,/* r10 r11 */\ | |
189 0,0,/* r12 r13 */\ | |
190 0,0,/* r14 r15 */\ | |
191 0,0,/* r16 r17 */\ | |
192 0,0,/* r18 r19 */\ | |
193 0,0,/* r20 r21 */\ | |
194 0,0,/* r22 r23 */\ | |
195 0,0,/* r24 r25 */\ | |
196 0,0,/* r26 r27 */\ | |
197 0,0,/* r28 r29 */\ | |
198 0,0,/* r30 r31 */\ | |
199 1,1,/* STACK */\ | |
200 1,1 /* arg pointer */ } | |
201 | |
202 #define CALL_USED_REGISTERS { \ | |
203 1,1,/* r0 r1 */ \ | |
204 0,0,/* r2 r3 */ \ | |
205 0,0,/* r4 r5 */ \ | |
206 0,0,/* r6 r7 */ \ | |
207 0,0,/* r8 r9 */ \ | |
208 0,0,/* r10 r11 */ \ | |
209 0,0,/* r12 r13 */ \ | |
210 0,0,/* r14 r15 */ \ | |
211 0,0,/* r16 r17 */ \ | |
212 1,1,/* r18 r19 */ \ | |
213 1,1,/* r20 r21 */ \ | |
214 1,1,/* r22 r23 */ \ | |
215 1,1,/* r24 r25 */ \ | |
216 1,1,/* r26 r27 */ \ | |
217 0,0,/* r28 r29 */ \ | |
218 1,1,/* r30 r31 */ \ | |
219 1,1,/* STACK */ \ | |
220 1,1 /* arg pointer */ } | |
221 | |
222 #define REG_ALLOC_ORDER { \ | |
223 24,25, \ | |
224 18,19, \ | |
225 20,21, \ | |
226 22,23, \ | |
227 30,31, \ | |
228 26,27, \ | |
229 28,29, \ | |
230 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \ | |
231 0,1, \ | |
232 32,33,34,35 \ | |
233 } | |
234 | |
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235 #define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc () |
0 | 236 |
237 | |
238 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
239 | |
240 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE) | |
241 | |
242 #define MODES_TIEABLE_P(MODE1, MODE2) 1 | |
243 | |
244 enum reg_class { | |
245 NO_REGS, | |
246 R0_REG, /* r0 */ | |
247 POINTER_X_REGS, /* r26 - r27 */ | |
248 POINTER_Y_REGS, /* r28 - r29 */ | |
249 POINTER_Z_REGS, /* r30 - r31 */ | |
250 STACK_REG, /* STACK */ | |
251 BASE_POINTER_REGS, /* r28 - r31 */ | |
252 POINTER_REGS, /* r26 - r31 */ | |
253 ADDW_REGS, /* r24 - r31 */ | |
254 SIMPLE_LD_REGS, /* r16 - r23 */ | |
255 LD_REGS, /* r16 - r31 */ | |
256 NO_LD_REGS, /* r0 - r15 */ | |
257 GENERAL_REGS, /* r0 - r31 */ | |
258 ALL_REGS, LIM_REG_CLASSES | |
259 }; | |
260 | |
261 | |
262 #define N_REG_CLASSES (int)LIM_REG_CLASSES | |
263 | |
264 #define REG_CLASS_NAMES { \ | |
265 "NO_REGS", \ | |
266 "R0_REG", /* r0 */ \ | |
267 "POINTER_X_REGS", /* r26 - r27 */ \ | |
268 "POINTER_Y_REGS", /* r28 - r29 */ \ | |
269 "POINTER_Z_REGS", /* r30 - r31 */ \ | |
270 "STACK_REG", /* STACK */ \ | |
271 "BASE_POINTER_REGS", /* r28 - r31 */ \ | |
272 "POINTER_REGS", /* r26 - r31 */ \ | |
273 "ADDW_REGS", /* r24 - r31 */ \ | |
274 "SIMPLE_LD_REGS", /* r16 - r23 */ \ | |
275 "LD_REGS", /* r16 - r31 */ \ | |
276 "NO_LD_REGS", /* r0 - r15 */ \ | |
277 "GENERAL_REGS", /* r0 - r31 */ \ | |
278 "ALL_REGS" } | |
279 | |
280 #define REG_CLASS_CONTENTS { \ | |
281 {0x00000000,0x00000000}, /* NO_REGS */ \ | |
282 {0x00000001,0x00000000}, /* R0_REG */ \ | |
283 {3 << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \ | |
284 {3 << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \ | |
285 {3 << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \ | |
286 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \ | |
287 {(3 << REG_Y) | (3 << REG_Z), \ | |
288 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \ | |
289 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z), \ | |
290 0x00000000}, /* POINTER_REGS, r26 - r31 */ \ | |
291 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W), \ | |
292 0x00000000}, /* ADDW_REGS, r24 - r31 */ \ | |
293 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \ | |
294 {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16), \ | |
295 0x00000000}, /* LD_REGS, r16 - r31 */ \ | |
296 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \ | |
297 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \ | |
298 {0xffffffff,0x00000003} /* ALL_REGS */ \ | |
299 } | |
300 | |
301 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R) | |
302 | |
303 /* The following macro defines cover classes for Integrated Register | |
304 Allocator. Cover classes is a set of non-intersected register | |
305 classes covering all hard registers used for register allocation | |
306 purpose. Any move between two registers of a cover class should be | |
307 cheaper than load or store of the registers. The macro value is | |
308 array of register classes with LIM_REG_CLASSES used as the end | |
309 marker. */ | |
310 | |
311 #define IRA_COVER_CLASSES \ | |
312 { \ | |
313 GENERAL_REGS, LIM_REG_CLASSES \ | |
314 } | |
315 | |
316 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS) | |
317 | |
318 #define INDEX_REG_CLASS NO_REGS | |
319 | |
320 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER \ | |
321 && ((r) == REG_X \ | |
322 || (r) == REG_Y \ | |
323 || (r) == REG_Z \ | |
324 || (r) == ARG_POINTER_REGNUM)) \ | |
325 || (reg_renumber \ | |
326 && (reg_renumber[r] == REG_X \ | |
327 || reg_renumber[r] == REG_Y \ | |
328 || reg_renumber[r] == REG_Z \ | |
329 || (reg_renumber[r] \ | |
330 == ARG_POINTER_REGNUM)))) | |
331 | |
332 #define REGNO_OK_FOR_INDEX_P(NUM) 0 | |
333 | |
334 #define PREFERRED_RELOAD_CLASS(X, CLASS) preferred_reload_class(X,CLASS) | |
335 | |
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336 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
0 | 337 |
338 #define CLASS_LIKELY_SPILLED_P(c) class_likely_spilled_p(c) | |
339 | |
340 #define CLASS_MAX_NREGS(CLASS, MODE) class_max_nregs (CLASS, MODE) | |
341 | |
342 #define STACK_PUSH_CODE POST_DEC | |
343 | |
344 #define STACK_GROWS_DOWNWARD | |
345 | |
346 #define STARTING_FRAME_OFFSET 1 | |
347 | |
348 #define STACK_POINTER_OFFSET 1 | |
349 | |
350 #define FIRST_PARM_OFFSET(FUNDECL) 0 | |
351 | |
352 #define STACK_BOUNDARY 8 | |
353 | |
354 #define STACK_POINTER_REGNUM 32 | |
355 | |
356 #define FRAME_POINTER_REGNUM REG_Y | |
357 | |
358 #define ARG_POINTER_REGNUM 34 | |
359 | |
360 #define STATIC_CHAIN_REGNUM 2 | |
361 | |
362 /* Offset from the frame pointer register value to the top of the stack. */ | |
363 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0 | |
364 | |
365 #define ELIMINABLE_REGS { \ | |
366 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
367 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \ | |
368 ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}} | |
369 | |
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370 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ |
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371 OFFSET = avr_initial_elimination_offset (FROM, TO) |
0 | 372 |
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373 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem) |
0 | 374 |
375 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken | |
376 for POST_DEC targets (PR27386). */ | |
377 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/ | |
378 | |
379 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0 | |
380 | |
381 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) (function_arg (&(CUM), MODE, TYPE, NAMED)) | |
382 | |
383 typedef struct avr_args { | |
384 int nregs; /* # registers available for passing */ | |
385 int regno; /* next available register number */ | |
386 } CUMULATIVE_ARGS; | |
387 | |
388 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ | |
389 init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL) | |
390 | |
391 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
392 (function_arg_advance (&CUM, MODE, TYPE, NAMED)) | |
393 | |
394 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r) | |
395 | |
396 extern int avr_reg_order[]; | |
397 | |
398 #define RET_REGISTER avr_ret_register () | |
399 | |
400 #define LIBCALL_VALUE(MODE) avr_libcall_value (MODE) | |
401 | |
402 #define FUNCTION_VALUE_REGNO_P(N) ((int) (N) == RET_REGISTER) | |
403 | |
404 #define DEFAULT_PCC_STRUCT_RETURN 0 | |
405 | |
406 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO) | |
407 | |
408 #define HAVE_POST_INCREMENT 1 | |
409 #define HAVE_PRE_DECREMENT 1 | |
410 | |
411 #define MAX_REGS_PER_ADDRESS 1 | |
412 | |
413 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \ | |
414 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X)) | |
415 | |
416 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
417 | |
418 /* LEGITIMIZE_RELOAD_ADDRESS will allow register R26/27 to be used, where it | |
419 is no worse than normal base pointers R28/29 and R30/31. For example: | |
420 If base offset is greater than 63 bytes or for R++ or --R addressing. */ | |
421 | |
422 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \ | |
423 do { \ | |
424 if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC)) \ | |
425 { \ | |
426 push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0), \ | |
427 POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0, \ | |
428 OPNUM, RELOAD_OTHER); \ | |
429 goto WIN; \ | |
430 } \ | |
431 if (GET_CODE (X) == PLUS \ | |
432 && REG_P (XEXP (X, 0)) \ | |
433 && reg_equiv_constant[REGNO (XEXP (X, 0))] == 0 \ | |
434 && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
435 && INTVAL (XEXP (X, 1)) >= 1) \ | |
436 { \ | |
437 int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE)); \ | |
438 if (fit) \ | |
439 { \ | |
440 if (reg_equiv_address[REGNO (XEXP (X, 0))] != 0) \ | |
441 { \ | |
442 int regno = REGNO (XEXP (X, 0)); \ | |
443 rtx mem = make_memloc (X, regno); \ | |
444 push_reload (XEXP (mem,0), NULL, &XEXP (mem,0), NULL, \ | |
445 POINTER_REGS, Pmode, VOIDmode, 0, 0, \ | |
446 1, ADDR_TYPE (TYPE)); \ | |
447 push_reload (mem, NULL_RTX, &XEXP (X, 0), NULL, \ | |
448 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \ | |
449 OPNUM, TYPE); \ | |
450 goto WIN; \ | |
451 } \ | |
452 } \ | |
453 else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \ | |
454 { \ | |
455 push_reload (X, NULL_RTX, &X, NULL, \ | |
456 POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \ | |
457 OPNUM, TYPE); \ | |
458 goto WIN; \ | |
459 } \ | |
460 } \ | |
461 } while(0) | |
462 | |
463 #define LEGITIMATE_CONSTANT_P(X) 1 | |
464 | |
465 #define REGISTER_MOVE_COST(MODE, FROM, TO) ((FROM) == STACK_REG ? 6 \ | |
466 : (TO) == STACK_REG ? 12 \ | |
467 : 2) | |
468 | |
469 #define MEMORY_MOVE_COST(MODE,CLASS,IN) ((MODE)==QImode ? 2 : \ | |
470 (MODE)==HImode ? 4 : \ | |
471 (MODE)==SImode ? 8 : \ | |
472 (MODE)==SFmode ? 8 : 16) | |
473 | |
474 #define BRANCH_COST(speed_p, predictable_p) 0 | |
475 | |
476 #define SLOW_BYTE_ACCESS 0 | |
477 | |
478 #define NO_FUNCTION_CSE | |
479 | |
480 #define TEXT_SECTION_ASM_OP "\t.text" | |
481 | |
482 #define DATA_SECTION_ASM_OP "\t.data" | |
483 | |
484 #define BSS_SECTION_ASM_OP "\t.section .bss" | |
485 | |
486 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections. | |
487 There are no shared libraries on this target, and these sections are | |
488 placed in the read-only program memory, so they are not writable. */ | |
489 | |
490 #undef CTORS_SECTION_ASM_OP | |
491 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits" | |
492 | |
493 #undef DTORS_SECTION_ASM_OP | |
494 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits" | |
495 | |
496 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor | |
497 | |
498 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor | |
499 | |
500 #define SUPPORTS_INIT_PRIORITY 0 | |
501 | |
502 #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
503 | |
504 #define ASM_COMMENT_START " ; " | |
505 | |
506 #define ASM_APP_ON "/* #APP */\n" | |
507 | |
508 #define ASM_APP_OFF "/* #NOAPP */\n" | |
509 | |
510 /* Switch into a generic section. */ | |
511 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section | |
512 #define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections | |
513 | |
514 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) gas_output_ascii (FILE,P,SIZE) | |
515 | |
516 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$')) | |
517 | |
518 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \ | |
519 do { \ | |
520 fputs ("\t.comm ", (STREAM)); \ | |
521 assemble_name ((STREAM), (NAME)); \ | |
522 fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE)); \ | |
523 } while (0) | |
524 | |
525 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \ | |
526 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED)) | |
527 | |
528 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \ | |
529 do { \ | |
530 fputs ("\t.lcomm ", (STREAM)); \ | |
531 assemble_name ((STREAM), (NAME)); \ | |
532 fprintf ((STREAM), ",%d\n", (int)(SIZE)); \ | |
533 } while (0) | |
534 | |
535 #undef TYPE_ASM_OP | |
536 #undef SIZE_ASM_OP | |
537 #undef WEAK_ASM_OP | |
538 #define TYPE_ASM_OP "\t.type\t" | |
539 #define SIZE_ASM_OP "\t.size\t" | |
540 #define WEAK_ASM_OP "\t.weak\t" | |
541 /* Define the strings used for the special svr4 .type and .size directives. | |
542 These strings generally do not vary from one system running svr4 to | |
543 another, but if a given system (e.g. m88k running svr) needs to use | |
544 different pseudo-op names for these, they may be overridden in the | |
545 file which includes this one. */ | |
546 | |
547 | |
548 #undef TYPE_OPERAND_FMT | |
549 #define TYPE_OPERAND_FMT "@%s" | |
550 /* The following macro defines the format used to output the second | |
551 operand of the .type assembler directive. Different svr4 assemblers | |
552 expect various different forms for this operand. The one given here | |
553 is just a default. You may need to override it in your machine- | |
554 specific tm.h file (depending upon the particulars of your assembler). */ | |
555 | |
556 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ | |
557 avr_asm_declare_function_name ((FILE), (NAME), (DECL)) | |
558 | |
559 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \ | |
560 do { \ | |
561 if (!flag_inhibit_size_directive) \ | |
562 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \ | |
563 } while (0) | |
564 | |
565 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \ | |
566 do { \ | |
567 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \ | |
568 size_directive_output = 0; \ | |
569 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \ | |
570 { \ | |
571 size_directive_output = 1; \ | |
572 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, \ | |
573 int_size_in_bytes (TREE_TYPE (DECL))); \ | |
574 } \ | |
575 ASM_OUTPUT_LABEL(FILE, NAME); \ | |
576 } while (0) | |
577 | |
578 #undef ASM_FINISH_DECLARE_OBJECT | |
579 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \ | |
580 do { \ | |
581 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \ | |
582 HOST_WIDE_INT size; \ | |
583 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \ | |
584 && ! AT_END && TOP_LEVEL \ | |
585 && DECL_INITIAL (DECL) == error_mark_node \ | |
586 && !size_directive_output) \ | |
587 { \ | |
588 size_directive_output = 1; \ | |
589 size = int_size_in_bytes (TREE_TYPE (DECL)); \ | |
590 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \ | |
591 } \ | |
592 } while (0) | |
593 | |
594 | |
595 #define ESCAPES \ | |
596 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\ | |
597 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\ | |
598 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\ | |
599 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\ | |
600 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\ | |
601 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\ | |
602 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\ | |
603 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1" | |
604 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and | |
605 ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table | |
606 corresponds to a particular byte value [0..255]. For any | |
607 given byte value, if the value in the corresponding table | |
608 position is zero, the given character can be output directly. | |
609 If the table value is 1, the byte must be output as a \ooo | |
610 octal escape. If the tables value is anything else, then the | |
611 byte value should be output as a \ followed by the value | |
612 in the table. Note that we can use standard UN*X escape | |
613 sequences for many control characters, but we don't use | |
614 \a to represent BEL because some svr4 assemblers (e.g. on | |
615 the i386) don't know about that. Also, we don't use \v | |
616 since some versions of gas, such as 2.2 did not accept it. */ | |
617 | |
618 #define STRING_LIMIT ((unsigned) 64) | |
619 #define STRING_ASM_OP "\t.string\t" | |
620 /* Some svr4 assemblers have a limit on the number of characters which | |
621 can appear in the operand of a .string directive. If your assembler | |
622 has such a limitation, you should define STRING_LIMIT to reflect that | |
623 limit. Note that at least some svr4 assemblers have a limit on the | |
624 actual number of bytes in the double-quoted string, and that they | |
625 count each character in an escape sequence as one byte. Thus, an | |
626 escape sequence like \377 would count as four bytes. | |
627 | |
628 If your target assembler doesn't support the .string directive, you | |
629 should define this to zero. */ | |
630 | |
631 /* Globalizing directive for a label. */ | |
632 #define GLOBAL_ASM_OP ".global\t" | |
633 | |
634 #define SET_ASM_OP "\t.set\t" | |
635 | |
636 #define ASM_WEAKEN_LABEL(FILE, NAME) \ | |
637 do \ | |
638 { \ | |
639 fputs ("\t.weak\t", (FILE)); \ | |
640 assemble_name ((FILE), (NAME)); \ | |
641 fputc ('\n', (FILE)); \ | |
642 } \ | |
643 while (0) | |
644 | |
645 #define SUPPORTS_WEAK 1 | |
646 | |
647 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ | |
648 sprintf (STRING, "*.%s%lu", PREFIX, (unsigned long)(NUM)) | |
649 | |
650 #define HAS_INIT_SECTION 1 | |
651 | |
652 #define REGISTER_NAMES { \ | |
653 "r0","r1","r2","r3","r4","r5","r6","r7", \ | |
654 "r8","r9","r10","r11","r12","r13","r14","r15", \ | |
655 "r16","r17","r18","r19","r20","r21","r22","r23", \ | |
656 "r24","r25","r26","r27","r28","r29","r30","r31", \ | |
657 "__SP_L__","__SP_H__","argL","argH"} | |
658 | |
659 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop) | |
660 | |
661 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE) | |
662 | |
663 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!') | |
664 | |
665 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X) | |
666 | |
667 #define USER_LABEL_PREFIX "" | |
668 | |
669 #define ASSEMBLER_DIALECT AVR_HAVE_MOVW | |
670 | |
671 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \ | |
672 { \ | |
673 gcc_assert (REGNO < 32); \ | |
674 fprintf (STREAM, "\tpush\tr%d", REGNO); \ | |
675 } | |
676 | |
677 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \ | |
678 { \ | |
679 gcc_assert (REGNO < 32); \ | |
680 fprintf (STREAM, "\tpop\tr%d", REGNO); \ | |
681 } | |
682 | |
683 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ | |
684 avr_output_addr_vec_elt(STREAM, VALUE) | |
685 | |
686 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \ | |
687 (switch_to_section (progmem_section), \ | |
688 (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM)) | |
689 | |
690 #define ASM_OUTPUT_SKIP(STREAM, N) \ | |
691 fprintf (STREAM, "\t.skip %lu,0\n", (unsigned long)(N)) | |
692 | |
693 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ | |
694 do { \ | |
695 if ((POWER) > 1) \ | |
696 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \ | |
697 } while (0) | |
698 | |
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699 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \ |
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700 default_elf_asm_output_external (FILE, DECL, NAME) |
0 | 701 |
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702 #define CASE_VECTOR_MODE HImode |
0 | 703 |
704 #undef WORD_REGISTER_OPERATIONS | |
705 | |
706 #define MOVE_MAX 4 | |
707 | |
708 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
709 | |
710 #define Pmode HImode | |
711 | |
712 #define FUNCTION_MODE HImode | |
713 | |
714 #define DOLLARS_IN_IDENTIFIERS 0 | |
715 | |
716 #define NO_DOLLAR_IN_LABEL 1 | |
717 | |
718 #define TRAMPOLINE_SIZE 4 | |
719 | |
720 /* Store in cc_status the expressions | |
721 that the condition codes will describe | |
722 after execution of an instruction whose pattern is EXP. | |
723 Do not alter them if the instruction would not alter the cc's. */ | |
724 | |
725 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN) | |
726 | |
727 /* The add insns don't set overflow in a usable way. */ | |
728 #define CC_OVERFLOW_UNUSABLE 01000 | |
729 /* The mov,and,or,xor insns don't set carry. That's ok though as the | |
730 Z bit is all we need when doing unsigned comparisons on the result of | |
731 these insns (since they're always with 0). However, conditions.h has | |
732 CC_NO_OVERFLOW defined for this purpose. Rename it to something more | |
733 understandable. */ | |
734 #define CC_NO_CARRY CC_NO_OVERFLOW | |
735 | |
736 | |
737 /* Output assembler code to FILE to increment profiler label # LABELNO | |
738 for profiling a function entry. */ | |
739 | |
740 #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
741 fprintf (FILE, "/* profiler %d */", (LABELNO)) | |
742 | |
743 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\ | |
744 adjust_insn_length (INSN, LENGTH)) | |
745 | |
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746 extern const char *avr_device_to_arch (int argc, const char **argv); |
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747 extern const char *avr_device_to_data_start (int argc, const char **argv); |
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748 extern const char *avr_device_to_startfiles (int argc, const char **argv); |
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749 extern const char *avr_device_to_devicelib (int argc, const char **argv); |
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750 |
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751 #define EXTRA_SPEC_FUNCTIONS \ |
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752 { "device_to_arch", avr_device_to_arch }, \ |
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753 { "device_to_data_start", avr_device_to_data_start }, \ |
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754 { "device_to_startfile", avr_device_to_startfiles }, \ |
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755 { "device_to_devicelib", avr_device_to_devicelib }, |
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756 |
0 | 757 #define CPP_SPEC "%{posix:-D_POSIX_SOURCE}" |
758 | |
759 #define CC1_SPEC "%{profile:-p}" | |
760 | |
761 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \ | |
762 %{!fenforce-eh-specs:-fno-enforce-eh-specs} \ | |
763 %{!fexceptions:-fno-exceptions}" | |
764 /* A C string constant that tells the GCC driver program options to | |
765 pass to `cc1plus'. */ | |
766 | |
767 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\ | |
768 mmcu=*:-mmcu=%*}" | |
769 | |
770 #define LINK_SPEC "\ | |
771 %{mrelax:--relax\ | |
772 %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\ | |
773 %{mmcu=atmega16*:--pmem-wrap-around=16k}\ | |
774 %{mmcu=atmega32*|\ | |
775 mmcu=at90can32*:--pmem-wrap-around=32k}\ | |
776 %{mmcu=atmega64*|\ | |
777 mmcu=at90can64*|\ | |
778 mmcu=at90usb64*:--pmem-wrap-around=64k}}}\ | |
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779 %:device_to_arch(%{mmcu=*:%*})\ |
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780 %:device_to_data_start(%{mmcu=*:%*})" |
0 | 781 |
782 #define LIB_SPEC \ | |
783 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}" | |
784 | |
785 #define LIBSTDCXX "-lgcc" | |
786 /* No libstdc++ for now. Empty string doesn't work. */ | |
787 | |
788 #define LIBGCC_SPEC \ | |
789 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}" | |
790 | |
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791 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})" |
0 | 792 |
793 #define ENDFILE_SPEC "" | |
794 | |
795 /* This is the default without any -mmcu=* option (AT90S*). */ | |
796 #define MULTILIB_DEFAULTS { "mmcu=avr2" } | |
797 | |
798 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \ | |
799 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO) | |
800 | |
801 /* Note that the other files fail to use these | |
802 in some of the places where they should. */ | |
803 | |
804 #if defined(__STDC__) || defined(ALMOST_STDC) | |
805 #define AS2(a,b,c) #a " " #b "," #c | |
806 #define AS2C(b,c) " " #b "," #c | |
807 #define AS3(a,b,c,d) #a " " #b "," #c "," #d | |
808 #define AS1(a,b) #a " " #b | |
809 #else | |
810 #define AS1(a,b) "a b" | |
811 #define AS2(a,b,c) "a b,c" | |
812 #define AS2C(b,c) " b,c" | |
813 #define AS3(a,b,c,d) "a b,c,d" | |
814 #endif | |
815 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands) | |
816 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands) | |
817 #define CR_TAB "\n\t" | |
818 | |
819 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG | |
820 | |
821 #define DWARF2_DEBUGGING_INFO 1 | |
822 | |
823 #define DWARF2_ADDR_SIZE 4 | |
824 | |
825 #define OBJECT_FORMAT_ELF | |
826 | |
827 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ | |
828 avr_hard_regno_rename_ok (OLD_REG, NEW_REG) | |
829 | |
830 /* A C structure for machine-specific, per-function data. | |
831 This is added to the cfun structure. */ | |
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832 struct GTY(()) machine_function |
0 | 833 { |
834 /* 'true' - if current function is a naked function. */ | |
835 int is_naked; | |
836 | |
837 /* 'true' - if current function is an interrupt function | |
838 as specified by the "interrupt" attribute. */ | |
839 int is_interrupt; | |
840 | |
841 /* 'true' - if current function is a signal function | |
842 as specified by the "signal" attribute. */ | |
843 int is_signal; | |
844 | |
845 /* 'true' - if current function is a 'task' function | |
846 as specified by the "OS_task" attribute. */ | |
847 int is_OS_task; | |
848 | |
849 /* 'true' - if current function is a 'main' function | |
850 as specified by the "OS_main" attribute. */ | |
851 int is_OS_main; | |
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852 |
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853 /* Current function stack size. */ |
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854 int stack_usage; |
0 | 855 }; |